RE: [PATCH v2 2/2] RISC-V: Add testcases for signed scalar SAT_ADD IMM form 2

Ok, but please use "Add" instead of "add" in change log before commit, I suppose xuli can help to commit patches. > * gcc.target/riscv/sat/sat_arith.h: add signed scalar SAT_ADD IMM form2. Pan -Original Message- From: Ciyan Pan Sent: Tuesday, July 1, 2025 2:19 PM To: gcc-patches@gcc.g

[PATCH] testsuite: Fix up gcc.target/powerpc/builtin_altivec_tr_stxvr_runnable.c test [PR120919]

Hi! This test seems to fail when testing with RUNTESTFLAGS="--target_board=unix/'{,-fstack-protector-strong}'" on power10. In my reading of the test and the instructions emitted by the builtins, it invokes UB 4 times, each time overwriting one byte after some variable (sc, then ss, then si and the

[PATCH 1/2] doc: Clarify mode of else operand for vec_mask_load_lanesmn

This extends the documentation of the vec_mask_load_lanes optab to explicitly state that the mode of the else operand is n, i.e. the mode of a single subvector. OK to install? Thanks, Alex gcc/ChangeLog: * doc/md.texi (Standard Names): Clarify mode of else operand for vec_mask_l

Re: [PATCH] c-family: Check backend for argument alignment on stack

On Tue, Jul 1, 2025 at 9:37 PM Jason Merrill wrote: > > On 6/30/25 7:03 PM, H.J. Lu wrote: > > On Mon, Jun 30, 2025 at 10:36 PM Jason Merrill wrote: > >> > >> On 6/28/25 7:00 AM, H.J. Lu wrote: > >>> Since a backend may ignore user type alignment for arguments passed on > >>> stack, check backend

Re: [PATCH] c++, libstdc++, v2: Implement C++26 P2830R10 - Constexpr Type Ordering

On 6/26/25 6:33 AM, Jakub Jelinek wrote: On Wed, Jun 25, 2025 at 10:58:59PM +0200, Maciej Cencora wrote: update of std module is missing. Here is an updated patch which adds the std module part and while I was changing the patch, I've also added value_type/type and the 2 operators to std::type

Re: [PATCH v7 7/9] AArch64: precommit test for CMPBR instructions

Richard Sandiford writes: > Karl Meakin writes: >> +// If the branch destination is out of range (1KiB), we have to generate an >> +// extra B instruction (which can handle larger displacements) and branch >> around >> +// it >> +int far_branch(i32 x, i32 y) { >> + volatile int z = 0; >> + if

RE: [COMMITTED] cobol: Normalize generating and using function_decls.

Oi. Rainer, I have lost track of when %zu is okay, and when it isn't. Jim has been making adjustments to printf formatting; I haven't been paying close attention. The statement you report came about because I made the wrong choice when deconflicting a merge of my stuff and Jim's, and I must

[PATCH v2] RISC-V: Updated march , that aligned with mips-p8700

Refactored ccmov insn rtl template to use code_iterator and fixed the indentation. No regressions are found for "runtest --tool gcc --target_board='riscv-sim/-mabi=lp64d/-mtune=mips-p8700/-O2 ' riscv.exp" *config/riscv/riscv-cores.def(RISCV_CORE):Updated the supported march. *con

Re: [PATCH v2] libstdc++: Lift locale initialization in main chrono format loop [PR110739]

On Tue, Jul 1, 2025 at 4:57 PM Tomasz Kamiński wrote: > This patch lifts locale initialization from locale-specific handling > methods > into _M_format_to function, and pass the locale by const reference. > To avoid unnecessary computation of locale::classic(), we use > _Optional_locale, > and em

Re: [PATCH v6 1/3][Middle-end] Provide more contexts for -Warray-bounds, -Wstringop-*warning messages due to code movements from compiler transformation (Part 1) [PR109071,PR85788,PR88771,PR106762,PR1

> On Jul 1, 2025, at 03:14, Richard Biener wrote: > > On Mon, Jun 30, 2025 at 10:37 PM Qing Zhao wrote: >> >> Hi, David, >> >> Thank you for the info. >> >> Yes, this does sound like a general issue in this area. >> >> Is there any mechanism in GCC currently that records such original sour

[COMMITTED] cobol: Update test case for intrinsic function syntax.

A recent update to the COBOL syntax checker resulted in this test case failing, so it needed to be fixed. >From f6c187a4f34b6925196279fd623f9f1396385a18 Mon Sep 17 00:00:00 2001 From: Robert Dubner mailto:rdub...@symas.com Date: Tue, 1 Jul 2025 11:07:18 -0400 Subject: [PATCH] cobol: Update test ca

[PATCH 2/2] aarch64: Drop const_int from aarch64_maskload_else_operand

The "else operand" to maskload should always be a const_vector, never a const_int. This was just an issue I noticed while looking through the code, I don't have a testcase which shows a concrete problem due to this. Testing of that change alone showed ICEs with load lanes vectorization and SVE.

Re: [PATCH] s390: Add -fno-stack-protector to 3 tests

On Tue, Jul 01, 2025 at 03:47:53PM +0200, Stefan Schulze Frielinghaus wrote: > In the past years I have started to use more and more function body > checks whenever gcc emits optimal code for a function. With that I > wanted to make sure that we do not regress like introducing unnecessary > extend

Re: [PATCH v4 2/6] dwarf: create annotation DIEs for btf tags

On 7/1/25 01:02, Richard Biener wrote: > On Mon, Jun 30, 2025 at 9:12 PM David Faust wrote: >> >> >> >> On 6/30/25 06:11, Richard Biener wrote: +static void +gen_btf_decl_tag_dies (tree t, dw_die_ref target, dw_die_ref context_die) +{ + if (t == NULL_TREE || !DECL_P (t) ||

Re: [PATCH] testsuite, powerpc: Fix vsx-vectorize-* after alignment peeling [PR118567]

On Tue, Jul 01, 2025 at 12:04:04PM -0500, Segher Boessenkool wrote: > On Mon, Feb 17, 2025 at 02:28:50PM +, Alex Coplan wrote: > > After the recent alignment peeling enhancements in the vectorizer we > > started vectorizing the "checking" loops (that check for the right > > result) in gcc.targe

[PATCH] AArch64: Use correct cost for shifted halfword load/stores

Since all Armv9 cores support shifted LDRH/STRH, use the correct cost of zero for these. Passes regress, OK for commit? gcc: * config/aarch64/tuning_models/generic_armv9_a.h (generic_armv9_a_addrcost_table): Use zero cost for himode. --- diff --git a/gcc/config/aarch64/tuning_mo

Re: [PATCH v2] RISC-V: Updated march , that aligned with mips-p8700

On Tue, 1 Jul 2025, Umesh Kalappa wrote: > *config/riscv/riscv-cores.def(RISCV_CORE):Updated the supported march. > *config/riscv/riscv-ext-mips.def(DEFINE_RISCV_EXT): >New file added for mips conditional mov extension. > *config/riscv/riscv-ext.def: Likewise. > *co

[PATCH] libstdc++: construct bitset from string_view (P2697) [PR119742]

Add a bitset constructor from string_view, with other arguments matching the constructor from string. Test in ways that exercise code paths not checked in existing tests for other constructors. Fix existing tests that would fail to detect incorrect exception behavior. libstdc++-v3/ChangeLog:

[PATCH] libstdc++: make range view ctors explicit (P2711) [PR119744]

Make range view constructors explicit, per P2711. Technically, this is a breaking change, but it is unlikely to break any production code, as reliance on non-explicit construction is unidiomatic.. libstdc++-v3/ChangeLog PR libstdc++/119744 * include/std/ranges: view ctors become ex

RE: [COMMITTED] cobol: Normalize generating and using function_decls.

> -Original Message- > From: Rainer Orth > Sent: Monday, June 30, 2025 10:27 > To: Robert Dubner > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [COMMITTED] cobol: Normalize generating and using > function_decls. > > Hi Robert, > > > These changes have been shown to generate more sensible co

Re: [PATCH] c++: Fix FMV return type ambiguation

On 6/30/25 4:25 AM, Alfie Richards wrote: Hi Jeff, Yes agreed, I've respun this to be standalone and moved the relevant test from another patch to this. Sending again for reapproval in an abbundance of caution. Regr tested on Aarch64 and x86. Thanks, Alfie -- >8 -- Add logic for the case of

Re: [PATCH] libstdc++: Make debug iterator pointer sequence const [PR116369]

On Mon, 16 Jun 2025 at 18:36, François Dumont wrote: > > I eventually wonder if it is such a big deal to add the new symbols for > _GLIBCXX_DEBUG mode. I like this version much more than the one trying to duplicate symbols with asm. > Here is the patch doing this. It avoids to add many const_c

Re: [PATCH v2 1/5] libstdc++: Check prerequisites of layout_*::operator().

On Tue, 1 Jul 2025 at 11:32, Tomasz Kaminski wrote: > > Hi, > More of the review will be later, but I have noticed that you have added > preconditions checks > to the layouts, and then avoid checking them inside the operator[] of the > mdspan. This is general > sounds good. > > However, the prec

[COMMITTED] cobol: Repair printf format of size_t.

>From 4e8cb6fb26abc2601850577d13bbc669beee0290 Mon Sep 17 00:00:00 2001 From: Robert Dubner Date: Tue, 1 Jul 2025 12:02:21 -0400 Subject: [PATCH] cobol: Repair printf format of size_t. gcc/cobol/ChangeLog: * parse.y: printf() of size_t is %zu, not %ld. --- gcc/cobol/parse.y | 2 +- 1 fi

Re: [PATCH] testsuite: Fix up gcc.target/powerpc/builtin_altivec_tr_stxvr_runnable.c test [PR120919]

Hi! On Tue, Jul 01, 2025 at 05:16:45PM +0200, Jakub Jelinek wrote: > This test seems to fail when testing with > RUNTESTFLAGS="--target_board=unix/'{,-fstack-protector-strong}'" > on power10. Please mention near the start of the commit message (like, in the subject already!) that the testcase did

Re: [PATCH RFC] libgcc: don't use a weak ref for __cxa_finalize

On 7/1/25 10:57 AM, Florian Weimer wrote: * Jason Merrill: On 6/30/25 5:22 PM, Florian Weimer wrote: * Jason Merrill: On 6/28/25 3:17 PM, Florian Weimer wrote: * Jason Merrill: Since r10-6069[1] we control the call to __cxa_finalize with DEFAULT_USE_CXA_ATEXIT, so there's no need to also

Re: [PATCH] testsuite, powerpc: Fix vsx-vectorize-* after alignment peeling [PR118567]

Hi! On Tue, Jul 01, 2025 at 08:39:26PM +0200, Jakub Jelinek wrote: > On Tue, Jul 01, 2025 at 12:04:04PM -0500, Segher Boessenkool wrote: > > On Mon, Feb 17, 2025 at 02:28:50PM +, Alex Coplan wrote: > > > After the recent alignment peeling enhancements in the vectorizer we > > > started vectori

[PATCH] Fortran: fix minor issues with coarrays

Dear all, the attached patch fixes the following minor issues found by running f951 under valgrind for the just added new testcases coindexed_6.f90 and coindexed_7.f90: - minor front-end memleaks with non-freed strings and lost GMP variables (these are simple and obvious fixes) - an inconsiste

Re: [PATCH] Fortran: fix minor issues with coarrays

On 7/1/25 12:51 PM, Harald Anlauf wrote: Dear all, the attached patch fixes the following minor issues found by running f951 under valgrind for the just added new testcases coindexed_6.f90 and coindexed_7.f90: - minor front-end memleaks with non-freed strings and lost GMP variables  (these are

Re: [PATCH] Fortran: fix minor issues with coarrays

Am 01.07.25 um 21:54 schrieb Jerry D: On 7/1/25 12:51 PM, Harald Anlauf wrote: Dear all, the attached patch fixes the following minor issues found by running f951 under valgrind for the just added new testcases coindexed_6.f90 and coindexed_7.f90: - minor front-end memleaks with non-freed stri

[Ada] Fix PR ada/120705

This fixes an assertion failure for the Finalizable aspect applied on a tagged type with discriminant-dependent component. Tested on x86-64/Linux, applied on the mainline and 15 branch. 2025-07-01 Eric Botcazou PR ada/120705 * exp_ch6.adb (Needs_BIP_Collection): Always retur

Re: [PATCH] aarch64: Enable selective LDAPUR generation for cores with RCPC2

Soumya AR writes: > From 2a2c3e3683aaf3041524df166fc6f8cf20895a0b Mon Sep 17 00:00:00 2001 > From: Soumya AR > Date: Mon, 30 Jun 2025 12:17:30 -0700 > Subject: [PATCH] aarch64: Enable selective LDAPUR generation for cores with > RCPC2 > > This patch adds the ability to fold the address computati

Re: [PATCH] testsuite, powerpc: Fix vsx-vectorize-* after alignment peeling [PR118567]

Hi! On Mon, Feb 17, 2025 at 02:28:50PM +, Alex Coplan wrote: > After the recent alignment peeling enhancements in the vectorizer we > started vectorizing the "checking" loops (that check for the right > result) in gcc.target/powerpc/vsx-vectorize-*.c, thus skewing the > expected counts of var

Re: [PATCH] libstdc++: Make debug iterator pointer sequence const [PR116369]

On Mon, 23 Jun 2025 at 18:19, François Dumont wrote: > > Hi > > Even if you have no time to review this for now could you only answer the > question below that is to say: > > Should the current _GLIBCXX_INLINE_VERSION abi be preserved ? No, that's not necessary > > Thanks > > On 16/06/2025 19:

Re: [PATCH] aarch64: Enable selective LDAPUR generation for cores with RCPC2

> On 1 Jul 2025, at 17:36, Richard Sandiford wrote: > > Soumya AR writes: >> From 2a2c3e3683aaf3041524df166fc6f8cf20895a0b Mon Sep 17 00:00:00 2001 >> From: Soumya AR >> Date: Mon, 30 Jun 2025 12:17:30 -0700 >> Subject: [PATCH] aarch64: Enable selective LDAPUR generation for cores with >> RCP

[PATCH, V3] Add -mcpu=future to the PowerPC

This patch adds the support that can be used in developing GCC support for potential future PowerPC processors. These changes are being added so that hardware designers can evaluate potential new features to be added to the PowerPC processors in the future. It may be these features will be incorp

[PATCH v3 1/4] Internal-fn: Introduce new IFN_SAT_MUL for unsigned int

From: Pan Li This patch would like to add the middle-end presentation for the unsigend saturation mul. Aka set the result of mul to the max when overflow. Take uint8_t as example, we will have: * SAT_MUL (1, 127) => 127. * SAT_MUL (2, 127) => 254. * SAT_MUL (3, 127) => 255. * SAT_MUL (25

[PATCH v3 2/4] Widening-Mul: Support unsigned scalar SAT_MUL form 1

From: Pan Li This patch would like to try to match the SAT_MUL during widening-mul pass, aka below pattern. NT __attribute__((noinline)) sat_u_mul_##NT##_fmt_1 (NT a, NT b) { uint128_t x = (uint128_t)a * (uint128_t)b; NT max = -1; if (x > (uint128_t)(max)) return max;

[PATCH v3 0/4] Support unsigned scalar SAT_MUL from uint128_t

From: Pan Li This patch series would like to support the unsigned SAT_MUL with the help of uint128_t. Aka: NT __attribute__((noinline)) sat_u_mul_##NT##_fmt_1 (NT a, NT b) { uint128_t x = (uint128_t)a * (uint128_t)b; NT max = -1; if (x > (uint128_t)(max)) return max; else return

[PATCH v3 4/4] RISC-V: Add test cases for unsigned scalar SAT_MUL from uint128_t

From: Pan Li Add run and tree-optimized check for unsigned scalar SAT_MUL from uint128_t. gcc/testsuite/ChangeLog: * gcc.target/riscv/sat/sat_arith.h: Add test helper macros. * gcc.target/riscv/sat/sat_arith_data.h: Add test data for run test. * gcc.target/riscv/

[PATCH v3 3/4] RISC-V: Implement unsigned scalar SAT_MUL from uint128_t

From: Pan Li This patch would like to implement the SAT_MUL scalar unsigned from uint128_t, aka: NT __attribute__((noinline)) sat_u_mul_##NT##_fmt_1 (NT a, NT b) { uint128_t x = (uint128_t)a * (uint128_t)b; NT max = -1; if (x > (uint128_t)(max)) return max; else

Re: [PATCH] c-family: Check backend for argument alignment on stack

On 6/30/25 7:03 PM, H.J. Lu wrote: On Mon, Jun 30, 2025 at 10:36 PM Jason Merrill wrote: On 6/28/25 7:00 AM, H.J. Lu wrote: Since a backend may ignore user type alignment for arguments passed on stack, check backend for argument alignment on stack when evaluating __alignof. I assume that's

Re: [PATCH v2 1/5] libstdc++: Check prerequisites of layout_*::operator().

On 7/1/25 12:30, Tomasz Kaminski wrote: Hi, More of the review will be later, but I have noticed that you have added preconditions checks to the layouts, and then avoid checking them inside the operator[] of the mdspan. This is general sounds good. However, the precondition on mdspan::operator

Re: [PATCH v2 4/5] libstdc++: Implement mdspan and tests.

On Tue, Jul 1, 2025 at 3:44 PM Luc Grosheintz wrote: > > > On 7/1/25 12:44, Tomasz Kaminski wrote: > > Few initial comments. I will do a full-review with checks against wording > > later today or tomorrow. > > > > On Fri, Jun 27, 2025 at 11:37 AM Luc Grosheintz < > luc.groshei...@gmail.com> > > w

Re: [PATCH] testsuite: i386: Fix gcc.target/i386/preserve-none-1.c on Solaris/x86

On Tue, Jul 1, 2025 at 4:47 PM Rainer Orth wrote: > > The new gcc.target/i386/preserve-none-1.c test currently FAILs on > Solaris/x86: > > FAIL: gcc.target/i386/preserve-none-1.c scan-assembler-not movq > > It needs -fomit-frame-pointer which this patch adds. > > Tested on i386-pc-solaris2.11 and

Re: [PATCH] s390: Add -fno-stack-protector to 3 tests

Hi Jakub, On Tue, Jul 01, 2025 at 02:50:04PM +0200, Jakub Jelinek wrote: > Hi! > > In Fedora/RHEL we usually test with > make check RUNTESTFLAGS="--target_board=unix/'{,-fstack-protector-strong}'" > because -fstack-protector-strong is used when building pretty much all the > packages. > > In the

[PATCH v2] libstdc++: Lift locale initialization in main chrono format loop [PR110739]

This patch lifts locale initialization from locale-specific handling methods into _M_format_to function, and pass the locale by const reference. To avoid unnecessary computation of locale::classic(), we use _Optional_locale, and emplace into it only for localized formatting (_M_spec._M_localized) o

Re: [PATCH RFC] libgcc: don't use a weak ref for __cxa_finalize

* Jason Merrill: > On 6/30/25 5:22 PM, Florian Weimer wrote: >> * Jason Merrill: >> >>> On 6/28/25 3:17 PM, Florian Weimer wrote: * Jason Merrill: > Since r10-6069[1] we control the call to __cxa_finalize with > DEFAULT_USE_CXA_ATEXIT, so there's no need to also declare it as a

[PATCH] i386: Change Diamond Rapids feature detect when model number could not be distinguished

Hi all, We will use AMX-FP8 for DMR since it is a smaller and more unique feature. Ok for trunk and backport to GCC 15? Thx, Haochen gcc/ChangeLog: * config/i386/driver-i386.cc (host_detect_local_cpu): Change to AMX-FP8 for Diamond Rapids. --- gcc/config/i386/driver-i386.cc |

RE: [PATCH] i386: Change Diamond Rapids feature detect when model number could not be distinguished

> -Original Message- > From: Jiang, Haochen > Sent: Wednesday, July 2, 2025 11:10 AM > To: gcc-patches@gcc.gnu.org > Cc: Liu, Hongtao ; ubiz...@gmail.com > Subject: [PATCH] i386: Change Diamond Rapids feature detect when model > number could not be distinguished > > Hi all, > > We wil

[PATCH] RISC-V: testsuite: Skip tests providing -march/-mcpu for ILP32E/ILP64E ABIs

Some test cases explicitly set -march or -mcpu with extensions which are not compatible with the E ABI variants. This leads to spurious errors when toolchain has been configured for RV32E base ISA and ILP32E ABI: cc1: error: ILP32E ABI does not support the 'D' extension Also, test gcc.target/ri

Re: [PATCH 1/1] [RFC][AutoFDO] Propagate information to outline copies if not inlined

On 02/07/25 07:26, Kugan Vivekanandarajah wrote: Given the latest few patches that you have committed, is this patch necessary anymore? I have not fully understood the new logic as I was on holiday last week, but it looks like the propagation is occurring correctly now? I think you are ref

Re: [PATCH] RISC-V: testsuite: Skip tests providing -march/-mcpu for ILP32E/ILP64E ABIs

OK :) On Wed, Jul 2, 2025 at 12:22 PM Dimitar Dimitrov wrote: > > Some test cases explicitly set -march or -mcpu with extensions which > are not compatible with the E ABI variants. This leads to spurious > errors when toolchain has been configured for RV32E base ISA and > ILP32E ABI: > cc1: er

Re: [RFC PATCH v2 3/3] Add -ftarget-clones-table option support

> On 30 Jun 2025, at 17:55, Alfie Richards wrote: > > On 29/06/2025 19:57, Yangyu Chen wrote: >> This patch adds support for target_clones table option. The >> target_clones table option allows users to specify multiple versions >> of a function and select the version at runtime based on the s

[PATCH] check-function-bodies: Support "^[0-9]+:"

While working on https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120881 I tried to use check-function-bodies to verify that 1: call mcount generated by "-pg" is placed at the function entry. Add "^[0-9]+:" to check-function-bodies to allow: 1: call mcount PR testsuite/120881 * lib/scanasm.exp (

[PATCH] tail-call: Allow tail recusion for classes with RVO (TREE_ADDRESSABLE set) [PR120871]

With struct returns, we normally get a decl on the LHS of the call expression that will be tail called and we can match things up there easy. With TREE_ADDRESSABLE set on the type, things get more complex. Instead we get: ``` *_6(D) = get_s (1); [return slot optimization] ... return _6(D); ```

Re: [PATCH 1/1] [RFC][AutoFDO] Propagate information to outline copies if not inlined

> > Given the latest few patches that you have committed, is this patch necessary > anymore? I have not fully understood the new logic as I was on holiday last > week, but it looks like the propagation is occurring correctly now? > I think you are referring to the patch “Avoid some lost AFDO p

[PATCH v2] configury: replace autoconf obsolete macros [PR103459]

Autoreconf -Wall complains about obsolete macros, so replace them according to the autoconf documentation[0]. This patch doesn't fully fix all warnings because I focused on doing simple fixes and keeping the changes to the generated files to a minimum. Bootstrapped and retested on x86_64-linux-gn

Re: [PATCH] configury: replace autoconf obsolete macros [PR/103459]

On Fri, Jun 13, 2025, at 5:01 PM, Joseph Myers wrote: > On Fri, 13 Jun 2025, Pietro Monteiro wrote: > >> > Adding this \ at end of file looks suspect. >> > >> > OK with that ChangeLog entry fixed and the stray \ at end of file removed >> > (assuming the same output files are still generated after

[PATCH] libstdc++: Members missing in std::numeric_limits

Hello libstdc++ Team! I have recently found a bug in libstdc++, that is, the std::numeric_limits<> template specializations for integer-class types are missing some of static data members, which results in compilation errors of valid C++ code: - Compiler Explorer: https://godbolt.org/z/E7z4WYf

Re: [PATCH V1] RISC-V:Add the MIPS P8700 conditional move extension instruction support.

>>Look in contrib/ I think his work is still in there. thank you @Jeff Law ,the check_GNU_style.sh was helpful to fix the indent/spaces issues : ~U On Tue, Jul 1, 2025 at 4:03 AM Jeff Law wrote: > > > On 6/30/25 12:04 AM, Umesh Kalappa wrote: > > Thank you @Jeff Law

[PATCH] c++, v4: Fix up cp_build_array_ref COND_EXPR handling [PR120471]

On Mon, Jun 30, 2025 at 04:56:47PM -0400, Jason Merrill wrote: > On 6/30/25 4:24 PM, Jakub Jelinek wrote: > > On Mon, Jun 30, 2025 at 03:55:46PM -0400, Jason Merrill wrote: > > > Might go with my earlier !TREE_SIDE_EFFECTS && tree_invariant_p > > > suggestion? > > > > If you mean the following, i

Re: [PATCH 1/2] allow contraction to synthetic single-element vector FMA

On Mon, Jun 30, 2025 at 7:05 PM Alexander Monakov wrote: > > > On Mon, 30 Jun 2025, Richard Biener wrote: > > > > * gcc.target/i386/pr116979.c > > > > > > Here we check that FMA is used for complex multiplication. This is a case > > > where use of FMA is detrimental for accuracy, but I guess we ca

[COMMITTED 29/42] ada: Add "continue" GNAT extension

From: Ronan Desplanques This extension adds "continue" as a nonreserved keyword, and this is the first occurrence of a nonreserved keyword in GNAT, which causes this patch to add unusual overload resolution code. New node kinds are introduced, but since they are entirely transformed into existin

[COMMITTED 31/42] ada: Add GNAT LLVM selection in GPR project file.

From: Artur Pietrek gcc/ada/ChangeLog: * doc/gnat_ugn/building_executable_programs_with_gnat.rst: add GNAT LLVM explicit selection in GPR file * gnat_ugn.texi: Regenerate. Tested on x86_64-pc-linux-gnu, committed on master. --- .../doc/gnat_ugn/building_executable_prog

Re: [Fortran, Patch, PR120843, v2] Fix reject valid, because of inconformable coranks

Hi Harald, thanks for the review. Committed as gcc-16-1885-g1b0930e9046. Will backport to gcc-15 in about a week. Thanks again. Regards, Andre On Mon, 30 Jun 2025 22:31:08 +0200 Harald Anlauf wrote: > Am 30.06.25 um 15:25 schrieb Andre Vehreschild: > > Hi all, > > > > here now the v

Re: [PATCH v7 2/9] AArch64: reformat branch instruction rules

Karl Meakin writes: > @@ -729,30 +729,31 @@ (define_expand "cbranch4" > (match_operator 0 "aarch64_comparison_operator" >[(match_operand:GPF_F16 1 "register_operand") > (match_operand:GPF_F16 2 "aarch64_fp_compare_operand")]) > - (label_ref

[COMMITTED 35/42] ada: Warn on untagged record type equality

From: Javier Miranda The frontend reports a warning when no component of an untagged record type U is a record type, and the type C of some of its components has defined its user-defined equality operator "=". The warning is reported because it may be surprising that, following RM 4.5.2 (24/3),

[COMMITTED 38/42] ada: Fix couple of issues in System.Value_D.Integer_To_Decimal function

From: Eric Botcazou The first issue is that the function would wrongly raise Constraint_Error on the edge case where Val = 2**(Int'Size - 1) and Minus is not set. The second issue is that the function takes a long time to deal with huge negative exponents. The change also contains minor consist

[COMMITTED 03/42] ada: Remove wrong optimization in frontend inlining of procedure calls

From: Piotr Trojanek When using obsolete frontend inlining (switch -gnatN), we must always rewrite the procedure call into a single block node. Otherwise, the copy-back of parameters passed by-copy is inserted before the inlined procedure body, which causes wrong code to be generated. gcc/ada/Ch

Re: [PATCH] gcc: middle-end opt for trigonometric pi-based functions builtins

On Sat, Jun 28, 2025 at 02:19:59AM +, Yuao Ma wrote: > > signbit is documented to be a macro, so please don't declare > > int signbit (double); > > function in the testcase and instead of signbit use __builtin_signbit. > > This is indeed my negligence. Done. > > If everything looks good, coul

Re: [PATCH] Fix "void debug (const tree_node *ptr)"

On Tue, Jul 1, 2025 at 2:23 AM H.J. Lu wrote: > > Calling "debug (const tree_node *ptr)" does nothing. Change it to > call debug_tree so that we can do this in gdb: > > (gdb) whatis type > type = const_tree > (gdb) call debug (type) > size bitsizety > pe> constant 32> > unit-size size

Re: [PATCH] aarch64: Sync `aarch64-sys-regs.def' with Binutils.

> On 17 Jun 2025, at 12:19, Kyrylo Tkachov wrote: > > > >> On 4 Apr 2025, at 20:28, ezra.sito...@arm.com wrote: >> >> From: Ezra Sitorus >> >> This patch updates `aarch64-sys-regs.def', bringing it into sync with >> the Binutils source after this change: >> https://sourceware.org/pipermail

Re: [PATCH] tailc: Handle musttail in case of non-cleaned-up cleanups, especially ASan related [PR120608]

On Tue, Jul 01, 2025 at 11:23:48AM +0200, Richard Biener wrote: > > Given that empty_eh_cleanup handles already almost everything, just > > didn't know how to handle the resx to internal step which was quite > > trivial, I thought it will be easier not to reorder cleanup_eh pass, > > especially for

Re: [PATCH] tailc: Handle musttail in case of non-cleaned-up cleanups, especially ASan related [PR120608]

On Tue, 1 Jul 2025, Jakub Jelinek wrote: > On Tue, Jul 01, 2025 at 10:43:09AM +0200, Richard Biener wrote: > > > The following patch fixes that by > > > 1) moving the musttail pass 2 passes earlier (this is mostly just > > >for -O0/-Og, for normal optimization levels musttail calls are > > >

Re: [PATCH v7 8/9] AArch64: rules for CMPBR instructions

Karl Meakin writes: > @@ -763,6 +784,68 @@ (define_expand "cbranchcc4" >"" > ) > > +;; Emit a `CB (register)` or `CB (immediate)` instruction. > +;; The immediate range depends on the comparison code. > +;; Comparisons against immediates outside this range fall back to > +;; CMP + B. > +(de

[committed] testsuite: Fix up pr119318.c test for big-endian [PR120082]

Hi! The test is not endianess clean, x[0] is supposed to be ((__int128)0x19)<<32 on little endian - 0x19 is in the second vector elt - but ((__int128)0x19)<<64 on big endian. I've added also verification of int and __int128 sizes just in case we have say 16-bit or 64-bit int target with __int128

[PATCH] testsuite: i386: Fix gcc.target/i386/preserve-none-1.c on Solaris/x86

The new gcc.target/i386/preserve-none-1.c test currently FAILs on Solaris/x86: FAIL: gcc.target/i386/preserve-none-1.c scan-assembler-not movq It needs -fomit-frame-pointer which this patch adds. Tested on i386-pc-solaris2.11 and x86_64-pc-linux-gnu. Ok for trunk? Rainer -- -

Re: [PATCH] libstdc++: Implement ranges::shift_left/right from P2440R1

On Mon, 30 Jun 2025 at 22:16, Patrick Palka wrote: > > Tested on x86_64-pc-linux-gnu, does this look OK for trunk? > > Btw, any thoughts on PR105611 which reports std::shift_left/right's use > of the three-parameter version of ranges::next (on legacy iterators) is > sketchy? Should we define a th

Re: [PATCH 1/1] libstdc++: Implement default_accessor from mdspan.

On Mon, Jun 30, 2025 at 4:27 PM Jonathan Wakely wrote: > On Mon, 30 Jun 2025 at 11:48, Tomasz Kaminski wrote: > > > > > > > > On Mon, Jun 30, 2025 at 9:58 AM Tomasz Kaminski > wrote: > >> > >> > >> > >> On Mon, Jun 30, 2025 at 9:25 AM Luc Grosheintz < > luc.groshei...@gmail.com> wrote: > >>> >

Re: [PATCH v7 7/9] AArch64: precommit test for CMPBR instructions

Karl Meakin writes: > Commit the test file `cmpbr.c` before rules for generating the new > instructions are added, so that the changes in codegen are more obvious > in the next commit. > > gcc/testsuite/ChangeLog: > > * lib/target-supports.exp: Add `cmpbr` to the list of extensions. >

[COMMITTED 39/42] ada: Disallow underscore before exponent

From: Tonu Naks Underscore is allowed only between digits. The current implementattion was considering 'E' as a digit even if it was not in the range of Base and could denote exponent only. gcc/ada/ChangeLog: * libgnat/s-valuer.adb (Scan_Decimal_Digits, Scan_Integral_Digits): fi

Re: [PATCH] tailc: Handle musttail in case of non-cleaned-up cleanups, especially ASan related [PR120608]

On Tue, Jul 01, 2025 at 10:55:00AM +0200, Jakub Jelinek wrote: > I've actually tried > --- gcc/passes.def2025-06-30 22:16:11.258688529 +0200 > +++ gcc/passes.def2025-07-01 10:47:37.020634803 +0200 > @@ -444,9 +444,9 @@ along with GCC; see the file COPYING3. >NEXT_PASS (pass_lower_switch

[COMMITTED 23/42] ada: use __builtin_alloca for alloca on vxworks

From: Alexandre Oliva Several adaint.c functions call alloca, but vxworks doesn't declare it. Use the GCC builtin. gcc/ada/ChangeLog: * adaint.c [__vxworks] (alloca): Redirect to builtin. Tested on x86_64-pc-linux-gnu, committed on master. --- gcc/ada/adaint.c | 4 1 file chang

Re: [PATCH v3] AArch64 SIMD: convert mvn+shrn into mvni+subhn

Remi Machet writes: > Attached is the updated patch for the aarch64 conversion of some > mvn+shrn patterns into a mvni+subhn. Hopefully attachment fixes the tab > issues, the cover letter was updated to better explain what the patch > does, code was changed to use emit_move_insn, and testcase w

[PING][PATCH v2 0/1] aarch64: Add support for unpacked SVE FP comparisons

Gentle ping for this patch. Thanks, Spencer On Mon, Jun 16, 2025 at 08:13:02PM +, Spencer Abson wrote: > Here is a V2 of patch 04/14 from the unpacked FP patch series [1], with the > changes discussed in that thread applied. The tests are also now based on VLA > codegen. > > Bootstrapped &

Re: [PATCH v2 5/5] libstdc++: Make mdspan nothrow movable.

You're right, I remember checking this; but it appears I conned myself. I've reverted the change to , do you want to keep the tests? On 7/1/25 12:35, Tomasz Kaminski wrote: Hi, I do not think that the change is necessary, as for the functions default on the first declaration (as in the case for

Re: [PATCH v4 2/6] dwarf: create annotation DIEs for btf tags

On Mon, Jun 30, 2025 at 9:12 PM David Faust wrote: > > > > On 6/30/25 06:11, Richard Biener wrote: > >> +static void > >> +gen_btf_decl_tag_dies (tree t, dw_die_ref target, dw_die_ref context_die) > >> +{ > >> + if (t == NULL_TREE || !DECL_P (t) || !target) > >> +return; > >> + > >> + tree a

[COMMITTED 30/42] ada: Small tweak to latest change

From: Eric Botcazou Unlike RTE, RTU_Entity alone does not cause the unit to be loaded. gcc/ada/ChangeLog: * exp_ch7.adb (Shift_Address_For_Descriptor): Add dummy variable to make sure that System_Storage_Elements is loaded. Tested on x86_64-pc-linux-gnu, committed on master. -

[COMMITTED 10/42] ada: Remove dead assignment

From: Eric Botcazou The assignment sets the Etype of a node to itsef. gcc/ada/ChangeLog: * sem_ch4.adb (Analyze_Allocator): Do not set Etype to itself. Tested on x86_64-pc-linux-gnu, committed on master. --- gcc/ada/sem_ch4.adb | 2 -- 1 file changed, 2 deletions(-) diff --git a/gcc

[COMMITTED 15/42] ada: Improve Warning_Treated_As_Error

From: Viljar Indus gcc/ada/ChangeLog: * errout.adb (Error_Msg_Internal): Use the new Warning_Treated_As_Error function. * erroutc.adb (Get_Warning_Option): Add new version of this function that operates on the Error_Msg_Object directly instead of the Error

[COMMITTED 36/42] ada: Fix for compiler crash on function return with Relaxed_Finalization parts

From: Gary Dismukes The compiler crashes on compiling a return statement of a function whose result type has a component whose type is specified with Relaxed_Finalization. The compiler was attempting to retrieve a nonexistent BIP_Collection extra formal from the enclosing function, which may not

[COMMITTED 14/42] ada: Remove Count_Compile_Time_Pragma_Warnings

From: Viljar Indus Use a live counter Compile_Time_Pragma_Warnings to keep track of those messages instead of using a method to count them in the end. gcc/ada/ChangeLog: * atree.ads: Add Compile_Time_Pragma_Warnings for counting compile time warnings. * errout.adb (Initi

[COMMITTED 41/42] ada: Fix ALI elaboration flags for ghost compilation units

From: Piotr Trojanek When GNAT was compiling a ghost unit, the ALI file wrongly suggested that this unit includes elaboration code, which caused linking errors to non-existing elaboration counters. This was because elaboration code is only detected in Gigi, which is skipped for ignored ghost unit

[COMMITTED 27/42] ada: Correct comment in s-valuen.ads

From: Aleksandra Pasek gcc/ada/ChangeLog: * libgnat/s-valuen.ads: Correct comment. Tested on x86_64-pc-linux-gnu, committed on master. --- gcc/ada/libgnat/s-valuen.ads | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/ada/libgnat/s-valuen.ads b/gcc/ada/libgna

[COMMITTED 11/42] ada: Remove spurious warnings about No_Exception_Propagation in GNATprove mode

From: Martin Clochard gcc/ada/ChangeLog: * frontend.adb (Frontend): do not override GNATprove's setting for Warn_On_Non_Local_Exception Tested on x86_64-pc-linux-gnu, committed on master. --- gcc/ada/frontend.adb | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --

[COMMITTED 26/42] ada: include string.h

From: Alexandre Oliva __gnat_install_handler calls strncmp when __HANDLE_VXSIM_SC is defined, so string.h needs to be included, and gcc-14 enforces this requirement. gcc/ada/ChangeLog: * init.c: Include string.h. Tested on x86_64-pc-linux-gnu, committed on master. --- gcc/ada/init.c

[COMMITTED 18/42] ada: Handle Warnings_As_Errors the same way.

From: Viljar Indus There are multiple scenarios where warnings can be turned into errors. However internally they should always be handled the same way and we should not rely on additional counters and variables to handle the different behaviours. These different types of converted warnings have

[COMMITTED 05/42] ada: Small cleanup in the finalization machinery

From: Eric Botcazou The generic finalization machinery and the finalization machinery for transient objects disagree on which controlled objects should be finalized indirectly, i.e. through an access value: the former only considers return objects of (selected) function calls, whereas the latter

[COMMITTED 19/42] ada: Document sanitizers in mixed-language applications

From: Jose Ruiz gcc/ada/ChangeLog: * doc/gnat_ugn/gnat_and_program_execution.rst: Add the documentation about benefits of using sanitizers in mixed-language applications. * gnat_ugn.texi: Regenerate. Tested on x86_64-pc-linux-gnu, committed on master. --- .../g

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