gcc-cvs  

Messages by Date

• 2025/11/10 [gcc r16-5112] c++, libcpp: Implement CWG3053 Jakub Jelinek via Gcc-cvs
• 2025/11/10 [gcc r16-5111] libstdc++: Implement final wording of C++26 P3778R0 - type_order Jakub Jelinek via Gcc-cvs
• 2025/11/09 [gcc r16-5110] libcpp: Improve locations for macros defined prior to PCH include [PR105608] Lewis Hyatt via Gcc-cvs
• 2025/11/09 [gcc r16-5108] apx-ndd-tls-1b.c: Change to xfail for ! ia32 H.J. Lu via Gcc-cvs
• 2025/11/09 [gcc r16-5107] indirect-thunk-(|extern|inline)-(5|6).c: Drop x32 scan H.J. Lu via Gcc-cvs
• 2025/11/09 [gcc r16-5106] gcc.target/i386/cmov12.c: Limit to lp64 H.J. Lu via Gcc-cvs
• 2025/11/09 [gcc r16-5105] Regenerate libgfortran Makefile.in and aclocal.m4 Mark Wielaard via Gcc-cvs
• 2025/11/09 [gcc r16-5104] Fix typo Eric Botcazou via Gcc-cvs
• 2025/11/09 [gcc r16-5103] gcc.target/i386/shrink_wrap_1.c: Limit to lp64 H.J. Lu via Gcc-cvs
• 2025/11/09 [gcc r16-5102] gcc.dg/pr90838.c: Adjust for x32 H.J. Lu via Gcc-cvs
• 2025/11/08 [gcc r16-5100] Ada: Fix bogus error on limited with clause and private parent package Eric Botcazou via Gcc-cvs
• 2025/11/08 [gcc r16-5099] [RISC-V] Add testcase for shifted truthvalue Jeff Law via Gcc-cvs
• 2025/11/08 [gcc r16-5098] Fortran: F2018 extensions to interoperability of procedures [PR113338] Harald Anlauf via Gcc-cvs
• 2025/11/08 [gcc r16-5097] isel: Check bounds before converting VIEW_CONVERT to VEC_SET. Avinash Jayakar via Gcc-cvs
• 2025/11/08 [gcc(refs/users/meissner/heads/work224-dmf)] Update ChangeLog.* Michael Meissner via Gcc-cvs
• 2025/11/08 [gcc(refs/users/meissner/heads/work224-dmf)] Use vector pair load/store for memcpy with -mcpu=future Michael Meissner via Gcc-cvs
• 2025/11/07 [gcc r16-5096] LoongArch: Fix PR122097 (2). LuluCheng via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vsext.vf2 and vsll.vi to vwsll.vi on ZVBB Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwmaccu.vv combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: RISC-V: Combine vec_duplicate + vwmaccu.vv to vwmaccu.vx on GR2VR cost Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Ignore useless zero-initialization in conditional move sequence costing Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR 121136] Improve various tests which only need to examine upper bits in a GPR Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Fix pr119115.c. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/122536] Fix guard against variable bit extracts in RTL simplifier Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix the ABI of empty unions and zero length array in struct Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR tree-optimization/52345] Optimize testing multiple booleans Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Expose sign extension for 32 bit rotates by constant values on rv64 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: Drop junk vim backup file Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][SH][PR rtl-optimization/67731] Improve logical IOR of single bit bitfields Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] niter: Use ranger to query ctz range. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Reorder ready queue slightly to avoid unnecessary vsetvl instructions Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: avlprop: Scale AVL by subreg ratio [PR122445]. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Clean up build warnings for VLS calling convention Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Skip riscv/rvv/xtheadvector/pr116593.C if not hostedlib Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Implement standard fixed-length vector calling convention variant Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/64345][PR tree-optimization/80770] Improve simple bit extractions on RISC-V Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Increase NUM_ABI_IDS to support RISC-V VLS calling convention variants Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Fix moving data from V_REGS to GR_REGS by scalar move. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix minor RISC-V testsuite failure Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for unsigned scalar SAT_MUL form 6 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix minor testsuite scan failures for RISC-V Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v3] RISC-V: Implement RISC-V profile macro support Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix incorrect op of vwaddu/vwsubu wx combine Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120811] Improving address reloads in LRA Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/119587] RISC-V: xtheadmemidx: Split slli.uw pattern Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve subword atomic patterns in sync.md Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwsubu.wv combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwsubu.wv to vwsubu.wx on GR2VR cost Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow VLS types using up to LMUL 8 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Fix slide pattern recognition [PR122124] Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwaddu.wv to vwaddu.wx on GR2VR cost Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ISC-V: Add test for vec_duplicate + vwaddu.wv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fixup merge conflict Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Fix type of CFA during stack probe [PR122114] Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122147] Avoid creating (subreg (mem)) in RISC-V port Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/118945][PATCH v3] RISC-V: Add 'prefer_agnostic' tune parameter for vector policies Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR rtl-optimization/121937] Don't call neg_poly_int_rtx with a vector mode Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122051] Fix pmode_reg_or_uimm5_operand for thead vector Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122106] Add missing predicate on crc expanders Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH][PR target/121778] RISC-V: Improve rotation detection for RISC-V Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for mul Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add missing define_insn_reservation to tt-ascalon-d8.md [PR121982] Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Improve slide patterns recognition Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121983] Fix unprotected REGNO invocation Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Only Save/Restore required registers for ILP32E/LP64E Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Optimize clear-lowest-set-bit sequence when ctz is nearby Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Correct lmul estimation Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for widen-mul Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwmulu.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR tree-optimization/58727] Don't over-simplify constants` Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwsubu.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwaddu.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwaddu.vv to vwaddu.vx on GR2VR cost Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow profiles input in '--with-arch' option. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Configure Profiles definitions in the definition file. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Imply zicsr for sdtrig and ssstrict extensions. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Widening-Mul: Refine build_and_insert_cast when rhs is cast Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix vendor intrinsic tests for disabled multilib configurations Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support vnclip idiom testcase [PR120378] Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Match: Support SAT_TRUNC variant NARROW_CLIP Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Adjust ABI specification in recently added Andes tests Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Suppress cross CC sibcall optimization from vector Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add min/max patterns for ifcvt. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Clarify if_info.original_cost. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix can_find_related_mode_p for VLS types Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix typo in tt-ascalon-d8's pipeline description [PR121878] Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single widening floating-point sub Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar dual widening floating-point sub Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single widening floating-point add Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar widening floating-point add Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust tt-ascalon-d8 branch cost Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point reverse sub Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point sub Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point add Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar widening floating-point multiply Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar IEEE floating-point max Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvdot ISA extension. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: introduce the dep_fusion pass Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvpackfph ISA extension. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix ordering of pipeline models Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsub.vv unsigned combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsub.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] dep_fusion: Fix if target does not have macro fusion [PR121835] Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vnmsub.vv to vnmsub.vx on GR2VR cost Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: introduce the dep_fusion pass Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvsintload ISA extension. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvbfhcvt ISA extension. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add tt-ascalon-d8 pipeline description Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Adjust recently added test Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmadd.vv to vmadd.vx on GR2VR cost Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow errors to be suppressed when parsing architectures Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust the vmacc.vx combine test cases Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmadd.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmadd.vv unsigned combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix extension subset check in riscv_can_inline_p Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesperf ISA extension. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesbfhcvt ISA extension. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add basic XAndes vendor extension support. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121213] Avoid unnecessary sign extension in amoswap sequence Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix is_vlmax_len_p and use for strided ops. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Zbb extension sext testcase. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update Zba 'shNadd.uw' testcase.` Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove unused print_ext_doc_entry function [NFC] Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve initial RTL generation for SImode adds on rv64 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case for unsigned scalar SAT_MUL form 4 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar IEEE floating-point min Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsac.vv unsigned combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsac.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vnmsac.vv to vnmsac.vx on GR2VR cost Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar floating-point min Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Remove xfail marker on RISC-V test Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Fix vf_vfmul and vf_vfrdiv Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] More RISC-V testsuite hygiene Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed] RISC-V Testsuite hygiene Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Add pattern for reverse floating-point divide Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Add pattern for vector-scalar single-width floating-point multiply Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix RISC-V bootstrap Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmacc.vv unsigned combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmacc.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix invalid right shift count with recent ifcvt changes Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmacc.vv to vmacc.vx on GR2VR cost Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Replace deprecated FUNCTION_VALUE/LIBCALL_VALUE macros with target hooks Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/120553] Improve selecting between constants based on sign bit test Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for scalar unsigned SAT_MUL form 3 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Fix DejaGnu support for riscv_zvfh Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ira: tie output allocnos for fused instruction pairs Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/121213] Avoid unnecessary constant load in amoswap Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] regrename: treat writes as reads for fused instruction pairs Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Fix block matching in arch-canonicalize [PR121538] Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update the comments of vx combine [NFC] Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add missed DONE for vx combine pattern [NFC] Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: MIPS prefetch extensions for MIPS RV64 P8700 and can be enabled with xmipscbop. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/119275][RISC-V] Avoid calling gen_lowpart in cases where it would ICE Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121160] Avoid bogus force_reg call Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121531] Cover missing insn types in p400 and p600 scheduler models Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: RISC-V: Add test for vec_duplicate + vmerge.vvm combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121113] Handle HFmode in various insn reservations Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmerge.vv to vmerge.vx on GR2VR cost Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Expand const_vector with 2 elts per pattern. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Improve initial code generation for addsi/adddi Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for scalar unsigned SAT_MUL form 2 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Don't run tests requiring "B" on designs without "B" Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refactor the vec_duplicate cost on gpr/fpr2vr-cost param Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Read extension data from riscv-ext*.def for arch-canonicalize Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix scalar code-gen of unsigned SAT_MUL Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support -march=unset Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for signed avg ceil vx combine Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adding H to the canonical order [PR121312] Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for unsigned avg ceil vx combine. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Generate -mcpu and -mtune options from riscv-cores.def. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove use of structured binding to fix compiler warning Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test cases for mul based unsigned scalar SAT_MUL Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaadd.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case for vaadd.vx combine polluting VXRM Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vaadd.vv to vaadd.vx on GR2VR cost Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaadd.vv combine case 0 with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix another vf FP16 combine run test failures Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: riscv-ext.def: Add allocated group IDs and group bit positions Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Prepare dynamic LMUL heuristic for SLP. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for resumable non-maskable interrupt (RNMI) handlers Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove user-level interrupts Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] riscv: testsuite: Fix misalignment check. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case for vx combine polluting VXRM Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Avoid vaaddu.vx combine pattern pollute VXRM csr Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rework broadcast handling [PR121073]. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Fix vx_vf_*run-1-f16.c run tests. Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Change bellow in comments to below Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Restrict generic-vector-ooo DFA Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add missing insn types to xiangshan.md and mips-p8700.md Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaaddu.vv combine for DImode Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow VLS DImode for sat_op vx DImode pattern Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaaddu.vv combine case 1 with GR2VR cost 0, 1 and 2 for QI, HI Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaaddu.vv combine case 0 with GR2VR cost 0, 2 and 15 for QI, HI Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vaaddu.vv to vaaddu.vx on GR2VR cost for HI, QI and SI mode Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for unsigned scalar SAT_ADD form 8 and form 9 Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refine the test case for vector avg_floor and avg_ceil [NFC] Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add ashiftrt operand 2 for vector avg_floor and avg_ceil Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Vector-scalar widening negate-multiply-(subtract-)accumulate [PR119100] Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: prevent NULL_RTX dereference in riscv_macro_fusion_pair_p () Jeff Law via Gcc-cvs
• 2025/11/07 [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RVVDImode for avg3_ceil auto vect Jeff Law via Gcc-cvs

• Earlier messages
• Later messages