https://gcc.gnu.org/g:3fd638a9e5497dfdf00f1783d6e704af03fb44b0
commit r16-2099-g3fd638a9e5497dfdf00f1783d6e704af03fb44b0 Author: Andreas Schwab <sch...@suse.de> Date: Tue Jul 8 07:32:17 2025 -0600 [PATCH] riscv: allow zero in zacas subword atomic cas gcc: PR target/120995 * config/riscv/sync.md (zacas_atomic_cas_value_strong<mode>): Allow op3 to be zero. gcc/testsuite: PR target/120995 * gcc.target/riscv/amo/zabha-zacas-atomic-cas.c: New test. Diff: --- gcc/config/riscv/sync.md | 2 +- gcc/testsuite/gcc.target/riscv/amo/zabha-zacas-atomic-cas.c | 11 +++++++++++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md index a75ea6834e46..50ec8b38f723 100644 --- a/gcc/config/riscv/sync.md +++ b/gcc/config/riscv/sync.md @@ -627,7 +627,7 @@ (match_operand:SHORT 1 "memory_operand" "+A")) ;; memory (set (match_dup 1) (unspec_volatile:SHORT [(match_operand:SHORT 2 "register_operand" "0") ;; expected_val - (match_operand:SHORT 3 "register_operand" "rJ") ;; desired_val + (match_operand:SHORT 3 "reg_or_0_operand" "rJ") ;; desired_val (match_operand:SI 4 "const_int_operand") ;; mod_s (match_operand:SI 5 "const_int_operand")] ;; mod_f UNSPEC_COMPARE_AND_SWAP))] diff --git a/gcc/testsuite/gcc.target/riscv/amo/zabha-zacas-atomic-cas.c b/gcc/testsuite/gcc.target/riscv/amo/zabha-zacas-atomic-cas.c new file mode 100644 index 000000000000..d3d84fd30882 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/amo/zabha-zacas-atomic-cas.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* PR target/120995 ICE unrecognized subword atomic cas */ +/* { dg-options "-O" } */ +/* { dg-add-options riscv_zacas } */ +/* { dg-add-options riscv_zabha } */ + +_Bool b; +void atomic_bool_cmpxchg() +{ + __sync_bool_compare_and_swap(&b, 1, 0); +}