Re: [PATCH v1 1/3] Match: Support form 7 for unsigned integer SAT_ADD

2025-05-11 Thread Richard Biener
On Mon, Apr 28, 2025 at 3:35 PM wrote: > > From: Pan Li > > This patch would like to support the form 7 of the unsigned > integer SAT_ADD, aka below example. > > #define DEF_SAT_U_ADD_FMT_7(WT, T) \ > T __attribute__((noinline))\ > sat_u_add_##WT##_##T##_fmt_7(T x, T y) \ >

Re: [PATCH v1 3/4] Match: Refactor the signed SAT_* match for saturated value [NFC]

2025-05-11 Thread Richard Biener
On Thu, Dec 12, 2024 at 9:45 AM wrote: > > From: Pan Li > > This patch would like to refactor the all signed SAT_* patterns for > the saturated value. Aka, overflow to INT_MAX when > 0 and downflow > to INT_MIN when < 0. Thus, we can remove sorts of duplicated expression > in different patterns

Re: [PATCH v1 4/4] Match: Update the comments for indicating SAT_* pattern

2025-05-11 Thread Richard Biener
On Thu, Dec 12, 2024 at 9:45 AM wrote: > > From: Pan Li > > Given the SAT_* patterns are grouped for each alu and signed or not, > add leading comments to indicate the beginning of the pattern. OK. > gcc/ChangeLog: > > * match.pd: Update comments for sat_* pattern. > > Signed-off-by: Pa

Re: [PATCH v1 2/4] Match: Refactor the signed SAT_TRUNC match patterns [NFC]

2025-05-11 Thread Richard Biener
On Thu, Dec 12, 2024 at 9:45 AM wrote: > > From: Pan Li > > This patch would like to refactor the all signed SAT_TRUNC patterns, > aka: > * Extract type check outside. > * Re-arrange the related match pattern forms together. > > The below test suites are passed for this patch. > * The rv64gcv ful

Re: [PATCH] x86: Remove df_insn_rescan after emit_insn_*

2025-05-11 Thread Uros Bizjak
On Mon, May 12, 2025 at 8:19 AM H.J. Lu wrote: > > Since df_insn_rescan has been called by emit_insn_*, there is no need > to call it after calling emit_insn_*. Remove its unnecessary usages. > > PR target/120228 > * config/i386/i386-features.cc (ix86_place_single_vector_set): > Remove df_insn_re

[PATCH] fortran, v2: Fix up minloc/maxloc lowering [PR120191]

2025-05-11 Thread Jakub Jelinek
On Sat, May 10, 2025 at 11:21:19AM +0200, Tobias Burnus wrote: > Namely: Similar to above, we should be able to just do: > >    if (dim_arg->expr) > > I think the comment should be also updated and we > can also get rid of the 'actual' variable for cleanup. > > Namely, something like the followi

[PATCH] x86: Remove df_insn_rescan after emit_insn_*

2025-05-11 Thread H.J. Lu
Since df_insn_rescan has been called by emit_insn_*, there is no need to call it after calling emit_insn_*. Remove its unnecessary usages. PR target/120228 * config/i386/i386-features.cc (ix86_place_single_vector_set): Remove df_insn_rescan after emit_insn_*. (remove_partial_avx_dependency): Like

Re: [PATCH] libstdc++: Make dg-require-namedlocale work for more targets [PR65909]

2025-05-11 Thread Tomasz Kaminski
On Thu, May 8, 2025 at 4:22 PM Jonathan Wakely wrote: > As noted in the PR, some embedded targets do not support command-line > arguments, which means that the dg-require-namedlocale check always > fails. Use Sandra's suggestion of hardcoding the argument into the > executable instead of passing

Re: [PATCH 61/61] Fix pr54240

2025-05-11 Thread Andrew Pinski
On Mon, Feb 3, 2025 at 1:46 AM Richard Biener wrote: > > On Fri, Jan 31, 2025 at 7:18 PM Aleksandar Rakic > wrote: > > > > From: Chao-ying Fu > > OK Pushed as r16-533 with a slightly reworded commit message that references the fix for the powerpc testcase: ``` Fix mips pr54240 testcase Like r9

Re: [PATCH 0/6] RISC-V: frm state-machine improvements

2025-05-11 Thread 钟居哲
Hi, vineet. >> I have a feeling this has to do with following: >> https://godbolt.org/z/Px9es7j1r I saw in there are 2 fsrm instruction inside the main loop in Clang generated ASM which I think GCC is better. Correct me if I am wrong. Thanks. juzhe.zh...@rivai.ai From: Vineet Gupta Date: 2

Re: [PATCH v3] Consider frequency in cost estimation when converting scalar to vector.

2025-05-11 Thread Hongtao Liu
On Thu, May 8, 2025 at 2:40 PM liuhongt wrote: > > The only part I changed is related to size_cost of sse_to_ineteger, as below > > 114+ /* Under TARGET_SSE4_1, it's vmovd + vpextrd/vpinsrd. > 115+ W/o it, it's movd + psrlq/unpckldq + movd. */ > 116+ else if (!TARGET_64BIT && smode != SImod

[PATCH v1 5/7] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 0

2025-05-11 Thread pan2 . li
From: Pan Li Add asm dump check test for vec_duplicate + vsub.vv combine to vsub.vx. The below test suites are passed for this patch. * The rv64gcv fully regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-4-i16.c: New test. * gcc.target/riscv

[PATCH v1 7/7] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 2

2025-05-11 Thread pan2 . li
From: Pan Li Add asm dump check test for vec_duplicate + vsub.vv combine to vsub.vx. The below test suites are passed for this patch. * The rv64gcv fully regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-6-i16.c: New test. * gcc.target/riscv

[PATCH v1 2/7] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 0

2025-05-11 Thread pan2 . li
From: Pan Li Add asm dump check and run test for vec_duplicate + vsub.vv combine to vsub.vx. The below test suites are passed for this patch. * The rv64gcv fully regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test data for v

[PATCH v1 4/7] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 15

2025-05-11 Thread pan2 . li
From: Pan Li Add asm dump check test for vec_duplicate + vsub.vv combine to vsub.vx. The below test suites are passed for this patch. * The rv64gcv fully regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-3-i16.c: New test. * gcc.target/riscv

[PATCH v1 6/7] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 1

2025-05-11 Thread pan2 . li
From: Pan Li Add asm dump check test for vec_duplicate + vsub.vv combine to vsub.vx. The below test suites are passed for this patch. * The rv64gcv fully regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-5-i16.c: New test. * gcc.target/riscv

[PATCH v1 3/7] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 1

2025-05-11 Thread pan2 . li
From: Pan Li Add asm dump check test for vec_duplicate + vsub.vv combine to vsub.vx The below test suites are passed for this patch. * The rv64gcv fully regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-2-i16.c: New test. * gcc.target/riscv/

[PATCH v1 0/7] RISC-V: Combine vec_duplicate + vsub.vv to vsub.vx on GR2VR cost

2025-05-11 Thread pan2 . li
From: Pan Li This patch would like to introduce the combine of vec_dup + vsub.vv into vsub.vx on the cost value of GR2VR. The late-combine will take place if the cost of GR2VR is zero, or reject the combine if non-zero like 1, 15 in test. There will be two cases for the combine: Case 0: | .

[PATCH v1 1/7] RISC-V: Combine vec_duplicate + vsub.vv to vsub.vx on GR2VR cost

2025-05-11 Thread pan2 . li
From: Pan Li This patch would like to combine the vec_duplicate + vsub.vv to the vsub.vx. From example as below code. The related pattern will depend on the cost of vec_duplicate from GR2VR. Then the late-combine will take action if the cost of GR2VR is zero, and reject the combination if the

Re: [PATCH] hurd: Add OPTION_GLIBC_P and OPTION_GLIBC

2025-05-11 Thread Samuel Thibault
Hello, Are there any news on this? Samuel Samuel Thibault, le lun. 10 févr. 2025 23:08:35 +0100, a ecrit: > Hello, > > Are there any news on this? > > Samuel > > Samuel Thibault, le jeu. 02 janv. 2025 16:33:43 +0100, a ecrit: > > From: Svante Signell > > > > GNU/Hurd uses glibc just like GN

Re: [PATCH] c++: Add attribute handles_virtual_move_assign

2025-05-11 Thread Owen Avery
Yeah, that looks way simpler. Should I add you as co-author on the patch? On 4/28/25 22:13, Jason Merrill wrote: On 4/28/25 5:07 PM, Owen Avery wrote: As far as I can tell, that would need to be applied to every class which virtually inherits from such a base class, rather than just the base c

[COMMITTED] testsuite: xtensa: add support for effective_target_sync_*

2025-05-11 Thread Max Filippov
Add new function check_effective_target_xtensa_atomic and use it in the check_effective_target_sync_int_long and check_effective_target_sync_char_short. gcc/testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_xtensa_atomic): New function. (check_effectiv

Re: [PATCH v3] xtensa: Fix up unwanted spills of SFmode hard registers holding function arguments/returns

2025-05-11 Thread Max Filippov
On Sat, May 10, 2025 at 12:51 PM Takayuki 'January June' Suwa wrote: > > Until now (presumably after transition to LRA), hard registers storing > function arguments or return values were spilling undesirably when > TARGET_HARD_FLOAT is enabled. > > /* example */ > float test0(float a, fl

[committed] cobol: Eliminate padding bytes from cbl_declarative_t.

2025-05-11 Thread Robert Dubner
>From 1e4dee2dae0ad08fecb50dcced3d00c6cfffd932 Mon Sep 17 00:00:00 2001 From: Robert Dubner mailto:rdub...@symas.com Date: Sun, 11 May 2025 13:43:32 -0400 Subject: [PATCH] cobol: Eliminate padding bytes from cbl_declarative_t. [PR119377] By changing the type of a variable in the cbl_declarative_t

Re: [PATCH] fortran: map atand(y, x) to atan2d(y, x)

2025-05-11 Thread Tobias Burnus
Hi all, hi Yuao, first, thanks for your patch - you are awesome! I believe it fixes the issue reported by Steven in problem report (PR) 113414, https://gcc.gnu.org/PR113413 Thus: * * * [Linking PR numbers] In order to correlate commits to issued (and get them automatically linked), the commit

[PATCH] fortran: map atand(y, x) to atan2d(y, x)

2025-05-11 Thread Yuao Ma
Hi all, According to the Fortran standard, atand(y, x) is equivalent to atan2d(y, x). However, the current atand(y, x) function produces an error. This patch includes the necessary intrinsic mapping, related test, and intrinsic documentation. The minor comment change in intrinsic.cc is cherry-pick

[PATCH v20 3/4] c: Add

2025-05-11 Thread Alejandro Colomar
gcc/ChangeLog: * Makefile.in (USER_H): Add . * ginclude/stdcountof.h: Add countof macro. Signed-off-by: Alejandro Colomar --- gcc/Makefile.in | 1 + gcc/ginclude/stdcountof.h | 31 +++ 2 files changed, 32 insertions(+) create mode 100644 g

[PATCH v20 4/4] c: Add -Wpedantic diagnostic for _Countof

2025-05-11 Thread Alejandro Colomar
It is not supported in <= C23 mode. gcc/c/ChangeLog: * c-parser.cc (c_parser_sizeof_or_countof_expression): Add -Wpedantic diagnostic for _Countof in <= C23 mode. Signed-off-by: Alejandro Colomar --- gcc/c/c-parser.cc | 4 1 file changed, 4 insertions(+) diff --git a/gcc/

[PATCH v20 2/4] c: Add _Countof operator

2025-05-11 Thread Alejandro Colomar
This operator is similar to sizeof but can only be applied to an array, and returns its number of elements. FUTURE DIRECTIONS: - We should make it work with array parameters to functions, and somehow magically return the number of elements of the array, regardless of it being really a poin

[PATCH v20 1/4] contrib/: Add support for Link: tags

2025-05-11 Thread Alejandro Colomar
contrib/ChangeLog: * gcc-changelog/git_commit.py (GitCommit): Add support for 'Link:' tags. Cc: Jason Merrill Signed-off-by: Alejandro Colomar --- contrib/gcc-changelog/git_commit.py | 3 +++ 1 file changed, 3 insertions(+) diff --git a/contrib/gcc-changelog/git_commit.py b/c

[PATCH v20 0/4] c: Add _Countof and

2025-05-11 Thread Alejandro Colomar
Hi, Here's the list of changes in v20: - Drop changes to support Cc tags in commit messages (but keep the patch to add support for Link tags). - Drop the Cc tags from commit 2 (but keep Link tags). - Remove one _Static_assert() from tests. I think the test is more readable without it. -

[committed] cobol: New testcases.

2025-05-11 Thread Robert Dubner
cobol: New testcases. Eighty-six testcases extracted from the run_move and run_misc COBOLworx testsuite. gcc/testsuite/ChangeLog: * cobol.dg/group2/258_Nested_PERFORM.cob: New testcase. * cobol.dg/group2/259_PERFORM_VARYING_BY_-0.2.cob: Likewise.

[PATCH] tree-optimization/120211 - constrain LOOP_VINFO_EARLY_BREAKS_LIVE_IVS more

2025-05-11 Thread Richard Biener
The PR120089 fix added more PHIs to LOOP_VINFO_EARLY_BREAKS_LIVE_IVS but not checking that we only add PHIs with a latch argument. The following adds this missing check. Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed. PR tree-optimization/120211 * tree-vect-stmts.cc

Re: [PATCH v1] libstdc++: More efficient weekday from year_month_day.

2025-05-11 Thread Cassio Neri
Hi all, After reflecting on my previous message and Andrew's, I now believe this patch is not the best solution to optimise the day of the week. Instead, the optimisation for n % 7 should be done by the compiler depending on the platform. I'll open a missing optimisation opportunity bug report ag

Re: i386: Fix some problems in stv cost model

2025-05-11 Thread Richard Biener
> Am 10.05.2025 um 22:28 schrieb Jan Hubicka : > > Hi, > this patch fixes some of problems with cosint in scalar to vector pass. > In particular > 1) the pass uses optimize_insn_for_size which is intended to be used by >expanders and splitters and requires the optimization pass to use >