[PATCH] D127050: [Clang][FP16] Add 4 builtins for _Float16

This revision was automatically updated to reflect the committed changes. Closed by commit rG52818fd97f0f: [Clang][FP16] Add 4 builtins for _Float16 (authored by pengfei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D127050/new/ https://reviews.llv

[PATCH] D107082: [X86][RFC] Enable `_Float16` type support on X86 following the psABI

pengfei added inline comments. Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:616 +setOperationAction(ISD::FROUNDEVEN, MVT::f16, Promote); +setOperationAction(ISD::FP_ROUND, MVT::f16, Expand); +setOperationAction(ISD::FP_EXTEND, MVT::f32, Expand); ---

[PATCH] D107082: [X86][RFC] Enable `_Float16` type support on X86 following the psABI

pengfei updated this revision to Diff 435151. pengfei marked 3 inline comments as done. pengfei added a comment. Address Yuanke's comments. Thanks! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D107082/new/ https://reviews.llvm.org/D107082 Files:

[PATCH] D107082: [X86][RFC] Enable `_Float16` type support on X86 following the psABI

pengfei updated this revision to Diff 435583. pengfei marked an inline comment as done. pengfei added a comment. Address Yuanke's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D107082/new/ https://reviews.llvm.org/D107082 Files: llvm/do

[PATCH] D107082: [X86][RFC] Enable `_Float16` type support on X86 following the psABI

pengfei added inline comments. Comment at: llvm/test/Analysis/CostModel/X86/fptoi_sat.ll:852 +; SSE2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %f16u1 = call i1 @llvm.fptoui.sat.i1.f16(half undef) +; SSE2-NEXT: Cost Model: Found an estimated cost of 5 for

[PATCH] D127409: Fix GCC intrinsics "round_mask" names

pengfei requested changes to this revision. pengfei added a comment. This revision now requires changes to proceed. We had a discussion about the builtins between GCC and Clang on D109658 last year. We tried to make sure the same builtins have the same argument

[PATCH] D155148: [X86] Add SM4 instructions.

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. In D155148#4510472 , @RKSimon wrote: > @pengfei Are you happy with the intrinsics doxygen descriptions? LGTM except for one comment.

[PATCH] D155147: [X86] Add SM3 instructions.

pengfei added inline comments. Comment at: clang/lib/Headers/sm3intrin.h:28 +/// \code +/// _mm_sm3msg1_epi32(__m128i __A, __m128i __B, __m128i __C) +/// \endcode Add return type too. Comment at: clang/lib/Headers/sm3intrin.h:85 +/// \code +///

[PATCH] D155147: [X86] Add SM3 instructions.

pengfei added inline comments. Comment at: clang/lib/Headers/sm3intrin.h:69 +/// dst.dword[2] := P1(TMP2) +/// dst.dword[3] := P1(TMP3) +/// \endcode `DEST[MAX:128] := 0` the same to below. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION http

[PATCH] D155147: [X86] Add SM3 instructions.

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155147/new/ https://reviews.llvm.org/D155147

[PATCH] D155147: [X86] Add SM3 instructions.

pengfei added inline comments. Comment at: clang/lib/Headers/sm3intrin.h:161-164 +/// \param imm8 +///A 128-bit vector of [4 x int]. +/// \returns +///A 32-bit int. The description should invert Repository: rG LLVM Github Monorepo CHANGES SINCE LAST

[PATCH] D155147: [X86] Add SM3 instructions.

pengfei added inline comments. Comment at: clang/lib/Headers/sm3intrin.h:162 +/// \param imm8 +///A 128-bit vector of [4 x int]. +/// \returns This is `int` Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155147/

[PATCH] D86310: [X86] Align i128 to 16 bytes in x86 datalayouts

pengfei added a comment. Just FYI. There are a few reports about the compatibility issues, e.g., #41784 . There's also concern about the alignment difference between `_BitInt(128)` and `__int128`, see #60925

[PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155145/new/ https://reviews.llvm.org/D155145

[PATCH] D155784: [X86] Update features for sierraforest, grandridge

pengfei added inline comments. Comment at: clang/test/Preprocessor/predefined-arch-macros.c:2496 // CHECK_SRF_M32: #define __PTWRITE__ 1 +// CHECK_GRR_M32: #define __RAOINT__ 1 // CHECK_SRF_M32: #define __RDPID__ 1 This is easy to be confused. How about add a n

[PATCH] D155859: [Headers][doc] Add misc non-AVX2 intrinsic descriptions

pengfei added inline comments. Comment at: clang/lib/Headers/rdseedintrin.h:56 +/// ELSE +/// Store16(__p, 0) +/// result := 0 32 Comment at: clang/lib/Headers/rdseedintrin.h:84 +/// ELSE +/// Store16(__p, 0) +/// result := 0 --

[PATCH] D155861: [Headers][doc] Add SHA1/SHA256 intrinsic descriptions

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155861/new/ https://reviews.llvm.org/D155861 ___ cfe-commits mailing list cfe-commit

[PATCH] D155798: [X86] Support -march=graniterapids-d and update -march=graniterapids

pengfei added inline comments. Comment at: clang/test/Preprocessor/predefined-arch-macros.c:1925 // CHECK_GNR_M64: #define __AMX_BF16__ 1 -// CHECK_GNR_M64: #define __AMX_COMPLEX__ 1 +// CHECK_GNR_M64-NOT: #define __AMX_COMPLEX__ 1 +// CHECK_GNRD_M64: #define __AMX_COMPLEX__ 1 -

cfe-commits@lists.llvm.org

pengfei added inline comments. Comment at: clang/lib/Driver/ToolChains/Clang.cpp:7897-7899 + if (Args.hasArg(options::OPT_regcall4)) { +CmdArgs.push_back("-regcall4"); + } Remove parentheses Comment at: clang/lib/Driver/ToolChains/Clang.c

cfe-commits@lists.llvm.org

pengfei added inline comments. Comment at: llvm/lib/Target/X86/X86CallingConv.td:98-103 +def RC_X86_64_RegCallv4_Win : RC_X86_64_RegCall { + let GPR_8 = [AL, CL, DL, DIL, SIL, R8B, R9B, R11B, R12B, R14B, R15B]; + let GPR_16 = [AX, CX, DX, DI, SI, R8W, R9W, R11W, R12W, R14W, R15

[PATCH] D155798: [X86] Support -march=graniterapids-d and update -march=graniterapids

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM, but please wait one or two days for other reviewers. Comment at: llvm/lib/TargetParser/X86TargetParser.cpp:430 // Granite Rapids microarchitecture based processors

[PATCH] D156239: [X86] Support -march=arrowlake, arrowlake-s, lunarlake

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Comment at: llvm/lib/Target/X86/X86.td:1730 +ProcessorFeatures.SRFFeatures, ProcessorFeatures.ADLTuning>; +foreach P = ["arrowlake-s", "arrowlake_s"]

[PATCH] D157485: [X86][RFC] Support new feature AVX10

pengfei added inline comments. Comment at: clang/lib/Basic/Targets/X86.h:99 + bool HasAVX10_1 = false; + bool HasAVX10_512BIT = false; bool HasAVX512CD = false; goldstein.w.n wrote: > Maybe should be HasAVX10_1_512? As brought up the rfc, there might be an

[PATCH] D157566: [SEH] fix assertion when -fasy-exceptions is used.

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157566/new/ https://reviews.llvm.org/D157566

[PATCH] D157680: [X86]Support options -mno-gather -mno-scatter

pengfei added inline comments. Comment at: clang/include/clang/Driver/Options.td:903-906 +def mno_gather : Flag<["-"], "mno-gather">, Flags<[NoXarchOption]>, + HelpText<"Disable generation of gather instructions in auto-vectorization(x86 only)">; +def mno_scatter

[PATCH] D157680: [X86]Support options -mno-gather -mno-scatter

pengfei added inline comments. Comment at: llvm/lib/Target/X86/X86.td:437 +: SubtargetFeature<"prefer-no-gather", "PreferGather", "false", + "Indicates if gather prefer to be disabled">; +def FeaturePreferNoScatter XinWang10 wrote: > ska

[PATCH] D157297: [clang] Fixes compile error like error: expected unqualified-id for ::_tzcnt_u32(mask);

pengfei added a comment. In D157297#4583802 , @lygstate wrote: > In D157297#4571572 , @pengfei wrote: > >> The description is not clear to me. You should describe the reason rather >> than phenomenon. >> >> My un

[PATCH] D157297: [clang] Fixes compile error that double colon operator cannot resolve macro with parentheses.

pengfei added a comment. I'd prefer macro to duplicated definitions. We have such precedents, e.g., https://github.com/llvm/llvm-project/blob/main/clang/lib/Headers/xmmintrin.h#L2994 Besides, you should update the summary as well. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157297/new

[PATCH] D157297: [clang] Fixes compile error that double colon operator cannot resolve macro with parentheses.

pengfei added a comment. In D157297#4590692 , @lygstate wrote: > In D157297#4590580 , @pengfei wrote: > >> > > > >> I'd prefer macro to duplicated definitions. We have such precedents, e.g., >> https://github.co

[PATCH] D157297: [clang] Fixes compile error that double colon operator cannot resolve macro with parentheses.

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157297/new/ https://reviews.llvm.org/D157297 ___ cfe-commits mailing list cfe-commit

[PATCH] D157297: [clang] Fixes compile error that double colon operator cannot resolve macro with parentheses.

pengfei added a subscriber: aaron.ballman. pengfei added a comment. BTW, maybe @aaron.ballman knows why we don't support such syntax in C++. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157297/new/ https://reviews.llvm.org/D157297 ___ cfe-co

[PATCH] D157485: [X86][RFC] Support new feature AVX10

pengfei added a comment. Ping~ It looks to me there's no concern about this solution in the RFC . I think we can move forward to land it. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.

[PATCH] D157680: [X86]Support options -mno-gather -mno-scatter

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157680/new/ https://reviews.llvm.org/D157680

[PATCH] D157485: [X86][RFC] Support new feature AVX10

pengfei updated this revision to Diff 550669. pengfei marked an inline comment as done. pengfei added a comment. Address comment. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157485/new/ https://reviews.llvm.org/D157485 Files: clang/docs/Releas

[PATCH] D157485: [X86][RFC] Support new feature AVX10

pengfei added inline comments. Comment at: clang/lib/CodeGen/CodeGenFunction.cpp:2581 + unsigned VectorWidth) { + if (!getTarget().getTriple().isX86() || VectorWidth < 512) +return; skan wrote: > Minor suggestion.

[PATCH] D157297: [clang] Fixes compile error that double colon operator cannot resolve macro with parentheses.

pengfei added a comment. In D157297#4592851 , @aaron.ballman wrote: > In D157297#4590886 , @pengfei wrote: > >> BTW, maybe @aaron.ballman knows why we don't support such syntax in C++. > > The return statement ex

[PATCH] D158329: [X86] Support arch=x86-64{,-v2,-v3,-v4} for target_clones attribute

pengfei added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:13272 + uint64_t Mask = llvm::X86::getCpuSupportsMask(FeatureStrs); + uint32_t FeaturesMask[4] = {uint32_t(Mask), uint32_t(Mask >> 32), 0, 0}; + return EmitX86CpuSupports(FeaturesMask);

[PATCH] D158329: [X86] Support arch=x86-64{,-v2,-v3,-v4} for target_clones attribute

pengfei added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:13318-13320 +Value *Idxs[] = {Builder.getInt32(0), Builder.getInt32(i - 1)}; +Value *Features = Builder.CreateAlignedLoad( +Int32Ty, Builder.CreateGEP(ATy, CpuFeatures2, Idxs),

[PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.

pengfei added a comment. In D155145#4543326 , @anna wrote: > We see a crash bisected to this patch about using an illegal instruction. > Here's the CPUInfo for the machine: > > CPU info: > current cpu id: 22 > total 32(physical cores 16) (assigned

cfe-commits@lists.llvm.org

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155863/new/ https://reviews.llvm.org/D155863

[PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.

pengfei added a comment. Thanks @anna and @craig.topper I think we can dump the value with the simple code $ cat cpuid.c #include #include int main() { unsigned int info[4]; for (int i = 0; i < 2; ++i) { __get_cpuid_count(7, 1, info, info + 1, info + 2, info + 3);

[PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.

pengfei added a comment. In D155145#4556157 , @anna wrote: > In D155145#4554786 , @anna wrote: > >>> Can you capture the values of EAX, EBX, ECX, and EDX after the two calls to >>> getX86CpuIDAndInfoEx that have

[PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.

pengfei added a comment. In D155145#4556178 , @craig.topper wrote: > In D155145#4556157 , @anna wrote: > >> In D155145#4554786 , @anna wrote: >> Can you capture the

[PATCH] D157297: [clang] Fixes compile error like error: expected unqualified-id for ::_tzcnt_u32(mask);

pengfei added a comment. The description is not clear to me. You should describe the reason rather than phenomenon. My understanding is double colon cannot operator cannot resolve functions with parentheses. But I didn't find enough proof in Google. It'd be more persuasive if you can find it a

[PATCH] D157485: [X86][RFC] Support new feature AVX10

pengfei created this revision. pengfei added reviewers: RKSimon, craig.topper, skan, e-kud. Herald added a subscriber: hiraditya. Herald added a project: All. pengfei requested review of this revision. Herald added subscribers: llvm-commits, cfe-commits, MaskRay. Herald added projects: clang, LLVM.

[PATCH] D157251: [X86][regcall] Do not produce @ number suffix if it is regcall4

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157251/new/ https://reviews.llvm.org/D157251

[PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features

pengfei added inline comments. Comment at: llvm/lib/Target/X86/X86Subtarget.cpp:271 + // Attach EVEX512 feature when we have AVX512 features and EVEX512 is not set. + size_t posNoEVEX512 = FS.rfind("-evex512"); pengfei wrote: > skan wrote: > > It seems the c

[PATCH] D155160: Allow immediate integer for a "p" inline asm constraint

pengfei created this revision. Herald added a project: All. pengfei requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D155160 Files: clang/lib/Basic/Targets/X86.cpp Index: c

[PATCH] D155145: Add AVX-VNNI-INT16 instructions.

pengfei added inline comments. Comment at: clang/lib/Basic/Targets/X86.cpp:1059 .Case("avx512vp2intersect", HasAVX512VP2INTERSECT) + .Case("avxvnniint16", HasAVXVNNIINT16) .Case("avxifma", HasAVXIFMA) alphabetical order. Comm

[PATCH] D155146: Add SHA512 instructions.

pengfei added inline comments. Comment at: clang/lib/Headers/CMakeLists.txt:207 shaintrin.h + sha512intrin.h smmintrin.h alphabetical order Comment at: llvm/include/llvm/IR/IntrinsicsX86.td:5112 +def int_x86_vsha512msg1 : ClangBuiltin<"_

[PATCH] D155147: Add SM3 instructions.

pengfei added inline comments. Comment at: llvm/test/MC/Disassembler/X86/sm3-32.txt:1 + +# RUN: llvm-mc --disassemble %s -triple=i386-unknown-unknown | FileCheck %s --check-prefixes=ATT Remove blank line Comment at: llvm/test/MC/Disassembler/X

[PATCH] D155148: Add SM4 instructions.

pengfei added inline comments. Comment at: llvm/test/MC/Disassembler/X86/sm4-64.txt:3-4 + +# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT +# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck

[PATCH] D155148: Add SM4 instructions.

pengfei added inline comments. Comment at: llvm/test/CodeGen/X86/sm4-intrinsics.ll:2 +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -O0 -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+sm4 | FileChe

[PATCH] D155146: Add SHA512 instructions.

pengfei added inline comments. Comment at: llvm/lib/Target/X86/X86.td:243 + "Support SHA512 instructions", + [FeatureAVX]>; // Processor supports CET SHSTK - Control-Flow Enforcement Technology ---

[PATCH] D155145: Add AVX-VNNI-INT16 instructions.

pengfei added inline comments. Comment at: llvm/test/CodeGen/X86/avxvnniint16-intrinsics.ll:3 +; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx2,+avxvnniint16 | FileCheck %s --check-prefixes=X64 +; RUN: llc < %s -verify-machin

[PATCH] D158329: [X86] Support arch=x86-64{,-v2,-v3,-v4} for target_clones attribute

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158329/new/ https://reviews.llvm.org/D158329

[PATCH] D158811: [X86] __builtin_cpu_supports: support x86-64{,-v2,-v3,-v4}

pengfei added inline comments. Comment at: llvm/include/llvm/TargetParser/X86TargetParser.h:63 + +#define X86_FEATURE(ENUM, STRING) +#define X86_MICROARCH_LEVEL(ENUM, STRING, PRIORITY) FEATURE_##ENUM = PRIORITY, Not needed. Comment at: llvm/lib

[PATCH] D158811: [X86] __builtin_cpu_supports: support x86-64{,-v2,-v3,-v4}

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158811/new/ https://reviews.llvm.org/D158811

[PATCH] D159068: [clang][X86] Update excessive register save diagnostic to more closely follow the interrupt attribute spec

pengfei added inline comments. Comment at: clang/include/clang/Basic/DiagnosticSemaKinds.td:317 + " with attribute 'no_caller_saved_registers'" + " or be compiled with '-mgeneral-regs-only'">, + InGroup>; aaron.ballman wrote: > Can you add a test case showing

[PATCH] D159068: [clang][X86] Update excessive register save diagnostic to more closely follow the interrupt attribute spec

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. I don't have prior experience about interrupt diagnostic but know something about mgeneral-regs-only. I think the diagnostic great. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST

[PATCH] D159068: [clang][X86] Update excessive register save diagnostic to more closely follow the interrupt attribute spec

This revision was automatically updated to reflect the committed changes. Closed by commit rGfa1dc06a1b39: [clang][X86] Update excessive register save diagnostic to more closely follow… (authored by antangelo, committed by pengfei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTIO

[PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features

pengfei created this revision. pengfei added reviewers: RKSimon, skan, jyknight, e-kud. Herald added a subscriber: hiraditya. Herald added a project: All. pengfei requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. This is an

[PATCH] D157485: [X86][RFC] Support new feature AVX10

pengfei planned changes to this revision. pengfei added a comment. In D157485#4597603 , @e-kud wrote: > Just curious, in RFC we have `-mavx10.x-256/-mavx10.x-512` but here we refer > to `-mavx10.x/-mavx10.x,-mavx10-512bit`. Is it compliant with GCC, or t

[PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features

pengfei added inline comments. Comment at: clang/lib/CodeGen/Targets/X86.cpp:1517 + bool Caller256 = CallerMap.lookup("avx512f") && !CallerMap.lookup("evex512"); + bool Callee256 = CallerMap.lookup("avx512f") && !CallerMap.lookup("evex512"); + RKSimon wrote: >

[PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features

pengfei added a comment. In D159250#4634774 , @jyknight wrote: > In D159250#4633530 , @pengfei wrote: > >> In D159250#4631786 , @RKSimon >> wrote: >> >>> Would it be poss

[PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features

pengfei added inline comments. Comment at: llvm/lib/Target/X86/X86Subtarget.cpp:271 + // Attach EVEX512 feature when we have AVX512 features and EVEX512 is not set. + size_t posNoEVEX512 = FS.rfind("-evex512"); skan wrote: > It seems the change in X86.cpp is

[PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features

pengfei added a comment. ping Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D159250/new/ https://reviews.llvm.org/D159250 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi

[PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features

pengfei added inline comments. Comment at: clang/lib/CodeGen/Targets/X86.cpp:1493 const llvm::StringMap &CalleeMap, QualType Ty, StringRef Feature, bool IsArgument) { ---

[PATCH] D138900: [X86] include cmpccxaddintrin.h from immintrin.h to x86gprintrin.h

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D138900/new/ https://reviews.llvm.org/D138900

[PATCH] D117836: Fix obvious typo

This revision was automatically updated to reflect the committed changes. Closed by commit rG862c3d4fbe18: Fix obvious typo (authored by gftg, committed by pengfei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D117836/new/ https://reviews.llvm.org/

[PATCH] D138987: [AMX] Support AMX-FP16 new intrinsic interface

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG94c5df8a7618: [AMX] Support AMX-FP16 new intrinsic interface (authored by xiangzhangllvm, committed by pengfei). Herald added a project: clang. Heral

[PATCH] D147165: [Windows SEH] Fix catch+return crash for Windows -EHa

pengfei created this revision. pengfei added reviewers: tentzen, efriedma, victork1996. Herald added subscribers: kbarton, nemanjai. Herald added a project: All. pengfei requested review of this revision. Herald added subscribers: cfe-commits, MaskRay. Herald added a project: clang. This change al

[PATCH] D72820: [FPEnv] Add pragma FP_CONTRACT support under strict FP.

pengfei added inline comments. Comment at: clang/lib/CodeGen/CGExprScalar.cpp:3386 +FMulAdd = Builder.CreateConstrainedFPCall( +CGF.CGM.getIntrinsic(llvm::Intrinsic::experimental_constrained_fmuladd, + Addend->getType()), A

[PATCH] D136919: [X86][RFC] Change mangle name of __bf16 from u6__bf16 to DF16b

pengfei added a comment. In D136919#4174513 , @stuij wrote: > FWIW, at Arm we decided to keep the old name mangling to minimise friction > with existing code/libraries, but allow more operations with this same > name-mangling. We also discussed with Red

[PATCH] D145857: [X86] Make triple ArchName override OS for i686 and i786

pengfei created this revision. Herald added a project: All. pengfei requested review of this revision. Herald added subscribers: cfe-commits, MaskRay. Herald added a project: clang. Fixes #61347 Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D145857 Files: clang/lib/Driver/To

[PATCH] D145857: [X86] Make triple ArchName override OS for i686 and i786

pengfei planned changes to this revision. pengfei added a comment. In D145857#4186957 , @craig.topper wrote: > Did you test this? I kind of expected the triple would be normalized before > this. I’m not at a computer to check. No, I just tried with gdb

[PATCH] D145857: [X86] Make triple ArchName override OS for i686 and i786

pengfei updated this revision to Diff 504400. pengfei added a comment. Fix typo & add tests. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D145857/new/ https://reviews.llvm.org/D145857 Files: clang/lib/Driver/ToolChains/Arch/X86.cpp clang/test/

[PATCH] D145857: [X86] Make triple ArchName override OS for i686 and i786

pengfei updated this revision to Diff 504401. pengfei added a comment. Fix lit failure. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D145857/new/ https://reviews.llvm.org/D145857 Files: clang/lib/Driver/ToolChains/Arch/X86.cpp clang/test/Drive

[PATCH] D145857: [X86] Make triple ArchName override OS for i686 and i786

pengfei updated this revision to Diff 504497. pengfei added a comment. Only make OS override i386. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D145857/new/ https://reviews.llvm.org/D145857 Files: clang/lib/Driver/ToolChains/Arch/X86.cpp clang

[PATCH] D145857: [X86] Make triple ArchName override OS for i686 and i786

pengfei updated this revision to Diff 504498. pengfei added a comment. Support i886 and i986. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D145857/new/ https://reviews.llvm.org/D145857 Files: clang/lib/Driver/ToolChains/Arch/X86.cpp clang/test

[PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getCPUDispatchMangling

pengfei added inline comments. Comment at: clang/test/CodeGen/attr-cpuspecific.c:342 -// CHECK: attributes #[[S]] = {{.*}}"target-features"="+avx,+cmov,+crc32,+cx8,+f16c,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" // CHECK-SAME: "tune-cpu"="ivybridge" --

[PATCH] D153576: [Headers] Fix up some conditionals

pengfei added a comment. In D153576#4442096 , @craig.topper wrote: > The mulx function being 32-bit mode only is also true in gcc. It probably > won't generate a mulx instruction on x86-64. Maybe that's why it was 32-bit > only? But it should still be

[PATCH] D153681: [X86] Move back _mulx_u32 to 32-bit only

pengfei created this revision. pengfei added reviewers: probinson, craig.topper, RKSimon. Herald added a project: All. pengfei requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. We cannot lower it to mulx at the present due to backend reason.

[PATCH] D152989: Pre-commit test for D151696.

pengfei added inline comments. Comment at: clang/test/CodeGen/attr-cpuspecific-cpus.c:1-2 +// RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm -o - %s +// RUN: %clang_cc1 -triple x86_64-windows-pc -fms-compatibility -emit-llvm -o - %s + Is it only to check no

[PATCH] D152989: Pre-commit test for D151696.

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152989/new/ https://reviews.llvm.org/D152989

[PATCH] D153993: [Headers][doc] Add load/store/cmp/cvt intrinsic descriptions to avx2intrin.h

pengfei added inline comments. Comment at: clang/lib/Headers/avx2intrin.h:1324 +/// k := i*16 +/// result[k+15:k] := SignExtend(__V[j+7:7]) +/// ENDFOR j Comment at: clang/lib/Headers/avx2intrin.h:1352 +/// k := i*32 +/// result[k+31:k]

[PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getCPUDispatchMangling

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. I have some concerns for RULE 3, especially `core_aes_pclmulqdq -> westmere` and `atom_sse4_2_movbe -> silvermont`. Sometimes, we have minor feature differences in the same generation targets

[PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getCPUDispatchMangling

pengfei added a comment. It looks to me the failed unit tests might be related to this patch, please take a look. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D151696/new/ https://reviews.llvm.org/D151696 _

[PATCH] D153993: [Headers][doc] Add load/store/cmp/cvt intrinsic descriptions to avx2intrin.h

pengfei added inline comments. Comment at: clang/lib/Headers/avx2intrin.h:3474 +/// IF __M[j+31] == 1 +/// result[j+31:j] := Load32(__X+(i*4)) +/// ELSE probinson wrote: > pengfei wrote: > > A more intrinsic guide format is `MEM[__X+j:j]` > LoadXX is the

[PATCH] D153993: [Headers][doc] Add load/store/cmp/cvt intrinsic descriptions to avx2intrin.h

pengfei added inline comments. Comment at: clang/lib/Headers/avx2intrin.h:3474 +/// IF __M[j+31] == 1 +/// result[j+31:j] := Load32(__X+(i*4)) +/// ELSE probinson wrote: > pengfei wrote: > > probinson wrote: > > > pengfei wrote: > > > > A more intrinsic g

[PATCH] D153993: [Headers][doc] Add load/store/cmp/cvt intrinsic descriptions to avx2intrin.h

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Comment at: clang/lib/Headers/avx2intrin.h:3474 +/// IF __M[j+31] == 1 +/// result[j+31:j] := Load32(__X+(i*4)) +/// ELSE probinson wrote: >

[PATCH] D147165: [Windows SEH] Fix catch+return crash for Windows -EHa

pengfei added a comment. I checked no difference in codegen between `/EHa` and `/EHsc` in MSVC. So it should be correct for clang as well. We should land it ASAP since it fixes a crash case. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147165/new/

[PATCH] D147165: [Windows SEH] Fix catch+return crash for Windows -EHa

This revision was automatically updated to reflect the committed changes. Closed by commit rG0cc66f3c779b: [Windows SEH] Fix catch+return crash for Windows -EHa (authored by pengfei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147165/new/ https:/

[PATCH] D147461: [Headers] Add some intrinsic function descriptions to immintrin.h

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM, thanks for working on it! Comment at: clang/lib/Headers/immintrin.h:294 +/// \param __p +///Pointer to a 16-bit location to place the random value. +/// \returns

[PATCH] D147733: Set rounding_mode to tonearest in presence of a #pragma STDC FENV_ACCESS OFF.

pengfei added a comment. Remove the `fenv_04_06.patch` CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147733/new/ https://reviews.llvm.org/D147733 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/l

[PATCH] D147733: Set rounding_mode to tonearest in presence of a #pragma STDC FENV_ACCESS OFF.

pengfei added inline comments. Comment at: clang/test/CodeGen/pragma-fenv_access.c:239 +// CHECK-LABEL: @func_20 +// STRICT: call float @llvm.experimental.constrained.fadd.f32(float {{.*}}, float {{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict") +// DEFAULT: fadd

[PATCH] D147733: Set rounding_mode to tonearest in presence of a #pragma STDC FENV_ACCESS OFF.

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. The change makes more sense to me, thanks! Comment at: clang/test/CodeGen/pragma-fenv_access.c:239 +// CHECK-LABEL: @func_20 +// STRICT: call float @llvm.experimental.const

[PATCH] D147867: [Windows SEH] Fix ehcleanup crash for Windows -EHa

pengfei created this revision. pengfei added reviewers: tentzen, efriedma, LuoYuanke, jyu2. Herald added subscribers: kbarton, nemanjai. Herald added a project: All. pengfei requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. `Builder.GetInsert

[PATCH] D148021: [Headers][doc] Add FMA intrinsic descriptions

pengfei added inline comments. Comment at: clang/lib/Headers/fmaintrin.h:22 +/// Computes a multiply-add of 128-bit vectors of [4 x float]. +///For each element, computes (__A * __B) + __C . +/// We are using a special format to describute the function in a

[PATCH] D147867: [Windows SEH] Fix ehcleanup crash for Windows -EHa

pengfei added inline comments. Comment at: clang/test/CodeGen/windows-seh-EHa-CppCatchReturn.cpp:27 + +// FIXME: We may need to generate llvm.seh.scope.end or remove llvm.seh.scope.begin. +void qux() { efriedma wrote: > If a scope never ends because there's an "

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