On 2/2/26 23:33, Peter Maydell wrote:
Many SVE instructions should be provided where the CPU implements
either SVE or SME. Currently we largely check only for features
aa64_sve or aa64_sve2. This happens to work because we forbid
creation of a CPU with SME but not SVE. To allow users to create
SME-only CPUs we need to update the conditions to use the "or SME"
versions of the feature tests instead.
This commit was created by going through translate-sve.c from
top to bottom looking for aa64_sve feature tests and cross
checking those against the instruction descriptions in the Arm ARM,
which will say "(FEAT_SVE || FEAT_SME)" for instructions that
are provided for both features, and "(FEAT_SME)" for the rarer
instructions that are SME only.
Signed-off-by: Peter Maydell<[email protected]>
---
This is a large commit, but pretty mechanical. My suggestion
for review is to look at translate-sve.c after it: the only
remaining uses of the plain aa64_sve and aa64_sve2 feature
checks should be in "nonstreaming" instructions, which are
mostly handled via the TRANS_FEAT_NONSTREAMING macro and
in some cases with open-coding of setting is_nonstreaming.
---
target/arm/tcg/translate-sve.c | 854 ++++++++++++++++-----------------
1 file changed, 427 insertions(+), 427 deletions(-)
Reviewed-by: Richard Henderson <[email protected]>
r~
