On 2/2/26 23:33, Peter Maydell wrote:
The I8MM field of ID_AA64ZFR0_EL1 is set when the CPU implements FEAT_I8MM and either FEAT_SVE or FEAT_SME. Currently we assume that it is only set for FEAT_SVE. Update the feature checks: * we rename the existing feature check function to sve_sme_i8mm to indicate that it is true for either SVE or SME I8MM * we add a new check function for FEAT_SVE && FEAT_I8MM (giving it the sve_i8mm name that the old function used to have) * the instructions which are (SVE || SME) && I8MM need their checks updating to sve_sme_i8mm: these are SUDOT, USDOT * instructions which are SVE && I8MM (i.e. really SVE-only) stay unchanged with sve_i8mm: these are SMMLA, USMMLA, UMMLASigned-off-by: Peter Maydell<[email protected]> --- target/arm/cpu-features.h | 8 +++++++- target/arm/tcg/translate-sve.c | 6 +++--- 2 files changed, 10 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <[email protected]> r~
