aarch64_sve_change_el() currently assumes that SME implies SVE, and will return without doing anything if SVE is not implemented, skipping a possible requirement to change the vector register state because the SME vector length has changed. Update it to handle SME also.
Reviewed-by: Richard Henderson <[email protected]> Reviewed-by: Alex Bennée <[email protected]> Signed-off-by: Peter Maydell <[email protected]> --- target/arm/helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index e4a6ff17b1..390ea32c21 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -10130,8 +10130,8 @@ void aarch64_sve_change_el(CPUARMState *env, int old_el, int old_len, new_len; bool old_a64, new_a64, sm; - /* Nothing to do if no SVE. */ - if (!cpu_isar_feature(aa64_sve, cpu)) { + /* Nothing to do if no SVE or SME. */ + if (!cpu_isar_feature(aa64_sve, cpu) && !cpu_isar_feature(aa64_sme, cpu)) { return; } -- 2.43.0
