---
gcc/ChangeLog:
* config/i386/avx10_v2_auxintrin.h (__attribute__):
(_mm_pmovssdb_epi8):
(_mm_mask_pmovssdb_epi8):
(_mm_maskz_pmovssdb_epi8):
(_mm256_pmovssdb_epi8):
(_mm256_mask_pmovssdb_epi8):
(_mm256_maskz_pmovssdb_epi8):
(_mm512_pmovssdb_epi8):
(_mm512_mask_pmovssdb_epi8):
(_mm512_maskz_pmovssdb_epi8):
(_mm_unpackb_epi8):
(_mm_mask_unpackb_epi8):
(_mm_maskz_unpackb_epi8):
(_mm256_unpackb_epi8):
(_mm256_mask_unpackb_epi8):
(_mm256_maskz_unpackb_epi8):
(_mm512_unpackb_epi8):
(_mm512_mask_unpackb_epi8):
(_mm512_maskz_unpackb_epi8):
* config/i386/i386-builtin-types.def (V16QI):
(V32QI):
(V64QI):
* config/i386/i386-builtin.def (BDESC):
* config/i386/i386-expand.cc (ix86_expand_args_builtin):
* config/i386/sse.md (vunpackb<mode>):
(vunpackb<mode>_mask):
(*vunpackb<mode>_mask):
(vpmovssdb<mode>):
(vpmovssdb<mode>_mask):
(*vpmovssdb<mode>_mask):
gcc/testsuite/ChangeLog:
* lib/target-supports.exp:
* gcc.target/i386/avx10_2-v2-aux-convert-10.c: New test.
* gcc.target/i386/avx10_2-v2-aux-convert-9.c: New test.
gcc/config/i386/avx10_v2_auxintrin.h | 128 ++++++++++++++++++
gcc/config/i386/i386-builtin-types.def | 6 +
gcc/config/i386/i386-builtin.def | 9 ++
gcc/config/i386/i386-expand.cc | 6 +
gcc/config/i386/sse.md | 90 ++++++++++++
.../i386/avx10_2-v2-aux-convert-10.c | 25 ++++
.../i386/avx10_2-v2-aux-convert-9.c | 25 ++++
gcc/testsuite/lib/target-supports.exp | 3 +
8 files changed, 292 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/i386/avx10_2-v2-aux-convert-10.c
create mode 100644 gcc/testsuite/gcc.target/i386/avx10_2-v2-aux-convert-9.c
diff --git a/gcc/config/i386/avx10_v2_auxintrin.h
b/gcc/config/i386/avx10_v2_auxintrin.h
index c53ecf3f3d7..fdfc7f44ecb 100644
--- a/gcc/config/i386/avx10_v2_auxintrin.h
+++ b/gcc/config/i386/avx10_v2_auxintrin.h
@@ -1467,6 +1467,134 @@ _mm512_maskz_cvthf6_hf8(__mmask64 __U, __m512i __A) {
(__mmask64) __U);
}
+// VPMOVSSDB - 128-bit
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_pmovssdb_epi8 (__m128i __A)
+{
+ return (__m128i) __builtin_ia32_vpmovssdb128_mask ((__v4si) __A,
+ (__v16qi)
_mm_undefined_si128 (),
+ (__mmask8) -1);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_pmovssdb_epi8 (__m128i __W, __mmask8 __U, __m128i __A)
+{
+ return (__m128i) __builtin_ia32_vpmovssdb128_mask ((__v4si) __A,
+ (__v16qi) __W,
+ (__mmask8) __U);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maskz_pmovssdb_epi8 (__mmask8 __U, __m128i __A)
+{
+ return (__m128i) __builtin_ia32_vpmovssdb128_mask ((__v4si) __A,
+ (__v16qi)
_mm_setzero_si128 (),
+ (__mmask8) __U);
+}
+
+// VPMOVSSDB - 256-bit
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_pmovssdb_epi8 (__m256i __A)
+{
+ return (__m128i) __builtin_ia32_vpmovssdb256_mask ((__v8si) __A,
+ (__v16qi)
_mm_undefined_si128 (),
+ (__mmask8) -1);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_pmovssdb_epi8 (__m128i __W, __mmask8 __U, __m256i __A)
+{
+ return (__m128i) __builtin_ia32_vpmovssdb256_mask ((__v8si) __A,
+ (__v16qi) __W,
+ (__mmask8) __U);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_pmovssdb_epi8 (__mmask8 __U, __m256i __A)
+{
+ return (__m128i) __builtin_ia32_vpmovssdb256_mask ((__v8si) __A,
+ (__v16qi)
_mm_setzero_si128 (),
+ (__mmask8) __U);
+}
+
+// VPMOVSSDB - 512-bit
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_pmovssdb_epi8 (__m512i __A)
+{
+ return (__m128i) __builtin_ia32_vpmovssdb512_mask ((__v16si) __A,
+ (__v16qi)
_mm_undefined_si128 (),
+ (__mmask16) -1);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_pmovssdb_epi8 (__m128i __W, __mmask16 __U, __m512i __A)
+{
+ return (__m128i) __builtin_ia32_vpmovssdb512_mask ((__v16si) __A,
+ (__v16qi) __W,
+ (__mmask16) __U);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_maskz_pmovssdb_epi8 (__mmask16 __U, __m512i __A)
+{
+ return (__m128i) __builtin_ia32_vpmovssdb512_mask ((__v16si) __A,
+ (__v16qi)
_mm_setzero_si128 (),
+ (__mmask16) __U);
+}
+
+// VUNPACKB - 128-bit
+#define _mm_unpackb_epi8(A, imm) \
+ ((__m128i) __builtin_ia32_vunpackb128_mask((__v16qi)(__m128i)(A), \
+ (int)(imm), (__v16qi)(__m128i)(_mm_undefined_si128 ()),
(__mmask16)(-1)))
+
+#define _mm_mask_unpackb_epi8(W, U, A, imm) \
+ ((__m128i) __builtin_ia32_vunpackb128_mask((__v16qi)(__m128i)(A), \
+ (int)(imm), (__v16qi)(__m128i)(W), (__mmask16)(U)))
+
+#define _mm_maskz_unpackb_epi8(U, A, imm) \
+ ((__m128i) __builtin_ia32_vunpackb128_mask((__v16qi)(__m128i)(A), \
+ (int)(imm), (__v16qi)(__m128i)(_mm_setzero_si128 ()), (__mmask16)(U)))
+
+// VUNPACKB - 256-bit
+
+#define _mm256_unpackb_epi8(A, imm) \
+ ((__m256i) __builtin_ia32_vunpackb256_mask((__v32qi)(__m256i)(A), \
+ (int)(imm), (__v32qi)(__m256i)(_mm256_undefined_si256 ()),
(__mmask32)(-1)))
+
+#define _mm256_mask_unpackb_epi8(W, U, A, imm) \
+ ((__m256i) __builtin_ia32_vunpackb256_mask((__v32qi)(__m256i)(A), \
+ (int)(imm), (__v32qi)(__m256i)(W), (__mmask32)(U)))
+
+#define _mm256_maskz_unpackb_epi8(U, A, imm) \
+ ((__m256i) __builtin_ia32_vunpackb256_mask((__v32qi)(__m256i)(A), \
+ (int)(imm), (__v32qi)(__m256i)(_mm256_setzero_si256 ()),
(__mmask32)(U)))
+
+// VUNPACKB - 512-bit
+
+#define _mm512_unpackb_epi8(A, imm) \
+ ((__m512i) __builtin_ia32_vunpackb512_mask((__v64qi)(__m512i)(A), \
+ (int)(imm), (__v64qi)(__m512i)(_mm512_undefined_si512 ()),
(__mmask64)(-1)))
+
+#define _mm512_mask_unpackb_epi8(W, U, A, imm) \
+ ((__m512i) __builtin_ia32_vunpackb512_mask((__v64qi)(__m512i)(A), \
+ (int)(imm), (__v64qi)(__m512i)(W), (__mmask64)(U)))
+
+#define _mm512_maskz_unpackb_epi8(U, A, imm) \
+ ((__m512i) __builtin_ia32_vunpackb512_mask((__v64qi)(__m512i)(A), \
+ (int)(imm), (__v64qi)(__m512i)(_mm512_setzero_si512 ()),
(__mmask64)(U)))
+
#ifdef __DISABLE_AVX10_V2_AUX__
#undef __DISABLE_AVX10_V2_AUX__
#pragma GCC pop_options
diff --git a/gcc/config/i386/i386-builtin-types.def
b/gcc/config/i386/i386-builtin-types.def
index 2622afdf49a..96e1fd62195 100644
--- a/gcc/config/i386/i386-builtin-types.def
+++ b/gcc/config/i386/i386-builtin-types.def
@@ -1477,6 +1477,9 @@ DEF_FUNCTION_TYPE (V8SI, V8DF, V8SI, UQI)
# AVX10_V2_AUX builtins
DEF_FUNCTION_TYPE (V16QI, V32QI)
DEF_FUNCTION_TYPE (V32QI, V64QI)
+DEF_FUNCTION_TYPE (V16QI, V16QI, INT)
+DEF_FUNCTION_TYPE (V32QI, V32QI, INT)
+DEF_FUNCTION_TYPE (V64QI, V64QI, INT)
DEF_FUNCTION_TYPE (V4SF, V16QI, V4SF, UQI)
DEF_FUNCTION_TYPE (V8SF, V16QI, V8SF, UQI)
DEF_FUNCTION_TYPE (V16SF, V16QI, V16SF, UHI)
@@ -1487,6 +1490,9 @@ DEF_FUNCTION_TYPE (V64QI, V32QI, V64QI, UDI)
DEF_FUNCTION_TYPE (V16QI, V16QI, V4SF, V16QI, UQI)
DEF_FUNCTION_TYPE (V16QI, V32QI, V8SF, V16QI, UQI)
DEF_FUNCTION_TYPE (V16QI, V64QI, V16SF, V16QI, UHI)
+DEF_FUNCTION_TYPE (V16QI, V16QI, INT, V16QI, UHI)
+DEF_FUNCTION_TYPE (V32QI, V32QI, INT, V32QI, USI)
+DEF_FUNCTION_TYPE (V64QI, V64QI, INT, V64QI, UDI)
# SM4 builtins
DEF_FUNCTION_TYPE (V16SI, V16SI, V16SI)
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index 865e5a57b6e..85895f19703 100644
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -3427,6 +3427,15 @@ BDESC (0, OPTION_MASK_ISA2_AVX10_V2_AUX,
CODE_FOR_vcvtbf62hf8v64qi_mask, "__buil
BDESC (0, OPTION_MASK_ISA2_AVX10_V2_AUX, CODE_FOR_vcvthf62hf8v16qi_mask,
"__builtin_ia32_vcvthf62hf8128_mask", IX86_BUILTIN_VCVTHF62HF8128_MASK,
UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
BDESC (0, OPTION_MASK_ISA2_AVX10_V2_AUX, CODE_FOR_vcvthf62hf8v32qi_mask,
"__builtin_ia32_vcvthf62hf8256_mask", IX86_BUILTIN_VCVTHF62HF8256_MASK,
UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
BDESC (0, OPTION_MASK_ISA2_AVX10_V2_AUX, CODE_FOR_vcvthf62hf8v64qi_mask,
"__builtin_ia32_vcvthf62hf8512_mask", IX86_BUILTIN_VCVTHF62HF8512_MASK,
UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_V2_AUX, CODE_FOR_vunpackbv16qi,
"__builtin_ia32_vunpackb128", IX86_BUILTIN_VUNPACKB128, UNKNOWN, (int)
V16QI_FTYPE_V16QI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_V2_AUX, CODE_FOR_vunpackbv16qi_mask,
"__builtin_ia32_vunpackb128_mask", IX86_BUILTIN_VUNPACKB128_MASK, UNKNOWN,
(int) V16QI_FTYPE_V16QI_INT_V16QI_UHI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_V2_AUX, CODE_FOR_vunpackbv32qi,
"__builtin_ia32_vunpackb256", IX86_BUILTIN_VUNPACKB256, UNKNOWN, (int)
V32QI_FTYPE_V32QI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_V2_AUX, CODE_FOR_vunpackbv32qi_mask,
"__builtin_ia32_vunpackb256_mask", IX86_BUILTIN_VUNPACKB256_MASK, UNKNOWN,
(int) V32QI_FTYPE_V32QI_INT_V32QI_USI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_V2_AUX, CODE_FOR_vunpackbv64qi,
"__builtin_ia32_vunpackb512", IX86_BUILTIN_VUNPACKB512, UNKNOWN, (int)
V64QI_FTYPE_V64QI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_V2_AUX, CODE_FOR_vunpackbv64qi_mask,
"__builtin_ia32_vunpackb512_mask", IX86_BUILTIN_VUNPACKB512_MASK, UNKNOWN,
(int) V64QI_FTYPE_V64QI_INT_V64QI_UDI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_V2_AUX, CODE_FOR_vpmovssdbv4si_mask,
"__builtin_ia32_vpmovssdb128_mask", IX86_BUILTIN_VPMOVSSDB128_MASK, UNKNOWN,
(int) V16QI_FTYPE_V4SI_V16QI_UQI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_V2_AUX, CODE_FOR_vpmovssdbv8si_mask,
"__builtin_ia32_vpmovssdb256_mask", IX86_BUILTIN_VPMOVSSDB256_MASK, UNKNOWN,
(int) V16QI_FTYPE_V8SI_V16QI_UQI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_V2_AUX, CODE_FOR_vpmovssdbv16si_mask,
"__builtin_ia32_vpmovssdb512_mask", IX86_BUILTIN_VPMOVSSDB512_MASK, UNKNOWN,
(int) V16QI_FTYPE_V16SI_V16QI_UHI)
/* Builtins with rounding support. */
BDESC_END (ARGS, ROUND_ARGS)
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index c56fc8e8d34..e8f44752607 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -12710,6 +12710,9 @@ ix86_expand_args_builtin (const struct
builtin_description *d,
case UHI_FTYPE_UHI_UQI:
case USI_FTYPE_USI_UQI:
case UDI_FTYPE_UDI_UQI:
+ case V16QI_FTYPE_V16QI_INT:
+ case V32QI_FTYPE_V32QI_INT:
+ case V64QI_FTYPE_V64QI_INT:
nargs = 2;
nargs_constant = 1;
break;
@@ -13161,6 +13164,9 @@ ix86_expand_args_builtin (const struct
builtin_description *d,
case V4DF_FTYPE_V8DF_INT_V4DF_UQI:
case V4SF_FTYPE_V16SF_INT_V4SF_UQI:
case V8DI_FTYPE_V8DI_INT_V8DI_UQI:
+ case V16QI_FTYPE_V16QI_INT_V16QI_UHI:
+ case V32QI_FTYPE_V32QI_INT_V32QI_USI:
+ case V64QI_FTYPE_V64QI_INT_V64QI_UDI:
nargs = 4;
mask_pos = 2;
nargs_constant = 1;
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 3db68d0b117..66d9348ec32 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -279,6 +279,8 @@
UNSPEC_VCVTHF82HF6S
UNSPEC_VCVTBF62HF8
UNSPEC_VCVTHF62HF8
+ UNSPEC_VUNPACKB
+ UNSPEC_VPMOVSSDB
])
(define_c_enum "unspecv" [
@@ -34136,3 +34138,91 @@
"vcvt<convertfp62hf8>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"
[(set_attr "prefix" "evex")
(set_attr "mode" "<sseinsnmode>")])
+
+;; VUNPACKB - Sub-byte element extraction
+
+(define_insn "vunpackb<mode>"
+ [(set (match_operand:VI1_AVX512VL 0 "register_operand" "=v")
+ (unspec:VI1_AVX512VL
+ [(match_operand:VI1_AVX512VL 1 "nonimmediate_operand" "vm")
+ (match_operand:SI 2 "const_0_to_255_operand" "n")]
+ UNSPEC_VUNPACKB))]
+ "TARGET_AVX10_V2_AUX"
+ "vunpackb\t{%2, %1, %0|%0, %1, %2}"
+ [(set_attr "prefix" "evex")
+ (set_attr "mode" "<sseinsnmode>")])
+
+(define_expand "vunpackb<mode>_mask"
+ [(set (match_operand:VI1_AVX512VL 0 "register_operand")
+ (vec_merge:VI1_AVX512VL
+ (unspec:VI1_AVX512VL
+ [(match_operand:VI1_AVX512VL 1 "nonimmediate_operand")
+ (match_operand:SI 2 "const_0_to_255_operand")]
+ UNSPEC_VUNPACKB)
+ (match_operand:VI1_AVX512VL 3 "nonimm_or_0_operand")
+ (match_operand:<avx512fmaskmode> 4 "register_or_constm1_operand")))]
+ "TARGET_AVX10_V2_AUX"
+{
+ if (CONST_INT_P (operands[4]))
+ {
+ emit_insn (gen_vunpackb<mode> (operands[0], operands[1], operands[2]));
+ DONE;
+ }
+})
+
+(define_insn "*vunpackb<mode>_mask"
+ [(set (match_operand:VI1_AVX512VL 0 "register_operand" "=v")
+ (vec_merge:VI1_AVX512VL
+ (unspec:VI1_AVX512VL
+ [(match_operand:VI1_AVX512VL 1 "nonimmediate_operand" "vm")
+ (match_operand:SI 2 "const_0_to_255_operand" "n")]
+ UNSPEC_VUNPACKB)
+ (match_operand:VI1_AVX512VL 3 "nonimm_or_0_operand" "0C")
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
+ "TARGET_AVX10_V2_AUX"
+ "vunpackb\t{%2, %1, %0%{%4%}%N3|%0%{%4%}%N3, %1, %2}"
+ [(set_attr "prefix" "evex")
+ (set_attr "mode" "<sseinsnmode>")])
+
+;; VPMOVSSDB - Symmetric signed saturation narrow (32-bit to 8-bit)
+
+
+(define_insn "vpmovssdb<mode>"
+ [(set (match_operand:V16QI 0 "register_operand" "=v")
+ (unspec:V16QI
+ [(match_operand:VI4_AVX512VL 1 "register_operand" "v")]
+ UNSPEC_VPMOVSSDB))]
+ "TARGET_AVX10_V2_AUX"
+ "vpmovssdb\t{%1, %0|%0, %1}"
+ [(set_attr "prefix" "evex")
+ (set_attr "mode" "<sseinsnmode>")])
+
+(define_expand "vpmovssdb<mode>_mask"
+ [(set (match_operand:V16QI 0 "register_operand")
+ (vec_merge:V16QI
+ (unspec:V16QI
+ [(match_operand:VI4_AVX512VL 1 "register_operand")]
+ UNSPEC_VPMOVSSDB)
+ (match_operand:V16QI 2 "nonimm_or_0_operand")
+ (match_operand:<avx512fmaskmode> 3 "register_or_constm1_operand")))]
+ "TARGET_AVX10_V2_AUX"
+{
+ if (CONST_INT_P (operands[3]))
+ {
+ emit_insn (gen_vpmovssdb<mode> (operands[0], operands[1]));
+ DONE;
+ }
+})
+
+(define_insn "*vpmovssdb<mode>_mask"
+ [(set (match_operand:V16QI 0 "register_operand" "=v")
+ (vec_merge:V16QI
+ (unspec:V16QI
+ [(match_operand:VI4_AVX512VL 1 "register_operand" "v")]
+ UNSPEC_VPMOVSSDB)
+ (match_operand:V16QI 2 "nonimm_or_0_operand" "0C")
+ (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")))]
+ "TARGET_AVX10_V2_AUX"
+ "vpmovssdb\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"
+ [(set_attr "prefix" "evex")
+ (set_attr "mode" "<sseinsnmode>")])
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-v2-aux-convert-10.c
b/gcc/testsuite/gcc.target/i386/avx10_2-v2-aux-convert-10.c
new file mode 100644
index 00000000000..b158e246490
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-v2-aux-convert-10.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx10-v2-aux -O2" } */
+/* { dg-final { scan-assembler-times "vpmovssdb\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovssdb\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovssdb\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovssdb\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovssdb\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovssdb\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovssdb\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovssdb\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovssdb\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[
\\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+__m128i test_mm_pmovssdb_epi8 (__m128i a) { return _mm_pmovssdb_epi8 (a); }
+__m128i test_mm_mask_pmovssdb_epi8 (__m128i w, __mmask8 u, __m128i a) { return
_mm_mask_pmovssdb_epi8 (w, u, a); }
+__m128i test_mm_maskz_pmovssdb_epi8 (__mmask8 u, __m128i a) { return
_mm_maskz_pmovssdb_epi8 (u, a); }
+
+__m128i test_mm256_pmovssdb_epi8 (__m256i a) { return _mm256_pmovssdb_epi8
(a); }
+__m128i test_mm256_mask_pmovssdb_epi8 (__m128i w, __mmask8 u, __m256i a) {
return _mm256_mask_pmovssdb_epi8 (w, u, a); }
+__m128i test_mm256_maskz_pmovssdb_epi8 (__mmask8 u, __m256i a) { return
_mm256_maskz_pmovssdb_epi8 (u, a); }
+
+__m128i test_mm512_pmovssdb_epi8 (__m512i a) { return _mm512_pmovssdb_epi8
(a); }
+__m128i test_mm512_mask_pmovssdb_epi8 (__m128i w, __mmask16 u, __m512i a) {
return _mm512_mask_pmovssdb_epi8 (w, u, a); }
+__m128i test_mm512_maskz_pmovssdb_epi8 (__mmask16 u, __m512i a) { return
_mm512_maskz_pmovssdb_epi8 (u, a); }
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-v2-aux-convert-9.c
b/gcc/testsuite/gcc.target/i386/avx10_2-v2-aux-convert-9.c
new file mode 100644
index 00000000000..df0048a45b4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-v2-aux-convert-9.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx10-v2-aux -O2" } */
+/* { dg-final { scan-assembler-times "vunpackb\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vunpackb\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vunpackb\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vunpackb\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vunpackb\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vunpackb\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vunpackb\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vunpackb\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vunpackb\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[
\\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+__m128i test_mm_unpackb_epi8 (__m128i a) { return _mm_unpackb_epi8 (a, 1); }
+__m128i test_mm_mask_unpackb_epi8 (__m128i w, __mmask16 u, __m128i a) { return
_mm_mask_unpackb_epi8 (w, u, a, 1); }
+__m128i test_mm_maskz_unpackb_epi8 (__mmask16 u, __m128i a) { return
_mm_maskz_unpackb_epi8 (u, a, 1); }
+
+__m256i test_mm256_unpackb_epi8 (__m256i a) { return _mm256_unpackb_epi8 (a,
2); }
+__m256i test_mm256_mask_unpackb_epi8 (__m256i w, __mmask32 u, __m256i a) {
return _mm256_mask_unpackb_epi8 (w, u, a, 2); }
+__m256i test_mm256_maskz_unpackb_epi8 (__mmask32 u, __m256i a) { return
_mm256_maskz_unpackb_epi8 (u, a, 2); }
+
+__m512i test_mm512_unpackb_epi8 (__m512i a) { return _mm512_unpackb_epi8 (a,
3); }
+__m512i test_mm512_mask_unpackb_epi8 (__m512i w, __mmask64 u, __m512i a) {
return _mm512_mask_unpackb_epi8 (w, u, a, 3); }
+__m512i test_mm512_maskz_unpackb_epi8 (__mmask64 u, __m512i a) { return
_mm512_maskz_unpackb_epi8 (u, a, 3); }
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index d79729f6086..c32387cea3e 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -11529,6 +11529,9 @@ proc check_effective_target_avx10_v2_aux { } {
foo ()
{
__asm__ volatile ("vcvtps2bf8\t{%%xmm1, %%xmm0|%%xmm0, %%xmm1}");
+ __asm__ volatile ("vcvtbf82ps\t{%%xmm1, %%xmm0|%%xmm0, %%xmm1}");
+ __asm__ volatile ("vunpackb\t$1, %%ymm1, %%ymm0");
+ __asm__ volatile ("vpmovssdb\t{%%zmm1, %%xmm0|%%xmm0, %%zmm1}");
}
} "-mavx10-v2-aux" ]
}
--
2.34.1
