On Mon, Mar 19, 2018 at 01:19:24PM +, Stefan Chulski wrote:
>
>
> > -Original Message-
> > From: Andrew Lunn [mailto:and...@lunn.ch]
> > Sent: Monday, March 19, 2018 3:08 PM
> > To: Stefan Chulski
> > Cc: Antoine Tenart ; Russell King - ARM
a few others as well. Maybe it makes sense to pull in that patch?
>
> To make this generic, we would have to have net_device carry a reference
> to a phylink instance, which I would rather not do. Were you possibly
> referring to this patch set:
>
> http://git.armlinux.org.uk
On Fri, Mar 30, 2018 at 06:36:15PM +0800, Jisheng Zhang wrote:
> Current suspend/resume implementation reuses the mvneta_open() and
> mvneta_close(), but it could be optimized to take only necessary
> actions during suspend/resume.
>
> One obvious problem of current implementation is: after hundre
#x27;m not sure. I'm pretty
sure that it used to work at some point, as I'm a heavy user of IPv6
internally, and I'm quite certain that I would have noticed a failure
such as this.
The setup on the target is eth2 is part of a Linux bridge device.
--
RMK's Patch system: ht
fp-bus.c | 162 ++
drivers/net/phy/sfp.c | 150 +---
include/linux/sfp.h | 18 +--
5 files changed, 243 insertions(+), 125 deletions(-)
--
RMK's Patch system: http://www.ar
Hi Rob,
This patch, and the patches that make use of it have now been merged
into their respective trees, but I note that you haven't reviewed
this patch. Obviously, providing an ack is now moot, but it would
still be good for a response before 4.16-final is released.
On Tue, Feb 27, 2018 at 03:
On Thu, Sep 21, 2017 at 03:45:22PM +0200, Antoine Tenart wrote:
> Convert the PPv2 driver to use phylink, which models the MAC to PHY
> link. The phylink support is made such a way the GoP link IRQ can still
> be used: the two modes are incompatible and the GoP link IRQ will be
> used if no PHY is
On Mon, Sep 25, 2017 at 11:55:14AM +0200, Antoine Tenart wrote:
> Hi Russell,
>
> On Fri, Sep 22, 2017 at 12:07:31PM +0100, Russell King - ARM Linux wrote:
> > On Thu, Sep 21, 2017 at 03:45:22PM +0200, Antoine Tenart wrote:
> > > Convert the PPv2 driver to use phylink, whi
On Mon, Sep 25, 2017 at 01:53:03PM +0200, Antoine Tenart wrote:
> On Mon, Sep 25, 2017 at 11:45:32AM +0100, Russell King - ARM Linux wrote:
> > Can you describe what the GoP link IRQ is doing please?
>
> In cases where there is no PHY connected to the MAC and no SFP cage is
> us
On Thu, Aug 16, 2018 at 10:35:16PM +0200, Marc Haber wrote:
> On Mon, Jun 25, 2018 at 05:41:27PM +0100, Peter Robinson wrote:
> > So with that and the other fix there was no improvement, with those
> > and the BPF JIT disabled it works, I'm not sure if the two patches
> > have any effect with the J
On Fri, Aug 17, 2018 at 02:40:19PM +0200, Daniel Borkmann wrote:
> I'd have one potential bug suspicion, for the 4.18 one you were trying,
> could you run with the below patch to see whether it would help?
I think this is almost certainly the problem - looking at the history,
it seems that the "-4
On Mon, Sep 17, 2018 at 05:19:57PM +0300, Baruch Siach wrote:
> When the switching to the SFP detected link mode update the main
> link_interface field as well. Otherwise, the link fails to come up when
> the configured 'phy-mode' defers from the SFP detected mode.
>
> This fixes 1GB SFP module li
On Wed, Dec 27, 2017 at 11:14:45PM +0100, Antoine Tenart wrote:
> This patch enables the fourth network interface on the Marvell
> Macchiatobin. It is configured in the 2500Base-X PHY mode.
>
> Signed-off-by: Antoine Tenart
> ---
> arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 8
>
On Wed, Dec 27, 2017 at 11:42:52PM +0100, Antoine Tenart wrote:
> Hi Russell,
>
> On Wed, Dec 27, 2017 at 10:24:01PM +, Russell King - ARM Linux wrote:
> > On Wed, Dec 27, 2017 at 11:14:45PM +0100, Antoine Tenart wrote:
> > >
> > > +&cps_eth2 {
&g
gt; >> On Wed, Dec 27, 2017 at 10:24:01PM +, Russell King - ARM Linux wrote:
> > >>> On Wed, Dec 27, 2017 at 11:14:45PM +0100, Antoine Tenart wrote:
> > >>>>
> > >>>> +&cps_eth2 {
> > >>>> + /* CPS Lane
On Thu, Dec 28, 2017 at 11:04:16AM +0100, Antoine Tenart wrote:
> Hi Russell,
>
> On Wed, Dec 27, 2017 at 11:20:00PM +, Russell King - ARM Linux wrote:
> > On Wed, Dec 27, 2017 at 11:42:52PM +0100, Antoine Tenart wrote:
> > >
> > > What do you suggest to des
On Fri, Dec 29, 2017 at 12:12:15PM +0100, Marcin Wojtas wrote:
> Hi Russell,
>
> I see that I misspelled your email address, hence the series remained
> unnoticed:
> https://lkml.org/lkml/2017/12/18/216
>
> In terms of the phylink support, I think the most important are:
> * 3/8
> https://lkml.o
()
drivers/net/phy/phylink.c | 15 +++
drivers/net/phy/sfp-bus.c | 101 +-
drivers/net/phy/sfp.c | 24 +++
include/linux/sfp.h | 36 -
4 files changed, 114 insertions(+), 62 deletions(-)
--
RMK's Patch system:
y/mdio_bus.c | 65 +--
drivers/net/phy/phy-core.c | 216 -
drivers/net/phy/phy_device.c | 50 +
include/linux/mdio.h | 3 +
include/linux/phy.h | 40
7 files changed, 487 insertions(+), 343 deletions(-)
--
RMK's Patch system: h
| 110 +++
drivers/net/phy/phy-c45.c| 33 +
drivers/net/phy/phy-core.c | 43 +
include/linux/phy.h | 3 ++
4 files changed, 148 insertions(+), 41 deletions(-)
--
RMK's Patch system: http://www.armlinux.org.uk/develop
Hi,
Unfortunately, I've found this afternoon that this patch causes a
regression for Marvell PHYs connected in RGMII mode - so please do
not apply this patch. The remainder of the series is fine.
Thanks.
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.
Hi Marcin,
On Sat, Dec 30, 2017 at 05:34:23PM +0100, Marcin Wojtas wrote:
> Yes, I already split the series and will send first one right away. I
> will be followed by MDIO bus / PHY handling proposal, including the
> bits related to phylink. I'm looking forward to your opinion on that
> once sent
On Sun, Dec 31, 2017 at 09:10:39AM +0100, Andrew Lunn wrote:
> > +/**
> > + * phy_save_page() - take the bus lock and save the current page
> > + * @phydev: a pointer to a &struct phy_device
> > + *
> > + * Take the MDIO bus lock, and return the current page number. On error,
> > + * returns a nega
On Mon, Jan 01, 2018 at 10:35:25AM +, Stefan Chulski wrote:
>
> > -Original Message-
> > Hi Russell,
> >
> > Indeed. RGMII MAC behaves same way, although it shouldn't be named as 'in-
> > band' to be on par with the specifications. Anyway - this one is rather a
> > stub for
> > being
Hi,
I'm not entirely convinced that adding support for this is correct,
so I'm going to drop this patch from a re-post of the series today.
Base-PX, being EPON, requires additional layers (eg, MPMC on top of
the MAC to control transmission), and it's not clear whether the
SFP module takes care of
On Sun, Dec 31, 2017 at 10:07:14AM +, Russell King - ARM Linux wrote:
> On Sun, Dec 31, 2017 at 09:10:39AM +0100, Andrew Lunn wrote:
> > > +/**
> > > + * phy_save_page() - take the bus lock and save the current page
> > > + * @phydev: a pointer to a &struct p
y/mdio_bus.c | 65 +--
drivers/net/phy/phy-core.c | 216 -
drivers/net/phy/phy_device.c | 50 +
include/linux/mdio.h | 3 +
include/linux/phy.h | 40
7 files changed, 490 insertions(+), 346 deletions(-)
--
RMK's Patch system: h
on
to determine the link properties without needing the link parameters to
be explicitly stated in DT - that is a subject of a future patch.
drivers/net/ethernet/marvell/Kconfig | 2 +-
drivers/net/ethernet/marvell/mvneta.c | 687 --
drivers/net/phy/fi
On Tue, Jan 02, 2018 at 05:22:42PM +, Russell King - ARM Linux wrote:
> Hi,
>
> This series converts mvneta to use phylink, which is necessary to
> support the SFP cages on SolidRun's Clearfog platform. This series just
> converts mvneta without adding the DT parts - h
On Wed, Jan 03, 2018 at 04:08:30PM +0100, Andrew Lunn wrote:
> > > >>> diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
> > > >>> index 4f8423a948d5..70459a28f3a1 100644
> > > >>> --- a/include/linux/phy/phy.h
> > > >
On Wed, Jan 03, 2018 at 11:04:31AM -0500, David Miller wrote:
> From: Russell King - ARM Linux
> Date: Tue, 2 Jan 2018 10:52:18 +
>
> > This series resolves races with various accesses to PHY registers.
> > The first five patches are necessary before we add phylink suppo
On Wed, Jan 03, 2018 at 05:00:47PM +, Stefan Chulski wrote:
> > > > -Original Message-
> > > > Hi Russell,
> > > >
> > > > Indeed. RGMII MAC behaves same way, although it shouldn't be named
> > > > as 'in- band' to be on par with the specifications. Anyway - this
> > > > one is rather a
On Wed, Jan 03, 2018 at 03:09:17PM +0100, Andrew Lunn wrote:
> The mv88e6352 family has a SERDES interface which can be used for
> example to connect to SFF/SFP modules. This interface has a couple of
> statistics counters. Add support for including these counters in the
> output of ethtool -S.
Hi
e PHY_INTERFACE_MODE_2500BASEX:
> > + mode = PHY_MODE_2500SGMII;
> > + break;
>
> I think this is the source of confusion with linux/phy.h and
> linux/phy/phy.h.
>
> What would PHY_INTERFACE_MODE_2500SGMII use?
>
> Where is this all getting confused?
On Thu, Jan 04, 2018 at 08:00:53AM +0100, Heiner Kallweit wrote:
> Parameter mask of phy_modify() holds the bits to be cleared.
> In the mentioned commit parameter mask seems to be inverted in
> few cases, what IMO is wrong (see example).
I'd be grateful if you could list those that you think are
On Fri, Jan 05, 2018 at 02:44:07AM +0200, Ivan Khoronzhuk wrote:
> + G.Strashko
> The below change also brokes phy connect for am572x..
>
> int genphy_restart_aneg(struct phy_device *phydev)
> {
> - int ctl = phy_read(phydev, MII_BMCR);
> -
> - if (ctl < 0)
> - return c
On Tue, Jan 09, 2018 at 03:10:08PM +0100, Andrew Lunn wrote:
> On Tue, Jan 09, 2018 at 12:11:21PM +0100, Geert Uytterhoeven wrote:
> > In case of success, the return values of (__)phy_write() and
> > (__)phy_modify() are not compatible: (__)phy_write() returns 0, while
> > (__)phy_modify() returns
On Tue, Jan 09, 2018 at 09:59:45AM +0100, Antoine Tenart wrote:
> This patch adds the 2500Base-X PHY mode support in the Marvell PPv2
> driver. 2500Base-X is quite close to 1000Base-X and SGMII modes and uses
> nearly the same code path.
For 2500Base-X, do you report a speed of 2500Mbps through et
On Tue, Jan 09, 2018 at 09:59:45AM +0100, Antoine Tenart wrote:
> This patch adds the 2500Base-X PHY mode support in the Marvell PPv2
> driver. 2500Base-X is quite close to 1000Base-X and SGMII modes and uses
> nearly the same code path.
Sorry, also...
> @@ -4668,6 +4692,10 @@ static void mvpp2_p
On Tue, Jan 09, 2018 at 03:48:13PM +0100, Andrew Lunn wrote:
> > > I took a quick look at the uses of phy_modify(). I don't see any uses
> > > of the return code other than as an error indicator. So having it
> > > return 0 on success seems like a better fix.
> >
> > I'd like to avoid that, becaus
On Tue, Jan 09, 2018 at 07:25:40PM +0100, Geert Uytterhoeven wrote:
> Hi Russell,
>
> On Tue, Jan 9, 2018 at 3:22 PM, Russell King - ARM Linux
> wrote:
> > On Tue, Jan 09, 2018 at 03:10:08PM +0100, Andrew Lunn wrote:
> >> On Tue, Jan 09, 2018 at 12:11:21PM +010
hat this patch
is wrong and will introduce a regression.
Thanks.
>
> Cc: Russell King
> Cc: Ingo Molnar
> Cc: Christian Borntraeger
> Cc: "Peter Zijlstra (Intel)"
> Cc: linux-arm-ker...@lists.infradead.org
> Signed-off-by: Kees Cook
> ---
> arch/arm/Kc
On Thu, Jan 11, 2018 at 10:48:35AM -0500, David Miller wrote:
> From: Geert Uytterhoeven
> Date: Tue, 9 Jan 2018 12:11:21 +0100
>
> > In case of success, the return values of (__)phy_write() and
> > (__)phy_modify() are not compatible: (__)phy_write() returns 0, while
> > (__)phy_modify() return
On Thu, Jan 11, 2018 at 05:00:03PM +0100, Geert Uytterhoeven wrote:
> On Thu, Jan 11, 2018 at 4:54 PM, Geert Uytterhoeven
> wrote:
> > On Thu, Jan 11, 2018 at 4:53 PM, Russell King - ARM Linux
> > wrote:
> >> On Thu, Jan 11, 2018 at 10:48:35AM -0500, David Mill
n for reviewing these patches is the 'hygiene'
> argument. When a patch refers to hygiene it is concerned with stopping
> speculation on an unconstrained or insufficiently constrained pointer
> value under userspace control. That by itself is not sufficient for
> attack (per cu
On Fri, Jan 12, 2018 at 08:51:26AM +0100, Antoine Tenart wrote:
> Hi all,
>
> This series adds 1000BaseX and 2500BaseX support to the Marvell PPv2
> driver. In order to use it, the 2.5 SGMII mode is added in the Marvell
> common PHY driver (cp110-comphy).
>
> This was tested on a mcbin.
>
> All
On Thu, Nov 29, 2018 at 12:40:11PM +0200, Baruch Siach wrote:
> The link modes that sfp_parse_support() detects are stored in the
> 'modes' bitmap. There is no reason to make an exception for 1000Base-PX
> or 1000Base-BX10.
I think you may be carrying some local patch, have an incorrect merge,
or
On Thu, Nov 29, 2018 at 02:30:53PM +0200, Baruch Siach wrote:
> Hi Russell,
>
> Russell King - ARM Linux writes:
> > On Thu, Nov 29, 2018 at 12:40:11PM +0200, Baruch Siach wrote:
> >> The link modes that sfp_parse_support() detects are stored in the
> >> 'mod
On Thu, Nov 29, 2018 at 11:31:23AM -0800, Florian Fainelli wrote:
>
>
> On 11/29/2018 4:49 AM, Baruch Siach wrote:
> > The mvpp2_phylink_validate() relies on the interface field of
> > phylink_link_state to determine valid link modes. However, when called
> > from phylink_sfp_module_insert() this
On Tue, Dec 04, 2018 at 12:19:54PM +0200, Baruch Siach wrote:
> Hi Russell,
>
> On Thu, Nov 29, 2018 at 10:00:43PM +, Russell King - ARM Linux wrote:
> > On Thu, Nov 29, 2018 at 11:31:23AM -0800, Florian Fainelli wrote:
> > > On 11/29/2018 4:49 AM, Baruch
On Mon, Dec 03, 2018 at 05:54:55PM -0600, Rob Herring wrote:
> On Mon, Nov 12, 2018 at 12:31:02PM +, Russell King wrote:
> > Signed-off-by: Russell King
>
> Needs a better subject and a commit msg.
Hmm, not sure why it didn't contain:
"dt-bindings: net: mvneta: add phys property
Add an opt
Hi,
I'm experiencing very slow networking on my OMAP4430 SDP board, which
uses the SPI ethernet chip KS8851.
The initial symptom I noticed is that tftping the 3MB kernel image
inside Linux takes more than 5 minutes. Running tcpdump on the tftp
server shows:
13:13:29.0183
On Thu, Dec 06, 2018 at 08:31:54AM -0800, Tony Lindgren wrote:
> Hi,
>
> * Russell King - ARM Linux [181206 13:23]:
> > It looks very much like a receive problem - in that the board is not
> > always aware of a packet having been received until it attempts to
> > t
On Fri, Dec 07, 2018 at 09:37:54AM +0530, Kishon Vijay Abraham I wrote:
> Hi Russell,
>
> On 05/12/18 9:00 PM, Rob Herring wrote:
> > On Wed, Dec 5, 2018 at 5:00 AM Russell King - ARM Linux
> > wrote:
> >>
> >> On Mon, Dec 03, 2018 at 05:54:55PM -0600,
On Fri, Dec 07, 2018 at 04:43:27PM +0530, Kishon Vijay Abraham I wrote:
> Russell,
>
> No, I haven't merged patches from this series. That would have failed
> compilation since Grygorii modified enum phy_mode which is used in this
> series.
> You have also noted this in your cover letter.
Ok, bu
On Fri, Dec 07, 2018 at 05:30:52PM +0530, Kishon Vijay Abraham I wrote:
> Hi,
>
> On 07/12/18 5:03 PM, Russell King - ARM Linux wrote:
> > On Fri, Dec 07, 2018 at 04:43:27PM +0530, Kishon Vijay Abraham I wrote:
> >> Russell,
> >>
> >> No, I haven't m
Hi Tony,
You know most of what's been going on from IRC, but here's the patch
which gets me:
1) working interrupts for networking
2) solves the stuck-wakeup problem
It also contains some of the debug bits I added.
I think what this means is that we should strip out ec0daae685b2
("gpio: omap: Ad
On Fri, Dec 07, 2018 at 11:03:12AM -0800, Tony Lindgren wrote:
> * Tony Lindgren [181207 18:14]:
> > Hi,
> >
> > * Russell King - ARM Linux [181207 18:01]:
> > > Hi Tony,
> > >
> > > You know most of what's been going on from IRC, but
On Mon, Oct 22, 2018 at 01:47:48PM +0100, Jose Abreu wrote:
> Hello,
>
> On 22-10-2018 13:28, Andrew Lunn wrote:
> >> EXPORT_SYMBOL_GPL(gen10g_resume);
> >> @@ -327,7 +381,7 @@ struct phy_driver genphy_10g_driver = {
> >>.phy_id = 0x,
> >>.phy_id_mask= 0x,
> >>
On Tue, Oct 23, 2018 at 11:17:50AM +0100, Jose Abreu wrote:
> On 22-10-2018 18:13, Florian Fainelli wrote:
> > On 10/22/18 8:48 AM, Russell King - ARM Linux wrote:
> >> On Mon, Oct 22, 2018 at 01:47:48PM +0100, Jose Abreu wrote:
> >>> Hello,
> >>>
&g
On Tue, Oct 23, 2018 at 11:28:09AM +0100, Jose Abreu wrote:
> On 23-10-2018 11:20, Russell King - ARM Linux wrote:
> > I have no idea what you're proposing there - your patches weren't copied
> > to me.
>
> They just set / unset MDIO_CTRL1_LPOWER bit in PCS. I find
On Tue, Nov 06, 2018 at 03:38:44PM -0800, David Miller wrote:
> From: Florian Fainelli
> Date: Tue, 6 Nov 2018 15:29:10 -0800
>
> > This patch series allows warning an user that the generic PHY driver(s)
> > are used when a SFP incorporates a PHY (e.g: 1000BaseT SFP) which is
> > likely not goin
On Tue, Nov 06, 2018 at 04:09:35PM -0800, Florian Fainelli wrote:
> On 11/6/18 4:03 PM, Russell King - ARM Linux wrote:
> > On Tue, Nov 06, 2018 at 03:38:44PM -0800, David Miller wrote:
> >> From: Florian Fainelli
> >> Date: Tue, 6 Nov 2018 15:29:10 -0800
> >
Hi,
This series adds support for dynamically switching between 1Gbps
and 2.5Gbps networking for the Marvell Armada 38x SoCs, tested on
Armada 388 on the Clearfog platform.
This is necessary to be able to connect (eg) a Clearfog platform
with a Macchiatobin platform via the SFP sockets, as Clearfo
On Wed, Nov 14, 2018 at 01:39:29PM +0530, Kishon Vijay Abraham I wrote:
> Hi,
>
> On 12/11/18 5:59 PM, Russell King - ARM Linux wrote:
> > Hi,
> >
> > This series adds support for dynamically switching between 1Gbps
> > and 2.5Gbps networking for the Marvell Arma
On Wed, Nov 14, 2018 at 02:18:14PM +0530, Kishon Vijay Abraham I wrote:
> Hi,
>
> On 12/11/18 6:01 PM, Russell King wrote:
> > Signed-off-by: Russell King
> > ---
> > drivers/net/ethernet/marvell/mvneta.c | 58
> > ++-
> > 1 file changed, 51 insertions(+), 7 dele
On Tue, Dec 18, 2018 at 05:34:27PM +0800, Yunsheng Lin wrote:
> On 2018/12/17 22:36, Russell King - ARM Linux wrote:
> > As I've previously stated, the behaviour I've seen is _both_ pause bits
> > clear:
> >
> > If I set bit 10 (pause), and read back to confi
On Sun, Dec 30, 2018 at 02:35:32PM -0800, Florian Fainelli wrote:
> There are at least two user space configuration knobs that we could
> extend to support dynamically switching between copper and fiber interface:
>
> ethtool -s port tp|mii|fiber..
How does that work if you have a SFP plugged in
On Tue, Dec 11, 2018 at 05:32:28PM +0100, Antoine Tenart wrote:
> The mvpp2_phylink_validate() function sets all modes that are
> supported by a given PPv2 port. A recent change made all ports to
> advertise they support 10G modes in certain cases. This is not true,
> as only the port #0 can do so.
On Tue, Dec 11, 2018 at 07:53:42PM +0200, Baruch Siach wrote:
> That is, something like this, right?
>
> diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> index 125ea99418df..04cb0241ca2b 100644
> --- a/drivers/net/ethernet/marvell/
On Fri, Dec 14, 2018 at 10:34:51AM +0100, Antoine Tenart wrote:
> The mvpp2_phylink_validate() function sets all modes that are
> supported by a given PPv2 port. A recent change made all ports to
> advertise they support 10G modes in certain cases. This is not true,
> as only the port #0 can do so.
On Fri, Dec 14, 2018 at 05:09:44PM +0100, Antoine Tenart wrote:
> Hi Russell,
>
> On Fri, Dec 14, 2018 at 04:02:50PM +, Russell King - ARM Linux wrote:
> > On Fri, Dec 14, 2018 at 10:34:51AM +0100, Antoine Tenart wrote:
> > > The mvpp2_phylink_validate() function
-a cmd shows both still have tx and rx pause enable.
That's where the problem is - as far as the network device and Linux
is concerned, pause was successfully negotiated. However, as the
advertisment register has ended up with the pause mode bits cleared,
Linux doesn't realise that w
On Mon, Dec 17, 2018 at 05:42:20PM +0800, Yunsheng Lin wrote:
> On 2018/12/15 18:37, Russell King - ARM Linux wrote:
> > On Sat, Dec 15, 2018 at 04:07:42PM +0800, Yunsheng Lin wrote:
> >> There seems to be some problem with pause subsequent negotiation.
> >> We reverte
On Sat, Sep 22, 2018 at 10:09:44PM +0300, Baruch Siach wrote:
> When connecting a PHY to phylink use the detected interface. Otherwise,
> the link fails to come up when the configured 'phy-mode' differs from
> the SFP detected mode.
>
> This fixes 1GB SFP module link up on eth3 of the Macchiatobin
On Thu, Oct 04, 2018 at 07:43:59PM +0200, Ard Biesheuvel wrote:
> (+ Arnd, Russell, Catalin, Will)
>
> On 4 October 2018 at 19:36, Ben Hutchings
> wrote:
> > NET_IP_ALIGN is supposed to be defined as 0 if DMA writes to an
> > unaligned buffer would be more expensive than CPU access to unaligned
On Thu, May 17, 2018 at 10:29:29AM +0200, Antoine Tenart wrote:
> Since v2:
> - Removed the SFP description from the DB boards, as their SFP cages
> are wired properly. We now use fixed-link.
I think you mean "improperly" here.
--
RMK's Patch system: http://www.armlinux.org.uk/developer/pa
On Thu, May 17, 2018 at 02:41:28PM +0200, Andrew Lunn wrote:
> On Thu, May 17, 2018 at 10:29:06AM +0200, Antoine Tenart wrote:
> > The SFF,SFP documentation is clear about making all the DT properties,
> > with the exception of the compatible, optional. In practice this is not
> > the case and with
On Thu, May 17, 2018 at 03:04:06PM +0200, Andrew Lunn wrote:
> On Thu, May 17, 2018 at 02:56:48PM +0200, Antoine Tenart wrote:
> > Hi Andrew,
> >
> > On Thu, May 17, 2018 at 02:41:28PM +0200, Andrew Lunn wrote:
> > > On Thu, May 17, 2018 at 10:29:06AM +0200, Antoine Tenart wrote:
> > > > The SFF,S
On Fri, Nov 17, 2017 at 02:58:05PM +0900, David Miller wrote:
> From: Jan Kundrát
> Date: Wed, 15 Nov 2017 12:39:33 +0100
>
> > Without this patch, but with CONFIG_SFP enabled, my NIC won't detect
> > module unplugging, which is suboptimal.
> >
> > I'm using an OEM "Cisco compatible" DWDM fixed-
On Wed, Nov 29, 2017 at 07:33:44PM +, Yan Markman wrote:
> Hi Russel
>
> On my board I have [Marvell 88E1510] phy working with STATUS-POLLING
> I see some inconsistencies -- first ifconfig-up is different from furthers,
> no "link is down" reports.
> Please refer the behavior example below.
On Wed, Nov 29, 2017 at 09:06:56PM +, Yan Markman wrote:
> The attached p21 patch doesn't change anything.
> But another one from the mail-text is good
> void phylink_disconnect_phy(struct phylink *pl)
> + pl->phy_state.link = false;
>
> There still (not for my MRVL-P
tions therein, I can't
comment further other than stating that it works for three different
implementations.
Maybe you could try and work out what's going on with the p21 patch
in your case?
> -Original Message-
> From: Russell King - ARM Linux [mailto:li...@armlinux.org
On Thu, Nov 30, 2017 at 10:10:18AM +, Russell King - ARM Linux wrote:
> On Thu, Nov 30, 2017 at 08:51:21AM +, Yan Markman wrote:
> > The phylink_stop is called before phylink_disconnect_phy
> > You could see in mvpp2.c:
> >
> > mvpp2_stop_dev() {
> &g
Hi,
Here are four phylink fixes:
- the "options" is a big-endian value, we must test the bits taking the
endian-ness into account.
- improve the handling of RX_LOS polarity, taking no RX_LOS polarity
bits set to mean there is no RX_LOS functionality provided.
- do not report modules that requi
On Thu, Nov 30, 2017 at 04:50:50PM +0100, Andrew Lunn wrote:
> On Thu, Nov 30, 2017 at 10:00:35AM +0530, Bhaskar Upadhaya wrote:
> > Add 2.5G SGMII interface mode(PHY_INTERFACE_MODE_2500SGMII)
> > in existing phy_interface list.As auto-negotiation is not
> > supported for 2.5G SGMII
>
> Hi Bhaskar
On Thu, Nov 30, 2017 at 06:41:27PM +0100, Andrew Lunn wrote:
> SGMII supports passing auto-negotiation results from the PHY to the
> MAC. 1000BASE-X does not.
>
> SGMII supports the PHY running at 10, 100, and 1000 Mbps. But to
> support this, the MAC needs to replicate the bits 100, or 10 times
>
On Thu, Nov 30, 2017 at 07:26:21PM +0100, Andrew Lunn wrote:
> On Thu, Nov 30, 2017 at 06:15:20PM +, Russell King - ARM Linux wrote:
> > On Thu, Nov 30, 2017 at 06:41:27PM +0100, Andrew Lunn wrote:
> > > SGMII supports passing auto-negotiation results from the PHY to the
>
On Thu, Nov 30, 2017 at 11:57:42AM -0800, Florian Fainelli wrote:
> Some subsystems like DSA may be trying to connect to a PHY through OF first,
> and then attempt a connect using a local MDIO bus, demote the error message:
> "unable to find PHY node" into a debug print.
Maybe it would be better t
/phylink.c | 341 +-
drivers/net/phy/sfp-bus.c | 120 +-
include/linux/phy.h | 14 ++
include/linux/phylink.h | 196 +++---
include/linux/sfp.h | 57 +--
6 files changed, 591 insertio
On Fri, Dec 01, 2017 at 10:23:07AM +, Russell King - ARM Linux wrote:
> Hi,
>
> This series, which follows on from the fixes posted earlier, improves
> the phylink/sfp support. Changes included here are:
Sorry, just realised I sent the patches without the net-next annotati
On Fri, Dec 01, 2017 at 11:07:22AM -0600, Grygorii Strashko wrote:
> Hi Russell,
>
> On 11/30/2017 07:28 AM, Russell King - ARM Linux wrote:
> > On Thu, Nov 30, 2017 at 10:10:18AM +, Russell King - ARM Linux wrote:
> >> On Thu, Nov 30, 2017 at 08:51:21AM +, Yan
On Fri, Dec 01, 2017 at 09:36:42AM -0800, Florian Fainelli wrote:
> On 12/01/2017 09:24 AM, Russell King - ARM Linux wrote:
> > On Fri, Dec 01, 2017 at 11:07:22AM -0600, Grygorii Strashko wrote:
> >> Hi Russell,
> >>
> >> On 11/30/2017 07:28 AM, Russell King - A
alled erratically.
> BTW: It's seems your below patch should be present anyway.
> +++ b/drivers/net/phy/phylink.c
> @@ -798,6 +798,7 @@ void phylink_disconnect_phy(struct phylink *pl)
> + pl->phy_state.link = false;
Here's an example without the above on Macchiat
On Mon, Dec 04, 2017 at 11:20:49AM -0500, David Miller wrote:
> From: Arvind Yadav
> Date: Sun, 3 Dec 2017 00:56:15 +0530
>
> > The platform_get_irq() function returns negative if an error occurs.
> > zero or positive number on success. platform_get_irq() error checking
> > for zero is not corre
On Mon, Dec 04, 2017 at 11:34:48AM -0500, David Miller wrote:
> From: Russell King - ARM Linux
> Date: Mon, 4 Dec 2017 16:24:47 +
>
> > On Mon, Dec 04, 2017 at 11:20:49AM -0500, David Miller wrote:
> >> From: Arvind Yadav
> >> Date: Sun, 3 Dec 201
On Tue, Dec 05, 2017 at 01:12:23PM +0300, Sergei Shtylyov wrote:
>Well, we can have:
>
> return r && r->start ? r->start : -ENXIO;
>
> instead of:
>
> return r ? r->start : -ENXIO;
>
> at the end of platform_get_irq(). But I don't really think it's worth doing
> -- request_irq()
On Wed, Aug 08, 2018 at 03:00:13PM +0200, Marek Behún wrote:
> Btw: some SFP modules can operate in 2500BASE-X mode. Currently the SFP
> driver does not support this, and there even isn't code in the
> mainline kernel for mvneta to switch to 2500BASEX. On Armada 3720 this
> has to be done by config
You might want to fix the subject line.
On Wed, Aug 08, 2018 at 08:54:12PM +0200, Andrew Lunn wrote:
> Convert the state numbers, device state, etc from numbers to strings
> when printing debug messages.
>
> Signed-off-by: Andrew Lunn
> ---
> drivers/net/phy/sfp.c | 76 +
On Tue, Nov 07, 2017 at 07:49:09PM -0800, Florian Fainelli wrote:
> The extended ID options 16-bit value is big-endian (and actually annotated as
> such), but we would be accessing it with our CPU endian, which would not
> allow the correct detection of whether the LOS signal is inverted or not.
>
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