From: Kegl Rohit Sent: Sunday, November 15, 2020 1:37 AM
> On Sat, Nov 14, 2020 at 2:58 AM Andy Duan wrote:
> >
> > From: Kegl Rohit Sent: Friday, November 13, 2020
> > 8:21 PM
> > > On Fri, Nov 13, 2020 at 8:33 AM Kegl Rohit wrote:
> > > >
> >
From: Kegl Rohit Sent: Friday, November 13, 2020 8:21 PM
> On Fri, Nov 13, 2020 at 8:33 AM Kegl Rohit wrote:
> >
> > > What are the addresses of the ring entries?
> > > I bet there is something wrong with the cache coherency and/or
> > > flushing.
> > >
> > > So the MAC hardware has done the writ
From: Kegl Rohit Sent: Wednesday, November 11, 2020 10:27
PM
> Hello!
>
> We are using a imx6q platform.
> The fec interface is used to receive a continuous stream of custom / raw
> ethernet packets. The packet size is fixed ~132 bytes and they get sent every
> 250µs.
>
> While testing I observ
From: zhangqilong ent: Monday, November 9, 2020 10:52
AM
> > From: Zhang Qilong Sent: Sunday, November 8,
> > 2020 5:53 PM
> > > pm_runtime_get_sync() will increment pm usage at first and it will
> > > resume the device later. If runtime of the device has error or
> > > device is in inaccessible
From: Zhang Qilong Sent: Sunday, November 8, 2020
5:53 PM
> pm_runtime_get_sync() will increment pm usage at first and it will resume the
> device later. If runtime of the device has error or device is in inaccessible
> state(or other error state), resume operation will fail. If we do not call pu
From: Greg Ungerer Sent: Wednesday, October 28, 2020 1:23
PM
> Some (apparently older) versions of the FEC hardware block do not like the
> MMFR register being cleared to avoid generation of MII events at
> initialization
> time. The action of clearing this register results in no future MII even
From: Greg Ungerer Sent: Tuesday, October 27, 2020 8:18 AM
> Hi Andy,
>
> On 22/10/20 7:04 pm, Andy Duan wrote:
> > From: Greg Ungerer Sent: Thursday, October 22,
> > 2020 9:14 AM
> >> Hi Andrew,
> >>
> >> On 21/10/20 11:37 pm
From: Greg Ungerer Sent: Thursday, October 22, 2020 9:14
AM
> Hi Andrew,
>
> On 21/10/20 11:37 pm, Andrew Lunn wrote:
> >> +if (fep->quirks & FEC_QUIRK_CLEAR_SETUP_MII) {
> >> +/* Clear MMFR to avoid to generate MII event by writing
> MSCR.
> >> + * MII event generati
From: Greg Ungerer Sent: Thursday, October 22, 2020 9:14
AM
> Hi Andrew,
>
> On 21/10/20 11:37 pm, Andrew Lunn wrote:
> >> +if (fep->quirks & FEC_QUIRK_CLEAR_SETUP_MII) {
> >> +/* Clear MMFR to avoid to generate MII event by writing
> MSCR.
> >> + * MII event generati
From: Greg Ungerer Sent: Wednesday, October 21, 2020 9:52
AM
> Hi Andrew,
>
> Thanks for the quick response.
>
>
> On 20/10/20 12:40 pm, Andrew Lunn wrote:
> > On Tue, Oct 20, 2020 at 12:14:04PM +1000, Greg Ungerer wrote:
> >> Hi Andrew,
> >>
> >> Commit f166f890c8f0 ("[PATCH] net: ethernet: f
From: Chris Healy Sent: Tuesday, October 20, 2020 9:07 PM
> On Mon, Oct 19, 2020 at 8:02 PM Andy Duan wrote:
> >
> > From: Andrew Lunn Sent: Tuesday, October 20, 2020
> > 10:40 AM
> > > On Tue, Oct 20, 2020 at 12:14:04PM +1000, Greg Ungerer wrote:
> > &
From: Andrew Lunn Sent: Tuesday, October 20, 2020 10:40 AM
> On Tue, Oct 20, 2020 at 12:14:04PM +1000, Greg Ungerer wrote:
> > Hi Andrew,
> >
> > Commit f166f890c8f0 ("[PATCH] net: ethernet: fec: Replace interrupt
> > driven MDIO with polled IO") breaks the FEC driver on at least one of
> > the Co
From: David Miller Sent: Thursday, September 24, 2020
4:32 AM
> From: Stefan Riedmueller
> Date: Wed, 23 Sep 2020 16:25:28 +0200
>
> > From: Christian Hemp
> >
> > Make use of device tree alias for device enumeration to keep the
> > device order consistent with the naming in the datasheet.
> >
From: Zhang Changzhong Sent: Monday, September 14,
2020 9:14 PM
> Fixes the following W=1 kernel build warning(s):
>
> drivers/net/ethernet/freescale/fec_ptp.c:523:6: warning:
> variable 'ns' set but not used [-Wunused-but-set-variable]
> 523 | u64 ns;
> | ^~
>
> After commit 660
From: Zhang Changzhong Sent: Monday, September 7,
2020 8:50 PM
> Because clk_prepare_enable() and clk_disable_unprepare() already checked
> NULL clock parameter, so the additional checks are unnecessary, just remove
> them.
>
> Reported-by: Hulk Robot
> Signed-off-by: Zhang Changzhong
Acked-b
From: Chris Healy Sent: Monday, July 27, 2020 11:01 AM
> It appears quite a few boards were affected by this micrel PHY driver change:
>
> 2ccb0161a0e9eb06f538557d38987e436fc39b8d
> 80bf72598663496d08b3c0231377db6a99d7fd68
> 2de00450c0126ec8838f72157577578e85cae5d8
> 820f8a870f6575acda1bf7f1a03c7
From: Chris Healy Sent: Monday, July 27, 2020 10:40 AM
> Actually, I was a little quick to say it went from broken to working.
>
> With net-next, I'm getting CRC errors on 100% of inbound packets.
> With bcf3440c6dd78bfe5836ec0990fe36d7b4bb7d20 reverted, I drop down to a
> 1% error rate.
>
> Thi
From: Chris Healy Sent: Monday, July 27, 2020 10:13 AM
> On Sun, Jul 26, 2020 at 7:06 PM Laurent Pinchart
> wrote:
> >
> > On Mon, Jul 27, 2020 at 04:24:02AM +0300, Laurent Pinchart wrote:
> > > On Mon, Apr 27, 2020 at 10:08:04PM +0800, Fugang Duan wrote:
> > > > This reverts commit 29ae6bd1b0d8a
From: Sergey Organov Sent: Wednesday, July 15, 2020 11:43
PM
> This is a collection of simple improvements that reduce and/or simplify code.
> They got developed out of attempt to use DP83640 PTP PHY connected to
> built-in FEC (that has its own PTP support) of the iMX 6SX micro-controller.
> The
From: Sergey Organov Sent: Wednesday, July 8, 2020 4:49 PM
> Andy Duan writes:
>
> > From: Sergey Organov Sent: Tuesday, July 7, 2020
> > 10:43 PM
> >> Andy Duan writes:
> >>
> >> > From: Sergey Organov Sent: Monday, July 6,
> >> &
From: Sergey Organov Sent: Tuesday, July 7, 2020 10:43 PM
> Andy Duan writes:
>
> > From: Sergey Organov Sent: Monday, July 6, 2020
> 10:26 PM
> >> Code of the form "if(x) x = 0" replaced with "x = 0".
> >>
> >> Code of the fo
From: Robin Murphy On 2020-07-07 04:44, Andy Duan wrote:
> > Hi mm experts,
> >
> > From: Kegl Rohit Sent: Monday, July 6, 2020
> > 10:18 PM
> >> So you would also say a single dma_sync_single_for_cpu is enough.
> >> You are right it would be great if s
From: Sergey Organov Sent: Monday, July 6, 2020 10:26 PM
> Code of the form "if(x) x = 0" replaced with "x = 0".
>
> Code of the form "if(x == a) x = a" removed.
>
> Signed-off-by: Sergey Organov
> ---
> drivers/net/ethernet/freescale/fec_ptp.c | 4 +---
> 1 file changed, 1 insertion(+), 3 del
From: Sergey Organov Sent: Monday, July 6, 2020 10:26 PM
> PPS feature could be useful even when hardware time stamping of network
> packets is not in use, so remove offending check for this condition from
> fec_ptp_enable_pps().
If hardware time stamping of network packets is not in use, PPS is
dle
> 23:50:03 all3.210.00 47.270.000.00 25.02
> 0.000.00 24.51
> 23:50:03 00.000.000.500.000.00 99.50
> 0.000.000.00
> 23:50:03 10.000.000.260.000.000.00
> 0.000.00 99.74
> 23:50:0
From: Sven Van Asbroeck Sent: Monday, July 6, 2020 11:00
PM
> On Mon, Jul 6, 2020 at 10:58 AM Sven Van Asbroeck
> wrote:
> >
> > Hi Fabio,
> >
> > On Mon, Jul 6, 2020 at 9:46 AM Fabio Estevam
> wrote:
> > >
> > > Would it make sense to use compatible = "mmio-mux"; like we do on
> > > imx7s, imx
From: Tobias Waldekranz Sent: Friday, July 3, 2020
10:11 PM
> In the ISR, we poll the event register for the queues in need of service and
> then enter polled mode. After this point, the event register will never be
> read
> again until we exit polled mode.
>
> In a scenario where a UDP flow is
From: Sven Van Asbroeck Sent: Sunday, July 5, 2020 11:34
PM
>
> ext phy-| \
> | |
> enet_ref-o--|M |pad--| \
>| |_/ | |
>| |M |mac_gtx
>| | |
>
From: Sven Van Asbroeck
> Hi Fabio, Andy,
>
> On Thu, Jul 2, 2020 at 6:29 PM Fabio Estevam wrote:
> >
> > With the device tree approach, I think that a better place to touch
> > GPR5 would be inside the fec driver.
> >
>
> Are we 100% sure this is the best way forward, though?
>
> All the FEC
From: Tobias Waldekranz Sent: Friday, July 3, 2020 3:55
PM
> On Fri Jul 3, 2020 at 4:45 AM CEST, Andy Duan wrote:
> > From: Tobias Waldekranz Sent: Friday, July 3,
> > 2020 4:58 AM
> > > In the ISR, we poll the event register for the queues in need of
> > > s
From: Tobias Waldekranz Sent: Friday, July 3, 2020 4:58
AM
> In the ISR, we poll the event register for the queues in need of service and
> then enter polled mode. After this point, the event register will never be
> read
> again until we exit polled mode.
>
> In a scenario where a UDP flow is
From: Sven Van Asbroeck Sent: Friday, July 3, 2020 8:51 AM
> Hi Fabio,
>
> On Thu, Jul 2, 2020 at 6:29 PM Fabio Estevam wrote:
> >
> > With the device tree approach, I think that a better place to touch
> > GPR5 would be inside the fec driver.
> >
>
> Cool idea. I notice that the latest FEC dri
From: Kegl Rohit Sent: Thursday, July 2, 2020 3:39 PM
> On Thu, Jul 2, 2020 at 6:18 AM Andy Duan wrote:
> > That should ensure the whole area is not dirty.
>
> dma_sync_single_for_cpu() and dma_sync_single_for_device() can or must be
> used in pairs?
> So in this case it i
From: Kegl Rohit Sent: Thursday, July 2, 2020 2:45 AM
> fec_enet_copybreak(u32 length, ...) uses
>
> dma_sync_single_for_cpu(&fep->pdev->dev,
> fec32_to_cpu(bdp->cbd_bufaddr), FEC_ENET_RX_FRSIZE - fep->rx_align,
> DMA_FROM_DEVICE); if (!swap)
>memcpy(new_skb->data, (*skb)->data, length);
>
>
From: David Miller Sent: Wednesday, July 1, 2020 3:58 AM
> From: "Tobias Waldekranz"
> Date: Tue, 30 Jun 2020 08:39:58 +0200
>
> > On Mon Jun 29, 2020 at 3:07 PM CEST, David Miller wrote:
> >> I don't see how this can happen since you process the TX queue
> >> unconditionally every NAPI pass, re
From: Tobias Waldekranz Sent: Tuesday, June 30, 2020
7:02 PM
> On Tue Jun 30, 2020 at 11:47 AM CEST, Andy Duan wrote:
> > Tobias, sorry, I am not running the net tree, I run the linux-imx tree:
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fsour
> >
From: Tobias Waldekranz Sent: Tuesday, June 30, 2020
5:13 PM
> On Tue Jun 30, 2020 at 11:02 AM CEST, Andy Duan wrote:
> > From: Tobias Waldekranz Sent: Tuesday, June
> > 30,
> > 2020 4:56 PM
> > > On Tue Jun 30, 2020 at 10:26 AM CEST, Andy Duan wrote:
> &g
From: Tobias Waldekranz Sent: Tuesday, June 30, 2020
4:56 PM
> On Tue Jun 30, 2020 at 10:26 AM CEST, Andy Duan wrote:
> > From: Tobias Waldekranz Sent: Tuesday, June
> > 30,
> > 2020 3:31 PM
> > > On Tue Jun 30, 2020 at 8:27 AM CEST, Andy Duan wrote:
> &g
From: Tobias Waldekranz Sent: Tuesday, June 30, 2020
3:31 PM
> On Tue Jun 30, 2020 at 8:27 AM CEST, Andy Duan wrote:
> > From: Tobias Waldekranz Sent: Tuesday, June
> > 30,
> > 2020 12:29 AM
> > > On Sun Jun 28, 2020 at 8:23 AM CEST, Andy Duan wrote:
> > &
From: Tobias Waldekranz Sent: Tuesday, June 30, 2020
3:16 AM
> In the ISR, we poll the event register for the queues in need of service and
> then enter polled mode. After this point, the event register will never be
> read
> again until we exit polled mode.
>
> In a scenario where a UDP flow i
From: Tobias Waldekranz Sent: Tuesday, June 30, 2020
12:29 AM
> On Sun Jun 28, 2020 at 8:23 AM CEST, Andy Duan wrote:
> > I never seem bandwidth test cause netdev watchdog trip.
> > Can you describe the reproduce steps on the commit, then we can
> > reproduce it on my l
From: David Miller Sent: Friday, June 26, 2020 3:20 AM
> From: Tobias Waldekranz
> Date: Thu, 25 Jun 2020 10:57:28 +0200
>
> > In the ISR, we poll the event register for the queues in need of
> > service and then enter polled mode. After this point, the event
> > register will never be read agai
From: David Miller Sent: Tuesday, June 16, 2020 4:42 AM
> From: Navid Emamdoost
> Date: Sun, 14 Jun 2020 00:38:01 -0500
>
> > in fec_enet_mdio_read, fec_enet_mdio_write, fec_enet_get_regs,
> > fec_enet_open and fec_drv_remove, pm_runtime_get_sync is called which
> > increments the counter even i
Giuseppe/Alexandre/Jose/David, can you give comment on the patch ?
From: Andy Duan Sent: Friday, June 5, 2020 10:06 AM
> Ping...
>
> From: Andy Duan Sent: Tuesday, June 2, 2020 3:58
> PM
> > From: Fugang Duan
> >
> > When do suspend/resume test, ther
Ping...
From: Andy Duan Sent: Tuesday, June 2, 2020 3:58 PM
> From: Fugang Duan
>
> When do suspend/resume test, there have WARN_ON() log dump from
> stmmac_xmit() funciton, the code logic:
> entry = tx_q->cur_tx;
> first_entry = entry;
> WARN_ON(tx_
From: Dan Carpenter Sent: Thursday, June 4, 2020
1:50 AM
> The code is return PTR_ERR(NULL) which is zero or success. We should
> return -ENOMEM instead.
>
> Fixes: 94abdad6974a5 ("net: ethernet: dwmac: add ethernet glue logic for
> NXP imx8 chip")
> Signed-off-by: Dan Carpenter
Thanks!
Acke
From: David Miller Sent: Tuesday, May 26, 2020 9:13 AM
> From: Fugang Duan
> Date: Mon, 25 May 2020 18:29:13 +0800
>
> > +static int imx_dwmac_init(struct platform_device *pdev, void *priv) {
> > + struct imx_priv_data *dwmac = priv;
> > + struct plat_stmmacenet_data *plat_dat = dwmac->p
From: Andrew Lunn Sent: Tuesday, May 26, 2020 12:06 AM
> On Mon, May 25, 2020 at 04:00:29PM +0000, Andy Duan wrote:
> > From: Andrew Lunn Sent: Monday, May 25, 2020 10:11
> PM
> > > On Mon, May 25, 2020 at 04:22:25PM +0800, Fugang Duan wrote:
> > > > Add "s
From: Andrew Lunn Sent: Monday, May 25, 2020 10:11 PM
> On Mon, May 25, 2020 at 04:22:25PM +0800, Fugang Duan wrote:
> > Add "snps,dwmac-5.10a" compatible string for 5.10a version that can
> > avoid to define some plat data in glue layer.
>
> Documentation/devicetree/bindings/net/snps,dwmac.yaml
From: Andrew Lunn Sent: Monday, May 25, 2020 9:55 PM
> On Mon, May 25, 2020 at 03:09:25PM +0800, fugang.d...@nxp.com wrote:
> > From: Fugang Duan
> >
> > The commit da722186f654 (net: fec: set GPR bit on suspend by DT
> configuration) set the GPR reigster offset and bit in driver for wol feature.
From: Andrew Lunn Sent: Monday, May 25, 2020 9:52 PM
> On Mon, May 25, 2020 at 03:09:29PM +0800, fugang.d...@nxp.com wrote:
> > From: Fugang Duan
> >
> > Enable ethernet wake-on-lan feature for imx6q/dl/qp sabresd boards
> > since the PHY clock is supplied by exteranl osc.
>
> external
>
> Revi
From: Andrew Lunn Sent: Monday, May 25, 2020 9:51 PM
> On Mon, May 25, 2020 at 03:09:28PM +0800, fugang.d...@nxp.com wrote:
> > From: Fugang Duan
> >
> > - Update the imx6qdl gpr property to define gpr register
> > offset and bit in DT.
> > - Add imx6sx/imx6ul/imx7d ethernet stop mode property.
From: Sascha Hauer Sent: Monday, May 25, 2020 6:49 PM
> On Mon, May 25, 2020 at 03:09:26PM +0800, fugang.d...@nxp.com wrote:
> > From: Fugang Duan
> >
> > The commit da722186f654 (net: fec: set GPR bit on suspend by DT
> > configuration) set the GPR reigster offset and bit in driver for wake
> >
Andy Duan would like to recall the message, "[PATCH net 1/1] net: stmmac:
enable timestamp snapshot for required PTP packets in dwmac v5.10a".
From: Fuzzey, Martin Sent: Saturday, May 23,
2020 6:16 PM
> > - gpr: phandle of SoC general purpose register mode. Required for
> > wake on LAN
> > - on some SoCs
> > + on some SoCs. Register bits of stop mode control, the format is
> > + <&gpr req_gpr req_bit>.
> > +gpr is the p
From: Fuzzey, Martin Sent: Saturday, May 23,
2020 5:56 PM
> Hi Andy,
>
> > Fixes: da722186f654(net: fec: set GPR bit on suspend by DT
> > configuration)
>
> Just a nitpick maybe but I don't really think this need as Fixes: tag.
> That commit didn't actually *break* anything AFAIK.
> It added Wo
From: Andrew Lunn Sent: Saturday, May 23, 2020 7:50 AM
> > Yes, I don't think anyone is saying otherwise.
>
> Correct.
>
> >
> > The problem is just that there are already .dtsi files for i.MX chips
> > having multiple ethernet interfaces in the mainline kernel (at least
> > imx6ui.dtsi, imx6sx.
From: Fuzzey, Martin Sent: Saturday, May 23,
2020 2:03 AM
> Hi Andy,
>
> On Fri, 22 May 2020, 03:01 Andy Duan, wrote:
> >
> > Andrew, many customers require the wol feature, NXP NPI release always
> > support the wol feature to match customers requirement.
> &
From: Andrew Lunn Sent: Thursday, May 21, 2020 9:07 PM
> > Andrew, patch#1 in the series will parse the property to get register offset
> and bit.
> > Patch#2 describes the property format as below:
> ><&gpr req_gpr req_bit>.
> > gpr is the phandle to general purpose register node.
From: Andrew Lunn Sent: Thursday, May 21, 2020 1:03 AM
> On Wed, May 20, 2020 at 04:31:55PM +0800, fugang.d...@nxp.com wrote:
> > From: Fugang Duan
> >
> > Update the gpr property to define gpr register offset and bit in DT.
> >
> > Signed-off-by: Fugang Duan
> > ---
> > arch/arm/boot/dts/imx6q
From: Jakub Kicinski Sent: Thursday, May 21, 2020 12:54 AM
> On Wed, 20 May 2020 16:31:53 +0800 fugang.d...@nxp.com wrote:
> > From: Fugang Duan
> >
> > The commit da722186f654(net: fec: set GPR bit on suspend by DT
> > configuration) set the GPR reigster offset and bit in driver for wake
> > on
register before writing to the speed register,
> this
> MII event for the MII_SPEED is suppressed, and polled IO works as expected.
>
> v2 - Only infec_enet_mii_init()
>
> Fixes: 29ae6bd1b0d8 ("net: ethernet: fec: Replace interrupt driven MDIO with
> polled IO")
>
From: David Miller Sent: Wednesday, April 29, 2020 11:35
AM
> From: Andy Duan
> Date: Wed, 29 Apr 2020 01:55:35 +
>
> > From: David Miller Sent: Wednesday, April 29,
> > 2020 5:34 AM
> >> From: Andrew Lunn
> >> Date: Tue, 28 Apr 2020 19:58:33 +0200
8 ("net: ethernet: fec: Replace interrupt driven
> > MDIO with polled IO")
> > Reported-by: Andy Duan
> > Suggested-by: Andy Duan
> > Signed-off-by: Andrew Lunn
>
> Applied to net-next, thanks.
David, it is too early to apply the patch, it will introduce another
break issue as I explain in previous mail for the patch.
register before writing to the speed register,
> this
> MII event for the MII_SPEED is suppressed, and polled IO works as expected.
>
> Fixes: 29ae6bd1b0d8 ("net: ethernet: fec: Replace interrupt driven MDIO with
> polled IO")
> Reported-by: Andy Duan
> Suggested-
From: Andrew Lunn Sent: Wednesday, April 29, 2020 2:02 AM
> On Tue, Apr 28, 2020 at 07:58:33PM +0200, Andrew Lunn wrote:
> > The change to polled IO for MDIO completion assumes that MII events
> > are only generated for MDIO transactions. However on some SoCs writing
> > to the MII_SPEED register
From: Andrew Lunn Sent: Tuesday, April 28, 2020 9:35 PM
> > Andrew, after investigate the issue, there have one MII event coming
> > later then clearing MII pending event when writing MSCR register
> (MII_SPEED).
> >
> > Check the rtl design by co-working with our IC designer, the MII event
> > ge
From: Andrew Lunn Sent: Tuesday, April 28, 2020 4:14 AM
> Hi Leonard
>
> > Does not help.
>
> Thanks for testing it.
>
> > What does seem to help is inserting prints after the FEC_ENET_MII
> > check but that's probably because it inject a long delay equivalent to
> > the long udelay Andy has me
From: Fabio Estevam Sent: Tuesday, June 4, 2019 11:05 AM
> netdev_err() is more appropriate for printing error messages inside network
> drivers, so switch to netdev_err().
>
> Signed-off-by: Fabio Estevam
> ---
> Changes since v1:
> - Split the changes from fec_main and fec_ptp in two different
From: Fabio Estevam Sent: Tuesday, June 4, 2019 11:05 AM
> dev_err() is more appropriate for printing error messages inside drivers, so
> switch to dev_err().
>
> Signed-off-by: Fabio Estevam
Acked-by: Fugang Duan
> ---
> Changes since v1:
> - Use dev_err() instead of netdev_err() - Andy
>
>
From: Fabio Estevam [mailto:feste...@gmail.com]
> netdev_err() is more appropriate for printing error messages inside network
> drivers, so switch to netdev_err().
>
> Signed-off-by: Fabio Estevam
> ---
> drivers/net/ethernet/freescale/fec_main.c | 8
> drivers/net/ethernet/freescale/fec
From: David Miller Sent: Saturday, May 25, 2019 4:12 AM
> From: Andy Duan
> Date: Thu, 23 May 2019 01:55:23 +
>
> > @@ -3146,7 +3150,10 @@ static int fec_enet_init(struct net_device *ndev)
> > memset(cbd_base, 0, bd_size);
> >
> >
Fix the clk mismatch in the error path "failed_reset" because
below error path will disable clk_ahb and clk_ipg directly, it
should use pm_runtime_put_noidle() instead of pm_runtime_put()
to avoid to call runtime resume callback.
Reported-by: Baruch Siach
Signed-off-by: Fugang Duan
---
drivers/
If MAC address read from nvmem efuse by calling .of_get_mac_address(),
but nvmem efuse is registerred later than the driver, then it
return -EPROBE_DEFER value. So modify the driver to support
defer probe when read MAC address from nvmem efuse.
Signed-off-by: Fugang Duan
---
drivers/net/ethernet
From: Baruch Siach
> I'm testing kernel v5.2-rc1 on my i.MX8MQ system, SolidRun Hummingboard
> Pulse. The fec driver happens to probe before the gpio driver that we need for
> the PHY reset. So fec_reset_phy() returns -EPROBE_DEFER. This triggers the
> splat below when clk_ahb is disabled somewher
From: Petr Štetiar Sent: Monday, May 13, 2019 4:00 PM
> Andy Duan [2019-05-13 03:31:59]:
>
> > From: Andrew Lunn Sent: Saturday, May 11, 2019 2:18
> > AM
> > > On Fri, May 10, 2019 at 08:24:03AM +, Andy Duan wrote:
> > > > If MAC address read from
From: Maxime Ripard Sent: Friday, May 10, 2019 7:32
PM
> On Fri, May 10, 2019 at 01:28:22PM +0200, Petr Štetiar wrote:
> > Andy Duan [2019-05-10 08:23:58]:
> >
> > Hi Andy,
> >
> > you've probably forget to Cc some maintainers and mailing lists, so
> &
From: Andrew Lunn Sent: Saturday, May 11, 2019 2:18 AM
> On Fri, May 10, 2019 at 08:24:03AM +0000, Andy Duan wrote:
> > If MAC address read from nvmem cell and it is valid mac address,
> > .of_get_mac_addr_nvmem() add new property "nvmem-mac-address" in
> >
From: Andrew Lunn Sent: Saturday, May 11, 2019 2:17 AM
> On Fri, May 10, 2019 at 08:24:00AM +0000, Andy Duan wrote:
> > ethernet controller driver call .of_get_mac_address() to get the mac
> > address from devictree tree, if these properties are not present, then
> > t
From: Petr Štetiar Sent: Friday, May 10, 2019 7:28 PM
> Andy Duan [2019-05-10 08:23:58]:
>
> Hi Andy,
>
> you've probably forget to Cc some maintainers and mailing lists, so I'm adding
> them now to the Cc loop. This patch series should be posted against net-nex
ethernet controller driver call .of_get_mac_address() to get
the mac address from devictree tree, if these properties are
not present, then try to read from nvmem.
For example, read MAC address from nvmem:
of_get_mac_address()
of_get_mac_addr_nvmem()
nvmem_get_mac_address()
If MAC address read from nvmem cell and it is valid mac address,
.of_get_mac_addr_nvmem() add new property "nvmem-mac-address" in
ethernet node. Once user call .of_get_mac_address() to get MAC
address again, it can read valid MAC address from device tree in
directly.
Signed-off-by: Fugang Duan
--
Currently, of_get_mac_address supports NVMEM, some platforms
MAC address that read from NVMEM efuse requires to swap bytes
order, so add new property "nvmem_macaddr_swap" to specify the
behavior. If the MAC address is valid from NVMEM, add new property
"nvmem-mac-address" in ethernet node.
Update
ethernet controller driver call .of_get_mac_address() to get
the mac address from devictree tree, if these properties are
not present, then try to read from nvmem. i.MX6x/7D/8MQ/8MM
platforms ethernet MAC address read from nvmem ocotp eFuses,
but it requires to swap the six bytes order.
The patch
Some SOC like i.MX6SX clock have some limits:
- ahb clock should be disabled before ipg.
- ahb and ipg clocks are required for MAC MII bus.
So, move the ahb clock to runtime management together with
ipg clock.
Signed-off-by: Fugang Duan
---
drivers/net/ethernet/freescale/fec_main.c | 30
From: Stefan Agner Sent: Monday, January 21, 2019 10:59 PM
> According to the device tree binding the phy-supply property is optional. Use
> the regulator_get_optional API accordingly. The code already handles NULL
> just fine.
>
> This gets rid of the following warning:
> fec 2188000.ethernet:
From: Stefano Cappa
> Hi everyone,
> I already posted this in NXP forum as a comment
> (https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fco
> mmunity.nxp.com%2Fthread%2F359397&data=02%7C01%7Cfugang.dua
> n%40nxp.com%7C189d5cad534e470a162508d66c068de2%7C686ea1d3bc2b
> 4c6fa92cd99c
From: Heiner Kallweit Sent: 2018年12月16日 0:19
> If we detect a MDIO error, it seems to be a little bit too aggressive to stop
> the
> state machine and bring down the PHY completely.
> E.g. when polling and we miss one update, then this has no relevant impact.
> And in phy_stop_interrupts() actual
From: Heiner Kallweit Sent: 2018年12月16日 0:20
> Now that the PHY isn't stopped any longer by phylib in case of a MDIO error,
> we can remove this workaround.
>
> Signed-off-by: Heiner Kallweit
The old workaround can be removed NOW, thanks.
Acked-by: Fugang Duan
> ---
> drivers/net/ethernet/f
From: netdev-ow...@vger.kernel.org
> All other calls to phy_set_max_speed() use the SPEED_ prefix. Make the
> FEC driver follow this common pattern. This makes no different to
> generated code since SPEED_1000 is 1000, and SPEED_100 is 100.
>
Please also add more information that was introduced
From: Fugang Duan
Commit db65f35f50e0 ("net: fec: add support of ethtool get_regs") introduce
ethool "--register-dump" interface to dump all FEC registers.
But not all silicon implementations of the Freescale FEC hardware module
have the FRBR (FIFO Receive Bound Register) and FRSR (FIFO Receive
From: Arnd Bergmann Sent: 2018年5月28日 23:50
> While compile-testing on arm64 with gcc-8.1, I ran into a build diagnostic:
>
> drivers/net/ethernet/freescale/fec_main.c: In function 'fec_probe':
> drivers/net/ethernet/freescale/fec_main.c:3517:25: error: '%d' directive
> writing between 1 and 10 by
> From: YueHaibing Sent: 2018年5月24日 19:27
> This comment is outdated as fec_ptp_ioctl has been replaced by
> fec_ptp_set/fec_ptp_get since commit 1d5244d0e43b ("fec: Implement
> the SIOCGHWTSTAMP ioctl")
>
> Signed-off-by: YueHaibing
Thanks.
Acked-by: Fugang Duan
> ---
> drivers/net/ethernet/
From: Fabio Estevam Sent: 2018年5月21日 0:55
> Adopt the SPDX license identifier headers to ease license compliance
> management.
>
> Signed-off-by: Fabio Estevam
Acked-by: Fugang Duan
> ---
> drivers/net/ethernet/freescale/fec_ptp.c | 14 +-
> 1 file changed, 1 insertion(+), 13 del
From: Fabio Estevam Sent: 2018年5月21日 0:55
> From: Fabio Estevam
>
> Currently there is no license information in the header of this file.
>
> The MODULE_LICENSE field contains ("GPL"), which means GNU Public
> License v2 or later, so add a corresponding SPDX license identifier.
>
> Signed-off
From: Florian Fainelli Sent: 2018年5月18日 4:08
> The Freescale FEC driver builds fine with COMPILE_TEST, so make that
> possible.
>
> Signed-off-by: Florian Fainelli
Acked-by: Fugang Duan
> ---
> drivers/net/ethernet/freescale/Kconfig| 2 +-
> drivers/net/ethernet/freescale/fec.h | 2
From: Florian Fainelli Sent: 2018年5月16日 7:56
> A number of drivers have the following pattern:
>
> if (np)
> of_mdiobus_register()
> else
> mdiobus_register()
>
> which the implementation of of_mdiobus_register() now takes care of.
> Remove that pattern in drivers that strictly adher
From: Florian Fainelli Sent: 2018年5月16日 7:48
> The Freescale FEC driver builds fine with COMPILE_TEST, so make that
> possible.
>
> Signed-off-by: Florian Fainelli
Acked-by: Fugang Duan
> ---
> drivers/net/ethernet/freescale/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
From: Geert Uytterhoeven Sent: 2018年3月28日 15:07
> Hi Andy,
>
> On Wed, Mar 28, 2018 at 5:04 AM, Andy Duan wrote:
> > From: Geert Uytterhoeven Sent: 2018年3月27日
> 20:59
> >> On Mon, Mar 26, 2018 at 3:36 PM, Greg Ungerer
> wrote:
> >> > As of commit 205e
From: Geert Uytterhoeven Sent: 2018年3月27日 20:59
> Hi Greg,
>
> On Mon, Mar 26, 2018 at 3:36 PM, Greg Ungerer wrote:
> > As of commit 205e1b7f51e4 ("dma-mapping: warn when there is no
> > coherent_dma_mask") the Freescale FEC driver is issuing the following
> > warning on driver initialization on
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