On Sat, 24 Aug 2019 17:24:07 +0200
Andrew Lunn wrote:
> That is a new idea. Interesting.
>
> I would like to look around and see what else uses this "lan1@eth0"
> concept. We need to ensure it is not counter intuitive in general,
> when you consider all possible users.
There are not many users
On Sat, 24 Aug 2019 23:01:21 +0200
Marek Behun wrote:
> the documentation would became weird to users.
... would become weird ...
>
> We are *already* using the iflink property to report which CPU device
> is used as CPU destination port for a given switch slave interface. So
> why to use that f
Currently we support SERDES on the Topaz family in a limited way: no
IRQs and the cmode is not writable, thus the mode is determined by
strapping pins.
Marvell's examples though show how to make cmode writable on port 5 and
support SGMII autonegotiation. It is done by writing hidden registers,
for
This patch moves the functions operating on the hidden debug registers
into it's own file, port_hidden.c. The functions prefix is renamed from
mv88e6390_hidden_ to mv88e6xxx_port_hidden_, to be consistent with the
rest of this driver. The macros are prefixed with MV88E6XXX_ prefix, and
are changed
Create a serdes_get_lane() method in the mv88e6xxx operations structure.
Use it instead of calling the different implementations.
Also change the methods so that their return value is used only for
error. The lane number is put into a place referred to by a pointer
given as argument. If the port do
This is a cosmetic update. We are removing the last underscore from
macros MV88E6XXX_PORT_STS_CMODE_100BASE_X and
MV88E6XXX_PORT_STS_CMODE_1000BASE_X. The 2500base-x version does not
have that underscore. Also PHY_INTERFACE_MODE_ macros do not have it
there.
Signed-off-by: Marek Behún
Reviewed-by
The mv88e6390_serdes_irq_link_sgmii IRQ handler reads the SERDES PHY
status register to determine speed, among other things. If cmode of the
port is set to 2500base-x, though, the PHY still reports 1000 Mbps (the
PHY register itself does not differentiate between 1000 Mbps and 2500
Mbps - it thinks
Hello,
this is the third version of changes for the Topaz/Peridot family of
switches. The patches apply on net-next.
Changes since v2:
- per Vivien's request I merged the three different patches operating
on code for hidden registers into one patch (second in this series)
- also per Vivien's
By adding an additional serdes_get_lane implementation (for Topaz), we
can merge the implementations of other SERDES functions (powering and
IRQs). We can skip checking port numbers, since the serdes_get_lane()
methods inform if there is no lane on a port or if the lane cannot be
used for given cmo
Hi Andrew,
On Sun, 25 Aug 2019 01:16:53 +0200, Andrew Lunn wrote:
> On Sat, Aug 24, 2019 at 07:12:20PM -0400, Vivien Didelot wrote:
> > Hi Andrew,
> >
> > On Sun, 25 Aug 2019 00:53:06 +0200, Andrew Lunn wrote:
> > > I just booted a ZII devel C and got a new warning splat.
> > >
> > > WARNING:
> On Aug 24, 2019, at 16:47, David Miller wrote:
>
> From: Jakub Kicinski
> Date: Fri, 23 Aug 2019 18:31:11 -0700
>
>>> On Fri, 23 Aug 2019 16:37:43 -0700, Jeff Kirsher wrote:
>>> From: Dave Ertman
>>>
>>> The current flag name of "enable-fw-lldp" is a bit cumbersome.
>>>
>>> Change priv-
From: Andrew Lunn
Date: Sun, 25 Aug 2019 01:04:17 +0200
> SFPs can report two different power values, the transmit power and the
> receive power. Add labels to make it clear which is which. Also add
> labels to the other sensors, VCC power supply, bias and module
> temperature.
>
> sensors(1) no
From: Prashant Malani
Date: Sat, 24 Aug 2019 01:36:19 -0700
> get_registers() blindly copies the memory written to by the
> usb_control_msg() call even if the underlying urb failed.
>
> This could lead to junk register values being read by the driver, since
> some indirect callers of get_registe
From: Zhu Yanjun
Date: Fri, 23 Aug 2019 21:04:16 -0400
> diff --git a/include/uapi/linux/rds.h b/include/uapi/linux/rds.h
> index fd6b5f6..cba368e 100644
> --- a/include/uapi/linux/rds.h
> +++ b/include/uapi/linux/rds.h
> @@ -250,6 +250,7 @@ struct rds_info_rdma_connection {
> __u32
From: John Fastabend
Date: Fri, 23 Aug 2019 17:11:38 -0700
> An excerpt from netlink(7) man page,
>
> In multipart messages (multiple nlmsghdr headers with associated payload
> in one byte stream) the first and all following headers have the
> NLM_F_MULTI flag set, except for the last hea
From: Jakub Kicinski
Date: Fri, 23 Aug 2019 18:31:11 -0700
> On Fri, 23 Aug 2019 16:37:43 -0700, Jeff Kirsher wrote:
>> From: Dave Ertman
>>
>> The current flag name of "enable-fw-lldp" is a bit cumbersome.
>>
>> Change priv-flag name to "fw-lldp-agent" with a value of on or
>> off. This is m
From: Jeff Kirsher
Date: Fri, 23 Aug 2019 16:37:36 -0700
> This series contains updates to ice driver only.
Pulled, thanks Jeff.
From: Julian Wiedmann
Date: Fri, 23 Aug 2019 11:48:46 +0200
> please apply one more round of qeth patches. These implement support for
> a bunch of TX-related features - namely TX NAPI, BQL and xmit_more.
>
> Note that this includes two qdio patches which lay the necessary
> groundwork, and have
From: Michael Chan
Date: Fri, 23 Aug 2019 01:51:41 -0400
> Recent commit added logic to determine the appropriate statistics block
> size to allocate and the size is stored in bp->hw_ring_stats_size. But
> if the firmware spec is older than 1.6.0, it is 0 and not initialized.
> This causes the a
From: Julian Wiedmann
Date: Fri, 23 Aug 2019 11:29:23 +0200
> Commit d4c08afafa04 ("s390/qeth: streamline SNMP cmd code") removed
> the bounds checking for req_len, under the assumption that the check in
> qeth_alloc_cmd() would suffice.
>
> But that code path isn't sufficiently robust to handle
From: Saeed Mahameed
Date: Thu, 22 Aug 2019 23:35:45 +
> This series provides some misc updates to mlx5 driver.
> For more information please see tag log below.
>
> Please pull and let me know if there is any problem.
>
> Please note that the series starts with a merge of mlx5-next branch,
From: Saeed Mahameed
Date: Thu, 22 Aug 2019 20:41:34 +
> This series introduces some fixes to mlx5 driver.
>
> 1) Form Moshe, two fixes for firmware health reporter
> 2) From Eran, two ktls fixes.
>
> Please pull and let me know if there is any problem.
>
> No -stable this time :) ..
:)
From: René van Dorst
Date: Wed, 21 Aug 2019 16:45:47 +0200
> + dev_info(ds->dev, "Setup P5, HWTRAP=0x%x, intf_sel=%s, phy-mode=%s\n",
> + val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface));
This is debugging, at best. Please make this a debugging message or
remove it
On Sat, Aug 24, 2019 at 07:12:20PM -0400, Vivien Didelot wrote:
> Hi Andrew,
>
> On Sun, 25 Aug 2019 00:53:06 +0200, Andrew Lunn wrote:
> > I just booted a ZII devel C and got a new warning splat.
> >
> > WARNING: CPU: 0 PID: 925 at kernel/irq/manage.c:1708 __free_irq+0xc8/0x2c4
> > Trying to fr
From: Andrew Lunn
Date: Sun, 25 Aug 2019 00:34:54 +0200
> Russell king maintains phylink, as part of the SFP module support.
> However, much of the review work is about drivers swapping from phylib
> to phylink. Such changes don't make changes to the phylink core, and
> so the F: rules in MAINTAI
Hi Andrew,
On Sun, 25 Aug 2019 00:53:06 +0200, Andrew Lunn wrote:
> I just booted a ZII devel C and got a new warning splat.
>
> WARNING: CPU: 0 PID: 925 at kernel/irq/manage.c:1708 __free_irq+0xc8/0x2c4
> Trying to free already-free IRQ 0
> Modules linked in:
> CPU: 0 PID: 925 Comm: kworker/0:2
SFPs can report two different power values, the transmit power and the
receive power. Add labels to make it clear which is which. Also add
labels to the other sensors, VCC power supply, bias and module
temperature.
sensors(1) now shows:
sff2-isa-
Adapter: ISA adapter
VCC: +3.23 V
tem
Hi Vivien
I just booted a ZII devel C and got a new warning splat.
WARNING: CPU: 0 PID: 925 at kernel/irq/manage.c:1708 __free_irq+0xc8/0x2c4
Trying to free already-free IRQ 0
Modules linked in:
CPU: 0 PID: 925 Comm: kworker/0:2 Not tainted 5.3.0-rc5-01151-g7ff758fcdf65 #231
Hardware name: Freesc
Russell king maintains phylink, as part of the SFP module support.
However, much of the review work is about drivers swapping from phylib
to phylink. Such changes don't make changes to the phylink core, and
so the F: rules in MAINTAINERS don't match. Add a K:, keywork rule,
which hopefully get_main
On Sun, Aug 25, 2019 at 12:15:19AM +0200, Andrew Lunn wrote:
> 65;5402;1cOn Sat, Aug 24, 2019 at 02:18:03PM -0700, David Miller wrote:
> > From: Andrew Lunn
> > Date: Fri, 23 Aug 2019 03:09:28 +0200
> >
> > > That would be Russell.
> > >
> > > We should try to improve MAINTAINER so that Russell
On Wed, Aug 21, 2019 at 04:45:44PM +0200, René van Dorst wrote:
> 1. net: dsa: mt7530: Convert to PHYLINK API
>This patch converts mt7530 to PHYLINK API.
> 2. dt-bindings: net: dsa: mt7530: Add support for port 5
> 3. net: dsa: mt7530: Add support for port 5
>These 2 patches adding support
On Sat, Aug 24, 2019 at 02:18:03PM -0700, David Miller wrote:
> From: Andrew Lunn
> Date: Fri, 23 Aug 2019 03:09:28 +0200
>
> > That would be Russell.
> >
> > We should try to improve MAINTAINER so that Russell King gets picked
> > by the get_maintainer script.
>
> Shoule he be added to the mt7
65;5402;1cOn Sat, Aug 24, 2019 at 02:18:03PM -0700, David Miller wrote:
> From: Andrew Lunn
> Date: Fri, 23 Aug 2019 03:09:28 +0200
>
> > That would be Russell.
> >
> > We should try to improve MAINTAINER so that Russell King gets picked
> > by the get_maintainer script.
>
> Shoule he be added
From: Hangbin Liu
Date: Thu, 22 Aug 2019 22:19:47 +0800
> When we send a packet larger than PMTU, we need to reply with
> icmp_send(ICMP_FRAG_NEEDED) or icmpv6_send(ICMPV6_PKT_TOOBIG).
>
> But with collect_md mode, kernel will crash while accessing the dst dev
> as __metadata_dst_init() init dst
Hi Marek,
On Sat, 24 Aug 2019 22:52:16 +0200, Marek Behun wrote:
> > There's something I'm having trouble to follow here. This series keeps
> > adding and modifying its own code. Wouldn't it be simpler for everyone
> > if you directly implement the final mv88e6xxx_port_hidden_{read,write}
> > fun
From: xiaolinkui
Date: Thu, 22 Aug 2019 14:58:16 +0800
> This is an unlikely case, use unlikely() on it seems logical.
>
> Signed-off-by: xiaolinkui
Applied to net-next.
From: YueHaibing
Date: Thu, 22 Aug 2019 06:35:17 +
> Fixes gcc '-Wunused-but-set-variable' warning:
>
> drivers/net/ethernet/cirrus/cs89x0.c: In function 'cs89x0_platform_probe':
> drivers/net/ethernet/cirrus/cs89x0.c:1847:20: warning:
> variable 'lp' set but not used [-Wunused-but-set-vari
From: Mao Wenan
Date: Thu, 22 Aug 2019 14:30:26 +0800
> Fixes gcc '-Wunused-but-set-variable' warning:
> drivers/net/ethernet/mediatek/mtk_eth_soc.c: In function mtk_handle_irq:
> drivers/net/ethernet/mediatek/mtk_eth_soc.c:1951:6: warning: variable status
> set but not used [-Wunused-but-set-va
From: Ka-Cheong Poon
Date: Wed, 21 Aug 2019 20:18:24 -0700
> The rds6_inc_info_copy() function has a couple struct members which
> are leaking stack information. The ->tos field should hold actual
> information and the ->flags field needs to be zeroed out.
>
> Fixes: 3eb450367d08 ("rds: add typ
From: Andrew Lunn
Date: Fri, 23 Aug 2019 03:09:28 +0200
> That would be Russell.
>
> We should try to improve MAINTAINER so that Russell King gets picked
> by the get_maintainer script.
Shoule he be added to the mt7530 entry?
On Sat, 24 Aug 2019 13:04:04 -0700
Florian Fainelli wrote:
> 1) Your approach is kind of interesting here, not sure if it is the best
> but it is not outright wrong. In the past, we had been talking about
> different approaches, some of which seemed too simplistic or too narrow
> on the use case,
On Sat, 24 Aug 2019 15:32:54 -0400
Vivien Didelot wrote:
> You are already using these macros in the previous patch. I guess you meant
> to introduce this patch before. But since you are moving and renaming the
> same code without functional changes, you may squash them together.
Hm, you are rig
On Sat, 24 Aug 2019 16:13:28 -0400
Vivien Didelot wrote:
> Hi Marek,
>
> On Fri, 23 Aug 2019 23:26:02 +0200, Marek Behún wrote:
> > -int mv88e6xxx_port_hidden_write(struct mv88e6xxx_chip *chip, int port, int
> > reg,
> > - u16 val);
> > +int mv88e6xxx_port_hidden_writ
From: Stefan Schmidt
Date: Sat, 24 Aug 2019 14:19:53 +0200
> An update from ieee802154 for your *net* tree.
>
> Yue Haibing fixed two bugs discovered by KASAN in the hwsim driver for
> ieee802154 and Colin Ian King cleaned up a redundant variable assignment.
>
> If there are any problems let m
Hi Marek,
On Fri, 23 Aug 2019 23:26:02 +0200, Marek Behún wrote:
> -int mv88e6xxx_port_hidden_write(struct mv88e6xxx_chip *chip, int port, int
> reg,
> - u16 val);
> +int mv88e6xxx_port_hidden_write(struct mv88e6xxx_chip *chip, int block, int
> port,
> +
On 8/23/2019 7:42 PM, Marek Behún wrote:
> Hi,
> this is my attempt to solve the multi-CPU port issue for DSA.
>
> Patch 1 adds code for handling multiple CPU ports in a DSA switch tree.
> If more than one CPU port is found in a tree, the code assigns CPU ports
> to user/DSA ports in a round ro
Hi Florian,
On Fri, 23 Aug 2019 at 20:00, Florian Fainelli wrote:
>
> On 8/22/19 4:51 PM, Vladimir Oltean wrote:
> > On 8/22/19 11:13 PM, Vivien Didelot wrote:
> >> When the bridge offloads a VLAN on a slave port, we also need to
> >> program its dedicated CPU port as a member of the VLAN.
> >>
>
Also can you place the mv88e6xxx_serdes_get_lane() function as static inline
in the serdes.h header? So that it's obvious that it's a wrapper and not a
switch implementation.
Ho and you can skip the 'chip->info->ops->' from the commit subject line ;-)
Hi Marek,
On Fri, 23 Aug 2019 23:25:58 +0200, Marek Behún wrote:
> + /* SERDES lane mapping */
> + int (*serdes_get_lane)(struct mv88e6xxx_chip *chip, int port);
I would prefer to keep the return code strictly for error checking as commonly
used in the driver:
int (*serdes_get_lane)
Hi Marek,
On Fri, 23 Aug 2019 23:25:57 +0200, Marek Behún wrote:
> /* Offset 0x1a: Magic undocumented errata register */
/* Offset 0x1A: Reserved */
(nitpicking here, for consistency this other definitions as shown in docs.)
> -#define PORT_RESERVED_1A 0x1a
> -#define P
On Sat, 24 Aug 2019 17:56:36 +0200
Andrew Lunn wrote:
> I expect bad things will happen if frames are flooded to multiple CPU
> ports. For this to work, the whole switch design needs to support
> multiple CPU ports. I doubt this will work on any old switch.
>
> Having a host interface connected
On Sat, 24 Aug 2019 18:44:44 +0300
Vladimir Oltean wrote:
> Just to be clear. You can argue that such switches are weird, and
> that's ok. Just want to understand the general type of hardware for
> which such a patch is intended.
Vladimir,
the general part should solve for devices like Turris 1
On Sat, Aug 24, 2019 at 07:45:46PM +0200, Marek Behun wrote:
> On Sat, 24 Aug 2019 17:24:07 +0200
> Andrew Lunn wrote:
>
> > So this is all about transmit from the host out the switch. What about
> > receive? How do you tell the switch which CPU interface it should use
> > for a port?
>
> Andrew
On Sat, 24 Aug 2019 17:24:07 +0200
Andrew Lunn wrote:
> So this is all about transmit from the host out the switch. What about
> receive? How do you tell the switch which CPU interface it should use
> for a port?
Andrew, we use the same. The DSA slave implementation of ndo_set_iflink
will also t
On Sat, 24 Aug 2019 17:43:02 +0200
Andrew Lunn wrote:
> But i don't know if it is worth the effort. I've never seen a D in DSA
> setup with multiple CPUs ports. I've only ever seen an single switch
> with multiple CPU ports.
Yes, that exactly. I was thinking about the most optimal algorithm, but
When IP fragments are reassembled before being sent to conntrack, the
key from the last fragment is used. Unless there are reordering
issues, the last fragment received will not contain the L4 ports, so the
key for the reassembled datagram won't contain them. This patch updates
the key once we ha
Only the first fragment in a datagram contains the L4 headers. When the
Open vSwitch module parses a packet, it always sets the IP protocol
field in the key, but can only set the L4 fields on the first fragment.
The original behavior would not clear the L4 portion of the key, so
garbage values wou
> Will DSA assume that all CPU ports are equal in terms of tagging
> protocol abilities? There are switches where one of the CPU ports can
> do tagging and the other can't.
Hi Vladimir
Given the current definition of what a CPU port is, we have to assume
the port is using tags. Frames have to be
On Sat, Aug 24, 2019 at 04:42:50AM +0200, Marek Behún wrote:
> Implement ndo_set_iflink for DSA slave device. In multi-CPU port setup
> this should be used to change to which CPU destination port a given port
> should be connected.
>
> This adds a new operation into the DSA switch operations struc
On Sat, 24 Aug 2019 at 18:40, Vladimir Oltean wrote:
>
> Hi Marek,
>
> On Sat, 24 Aug 2019 at 05:43, Marek Behún wrote:
> >
> > Hi,
> > this is my attempt to solve the multi-CPU port issue for DSA.
> >
> > Patch 1 adds code for handling multiple CPU ports in a DSA switch tree.
> > If more than on
> +static int dsa_tree_setup_default_cpus(struct dsa_switch_tree *dst)
> {
> struct dsa_switch *ds;
> struct dsa_port *dp;
> - int device, port;
> + int device, port, i;
>
> - /* DSA currently only supports a single CPU port */
> - dst->cpu_dp = dsa_tree_find_first_cp
Hi Marek,
On Sat, 24 Aug 2019 at 05:43, Marek Behún wrote:
>
> Hi,
> this is my attempt to solve the multi-CPU port issue for DSA.
>
> Patch 1 adds code for handling multiple CPU ports in a DSA switch tree.
> If more than one CPU port is found in a tree, the code assigns CPU ports
> to user/DSA p
On Sat, Aug 24, 2019 at 04:42:47AM +0200, Marek Behún wrote:
> Hi,
> this is my attempt to solve the multi-CPU port issue for DSA.
>
> Patch 1 adds code for handling multiple CPU ports in a DSA switch tree.
> If more than one CPU port is found in a tree, the code assigns CPU ports
> to user/DSA po
Hi Arseny.
On Tue, 30 Jul 2019 at 17:40, Arseny Solokha wrote:
>
> > Hi Arseny,
> >
> > Nice project!
>
> Vladimir, Russell, thanks for your review. I'm on vacation now, so won't fully
> address your comments in a few weeks: while I can build the code, I won't have
> access to hardware to test.
>
On Sat 24 Aug 2019 at 03:26, Jakub Kicinski
wrote:
> On Fri, 23 Aug 2019 21:50:49 +0300, Vlad Buslov wrote:
>> @@ -1201,14 +1199,11 @@ static int u32_reoffload_knode(struct tcf_proto *tp,
>> struct tc_u_knode *n,
>> cls_u32.knode.link_handle = ht->handle;
>> }
>>
>> -
Hello,
Antoine Tenart wrote:
> This patch adds a description of the PTP ready interrupt, which can be
> triggered when a PTP timestamp is available on an hardware FIFO.
Applied to mips-next.
> commit b4742e6682d5
> https://git.kernel.org/mips/c/b4742e6682d5
>
> Signed-off-by: Antoine Tenart
>
Hello,
Antoine Tenart wrote:
> This patch adds one register range within the mscc,vsc7514-switch node,
> to describe the PTP registers.
Applied to mips-next.
> commit 048dc3abe827
> https://git.kernel.org/mips/c/048dc3abe827
>
> Signed-off-by: Antoine Tenart
> Signed-off-by: Paul Burton
Than
Hi René,
On Sat, Aug 24, 2019 at 01:11:17PM +, René van Dorst wrote:
> Hi Russell,
>
> Mediatek calls it Turbo RGMII. It is a overclock version of RGMII mode.
> It is used between first GMAC and port 6 of the mt7530 switch. Can be used
> with
> an internal and an external mt7530 switch.
>
>
Hi Russell,
Quoting Russell King - ARM Linux admin :
On Fri, Aug 23, 2019 at 03:45:15PM +0200, René van Dorst wrote:
+ switch (state->interface) {
+ case PHY_INTERFACE_MODE_SGMII:
+ phylink_set(mask, 10baseT_Half);
+ phylink_set(mask, 10baseT_Full);
+
Hi Russell,
On Tue, 30 Jul 2019 at 13:23, Russell King - ARM Linux admin
wrote:
>
> On Tue, Jul 30, 2019 at 02:39:58AM +0300, Vladimir Oltean wrote:
> > To be honest I don't have a complete answer to that question. The
> > literature recommends writing 0x01a0 to the MII_ADVERTISE (0x4)
> > regist
On Thu, 22 Aug 2019 at 21:19, Mark Brown wrote:
>
> On Sun, Aug 18, 2019 at 09:25:57PM +0300, Vladimir Oltean wrote:
>
> > @@ -1391,6 +1402,13 @@ static void __spi_pump_messages(struct
> > spi_controller *ctlr, bool in_kthread)
> > goto out;
> > }
> >
> > + if (!ctlr->ptp_
Hi Russell,
Quoting Russell King - ARM Linux admin :
On Fri, Aug 23, 2019 at 03:45:14PM +0200, René van Dorst wrote:
This convert the basics to PHYLINK API.
SGMII support is not in this patch.
Signed-off-by: René van Dorst
--
v2->v3:
* Make link_down() similar as link_up() suggested by Russe
Hello Dave.
An update from ieee802154 for your *net* tree.
Yue Haibing fixed two bugs discovered by KASAN in the hwsim driver for
ieee802154 and Colin Ian King cleaned up a redundant variable assignment.
If there are any problems let me know.
regards
Stefan Schmidt
The following changes since
On Fri, 23 Aug 2019 at 08:22, Richard Cochran wrote:
>
> On Thu, Aug 22, 2019 at 07:13:12PM +0300, Vladimir Oltean wrote:
> > You do think that I understand the problem? But I don't!
>
> ;^)
>
> > > And who generates Local_sync_resp?
> > >
> >
> > Local_sync_resp is the same as Local_sync_req exce
This may have already been fixed, but forwarding to check.
Begin forwarded message:
Date: Thu, 22 Aug 2019 12:34:10 +
From: bugzilla-dae...@bugzilla.kernel.org
To: step...@networkplumber.org
Subject: [Bug 204669] New: TLS: module crash with TLS record double free
https://bugzilla.kernel.org
Begin forwarded message:
Date: Fri, 23 Aug 2019 23:44:26 +
From: bugzilla-dae...@bugzilla.kernel.org
To: step...@networkplumber.org
Subject: [Bug 204681] New: Kernel BUG/Oops: tc qdisc delete with tc filter
action xt -j CONNMARK
https://bugzilla.kernel.org/show_bug.cgi?id=204681
Dear Valid Subscriber,
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On Fri, Aug 23, 2019 at 03:45:15PM +0200, René van Dorst wrote:
> + switch (state->interface) {
> + case PHY_INTERFACE_MODE_SGMII:
> + phylink_set(mask, 10baseT_Half);
> + phylink_set(mask, 10baseT_Full);
> + phylink_set(mask, 100baseT_Half);
> +
On Fri, Aug 23, 2019 at 03:45:14PM +0200, René van Dorst wrote:
> This convert the basics to PHYLINK API.
> SGMII support is not in this patch.
>
> Signed-off-by: René van Dorst
> --
> v2->v3:
> * Make link_down() similar as link_up() suggested by Russell King
Yep, almost there, but...
> +stati
get_registers() blindly copies the memory written to by the
usb_control_msg() call even if the underlying urb failed.
This could lead to junk register values being read by the driver, since
some indirect callers of get_registers() ignore the return values. One
example is:
ocp_read_dword() ignore
Hi Frank,
Quoting Frank Wunderlich :
tested on bpi-r2 (mt7623/mt7530) and bpi-r64 (mt7622/rtl8367)
Thanks for testing!
as reported to rene directly rx-path needs some rework because
current rx-speed
on bpi-r2 is 865 Mbits/sec instead of ~940 Mbits/sec
I still think it is a result of th
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