> -Original Message-
> From: Richard Henderson [mailto:r...@redhat.com]
> Sent: Thursday, November 06, 2014 4:23 PM
> To: Zhenqiang Chen; 'Jan-Benedict Glaw'; Hartmut Penner; Ulrich Weigand;
> Andreas Krebbel
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re:
nchcc4.
Bootstrap and no make check regression on X86-64 and i686.
All the failed cases in PR63917 PASS.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-11-20 Zhenqiang Chen
PR rtl-optimization/63917
* ifcvt.c (clobber_cc_p, use_cc_p): New functions.
(noce_process_if
.3% better.
Coremark on Cortex-M4 is 0.07% regression due to alignment change.
No Coremark change on Corter-M0 and Cortex-A15.
Unfortunately I failed to generate a meaningful small case for it. So no
test case is included in the patch.
Ok for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-11-21 Zhen
> -Original Message-
> From: Richard Henderson [mailto:r...@redhat.com]
> Sent: Friday, November 21, 2014 2:27 AM
> To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH, ifcvt] Fix PR63917
>
> On 11/20/2014 10:48 AM, Zhenqiang Chen wrote:
> > +/
ch adds another operand check after mode conversion.
No make check regression with qemu.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-11-24 Zhenqiang Chen
PR target/64015
* config/aarch64/aarch64.c (aarch64_gen_ccmp_first): Recheck operand
after mode conversion.
> -Original Message-
> From: Eric Botcazou [mailto:ebotca...@adacore.com]
> Sent: Saturday, November 22, 2014 6:15 PM
> To: Zhenqiang Chen
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH, combine] Try REG_EQUAL for nonzero_bits
>
> > The patch tries t
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Richard Henderson
> Sent: Monday, November 24, 2014 4:57 PM
> To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
> Cc: Marcus Shawcroft
> Subject: Re: [PATCH
> -Original Message-
> From: Richard Henderson [mailto:r...@redhat.com]
> Sent: Tuesday, November 25, 2014 5:25 PM
> To: Zhenqiang Chen
> Cc: Marcus Shawcroft; gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH, AARCH64] Fix ICE in CCMP (PR64015)
>
> On 11/25/2014
> -Original Message-
> From: H.J. Lu [mailto:hjl.to...@gmail.com]
> Sent: Friday, November 28, 2014 10:45 PM
> To: Zhenqiang Chen
> Cc: Richard Henderson; GCC Patches
> Subject: Re: [PATCH, ifcvt] Fix PR63917
>
> On Sun, Nov 23, 2014 at 7:47 PM,
Hi,
The patch enhances ifcvt to allow_cc_mode if HAVE_cbranchcc4.
Bootstrap and no make check regression on X86-64.
Will add new test cases after ccmp is enabled.
Ok for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-10-29 Zhenqiang Chen
* ifcvt.c (noce_emit_cmove
> -Original Message-
> From: Richard Henderson [mailto:r...@redhat.com]
> Sent: Monday, October 27, 2014 10:56 PM
> To: Zhenqiang Chen
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [Ping] [PATCH, 1/10] two hooks for conditional compare (ccmp)
>
> On 10/27/2014
> -Original Message-
> From: Richard Henderson [mailto:r...@redhat.com]
> Sent: Monday, October 27, 2014 11:14 PM
> To: Zhenqiang Chen
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [Ping] [PATCH, 2/10] prepare ccmp
>
> On 10/27/2014 12:48 AM, Zhenqiang Chen wrote:
Patch is rebased and merged with other changes according to comments.
Thanks!
-Zhenqiang
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
> Sent: Tuesday, September 23, 2014 2:44 PM
>
> -Original Message-
> From: Richard Henderson [mailto:r...@redhat.com]
> Sent: Monday, October 27, 2014 11:20 PM
> To: Zhenqiang Chen
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [Ping] [PATCH, 6/10] aarch64: add ccmp CC mode
>
> On 10/27/2014 12:48
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Richard Henderson
> Sent: Monday, October 27, 2014 11:47 PM
> To: Zhenqiang Chen
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [Ping] [PATCH, 8/10] aarch6
r bytes = 0;
+ if ((unsigned char) ((char) 127 - bytes) < iov_len)
+return 22;
+ return 0;
+}
+/* { dg-final { object-size text <= 12 } } */
> -Original Message-
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Thursday, October 30, 2014 1:27 PM
> To: Zhenqiang Chen;
> -Original Message-
> From: Richard Henderson [mailto:r...@redhat.com]
> Sent: Thursday, October 30, 2014 11:58 PM
> To: Zhenqiang Chen
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [Ping] [PATCH, 4/10] expand ccmp
>
> On 10/29/2014 03:30 AM, Zhenqiang Che
PASS for Cortex-M0/M4 and Cortext-A15 (THUMB and ARM
modes).
OK for trunk?
Thanks!
-Zhenqiang
testsuite/ChangeLog:
2014-11-03 Zhenqiang Chen
* gcc.target/arm/pr45701-1.c: Check LR used.
diff --git a/gcc/testsuite/gcc.target/arm/pr45701-1.c
b/gcc/testsuite/gcc.target/arm/pr45701-1.c
-11-03 Zhenqiang Chen
* gcc.target/arm/combine-cmp-shift.c: Skip arm_thumb1_ok.
* gcc.target/arm/unsined-extend-1.c: Likewise.
diff --git a/gcc/testsuite/gcc.target/arm/combine-cmp-shift.c
b/gcc/testsuite/gcc.target/arm/combine-cmp-shift.c
index a64f20e..6291b06 100644
--- a/gcc
> -Original Message-
> From: Jan-Benedict Glaw [mailto:jbg...@lug-owl.de]
> Sent: Monday, November 03, 2014 6:16 PM
> To: Zhenqiang Chen; Hartmut Penner; Ulrich Weigand; Andreas Krebbel
> Cc: 'Richard Henderson'; gcc-patches@gcc.gnu.org
> Subject: Re: [BUILD
Sorry for breaking the build. The patch was reverted.
I will rework on it.
Thanks!
-Zhenqiang
> -Original Message-
> From: Jan-Benedict Glaw [mailto:jbg...@lug-owl.de]
> Sent: Monday, November 03, 2014 6:16 PM
> To: Zhenqiang Chen; Hartmut Penner; Ulrich Weigand; Andreas
The patch leads to big regression for float operators on target without hard
fpu support due to register shuffle.
Please refer https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63743 for more
detail.
Thanks!
-Zhenqiang
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-pat
On Behalf Of Zhenqiang Chen
> Sent: Monday, October 27, 2014 3:50 PM
> To: 'Richard Henderson'
> Cc: gcc-patches@gcc.gnu.org
> Subject: RE: [Ping] [PATCH, 9/10] aarch64: generate conditional compare
> instructions
>
>
>
> > -Original Message-
&g
run full s390 tests. Would anyone in the TO list help
to run the s390 tests?
Thanks!
-Zhenqiang
ChangeLog:
2014-11-06 Zhenqiang Chen
* ifcvt.c (noce_emit_cmove, noce_get_alt_condition,
noce_get_condition):
Allow CC mode if HAVE_cbranchcc4.
(noce_emit_store_flag): Change
> -Original Message-
> From: Richard Henderson [mailto:r...@redhat.com]
> Sent: Wednesday, November 05, 2014 9:42 PM
> To: Zhenqiang Chen
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [Ping] [PATCH, 9/10] aarch64: generate conditional compare
> instructions
>
> -Original Message-
> From: Ulrich Weigand [mailto:uweig...@de.ibm.com]
> Sent: Friday, November 07, 2014 12:11 AM
> To: Richard Henderson
> Cc: Zhenqiang Chen; 'Jan-Benedict Glaw'; Hartmut Penner; Andreas Krebbel;
> gcc-patches@gcc.gnu.org
> Subject: Re:
> -Original Message-
> From: Richard Earnshaw
> Sent: Friday, November 07, 2014 8:51 PM
> To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
> Cc: Ramana Radhakrishnan
> Subject: Re: [PATCH, testsuite, ARM] Check lr other than r3
>
> On 03/11/14 08:18, Zhen
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Jeff Law
> Sent: Tuesday, December 02, 2014 6:11 AM
> To: Zhenqiang Chen
> Cc: Steven Bosscher; gcc-patches@gcc.gnu.org; Jakub Jelinek
> Subject: Re:
Ping?
Thanks!
-Zhenqiang
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
Behalf Of Zhenqiang Chen
Sent: Monday, December 01, 2014 3:14 PM
To: 'H.J. Lu'
Cc: Richard Henderson; GCC Patches
Subject: RE: [PATCH, ifcvt] F
> -Original Message-
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Tuesday, December 09, 2014 5:29 AM
> To: Zhenqiang Chen
> Cc: Steven Bosscher; gcc-patches@gcc.gnu.org; Jakub Jelinek
> Subject: Re: [PATCH] Fix PR 61225
>
> On 12/04/14 01:
> -Original Message-
> From: Richard Henderson [mailto:r...@redhat.com]
> Sent: Wednesday, December 10, 2014 8:55 AM
> To: Zhenqiang Chen
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [Ping] [PATCH, ifcvt] Fix PR63917
>
> On 12/04/2014 05:16 PM, Zhenqiang Che
> -Original Message-
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Wednesday, December 10, 2014 3:16 AM
> To: Segher Boessenkool; Zhenqiang Chen
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH] Fix PR 61225
>
> On 12/09/14 12:07, Segher Boessenkool w
> -Original Message-
> From: Richard Henderson [mailto:r...@redhat.com]
> Sent: Tuesday, November 25, 2014 5:25 PM
> To: Zhenqiang Chen
> Cc: Marcus Shawcroft; gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH, AARCH64] Fix ICE in CCMP (PR64015)
>
> On 11/25/2014
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Eric Botcazou
> Sent: Monday, November 24, 2014 5:41 PM
> To: Zhenqiang Chen
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH, combine] Try REG_E
> -Original Message-
> From: Richard Henderson [mailto:r...@redhat.com]
> Sent: Saturday, December 13, 2014 3:26 AM
> To: Zhenqiang Chen
> Cc: Marcus Shawcroft; gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH, AARCH64] Fix ICE in CCMP (PR64015)
>
> > - tree
Ping^2.
Thanks!
-Zhenqiang
On 2 April 2013 17:54, Zhenqiang Chen wrote:
> Ping.
>
> On 21 March 2013 14:58, Zhenqiang Chen wrote:
>> Hi,
>>
>> When shrink-wrap is enabled, the "returns" from simple-return path and
>> normal return path can
Ping.
Thanks!
-Zhenqiang
On 3 April 2013 14:50, Zhenqiang Chen wrote:
> On 2 April 2013 17:55, Ramana Radhakrishnan wrote:
>> On Thu, Mar 21, 2013 at 7:03 AM, Zhenqiang Chen
>> wrote:
>>> Hi,
>>>
>>> The patch is to enable shrink-wrap for TARGET_ARM a
On 15 May 2013 06:31, Ramana Radhakrishnan wrote:
> Sorry this had dropped off my list of patches to review somehow but
> anyway here's a first cut review.
>
> On Thu, Mar 21, 2013 at 6:58 AM, Zhenqiang Chen
> wrote:
>> Hi,
>>
>> When shrink-wrap is enabled,
n generated by epilogue
and "simple" return generated by shrink-wrap can be optimized as one,
which leads to dwarf info issue.
The rebased patch is attached.
Thanks!
-Zhenqiang
> On Wed, Apr 3, 2013 at 7:50 AM, Zhenqiang Chen
> wrote:
>> On 2 April 2013 17:55, Ramana
On 17 May 2013 22:22, Ramana Radhakrishnan wrote:
> On 05/16/13 07:27, Zhenqiang Chen wrote:
>>
>> On 15 May 2013 06:31, Ramana Radhakrishnan
>> wrote:
>>>
>>> Sorry this had dropped off my list of patches to review somehow but
>>> anyway here&#x
arm*-*-symbianelf* | arm*-*-rtems*)
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
> Sent: Monday, March 04, 2013 4:26 PM
> To: gcc-patches@gcc.gnu.org
> Subject: RE: [PATCH libgcc]
), 453.povray is ~5% better.
* Bootstrapped and no make check regression for X86-64 and ARM A9.
Is it OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2013-06-06 Zhenqiang Chen
* function.c (prepare_shrink_wrap): Do copy prop for entry block.
* function.h
> -Original Message-
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Friday, September 05, 2014 12:45 PM
> To: Zhenqiang Chen
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH, ira] Miss checks in split_live_ranges_for_shrink_wrap
>
> On 09/01/14 02:
rtex-M0 on qemu.
For Cortex-M0 text code size, it reduces 0.15% for CSiBE, 0.59% for
coremark, 0.13% for dhrystone, 0.14% for eembc_v1 and 0.31% for eembc-v2.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-09-10 Zhenqiang Chen
* config/arm/arm.c: #include "tm-constrs.h"
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Jiong Wang
> Sent: Monday, September 15, 2014 11:28 PM
> To: Zhenqiang Chen
> Cc: gcc-patches@gcc.gnu.org; Jeff Law
> Subject: Re: [PATCH, 2/2] shrink w
for ARM Cortex-M0.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-09-17 Zhenqiang Chen
PR rtl-optimization/63210
* ira-color.c (assign_hard_reg): Ignore conflict cost if the
HARD_REGNO is not availabe for CONFLICT_A.
testsuite/ChangeLog:
2014-09-17 Zhenqiang Chen
> -Original Message-
> From: Marek Polacek [mailto:pola...@redhat.com]
> Sent: Wednesday, September 17, 2014 5:29 PM
> To: Zhenqiang Chen
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH, ira] Ignore some conflict cost
>
> On Wed, Sep 17, 2014 at 05:18:27PM +08
Ping?
Patch is attached for easy to apply.
Thanks!
-Zhenqiang
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
> Sent: Monday, June 23, 2014 2:57 PM
> To: gcc-patches@gcc.gnu.org
> Subject:
The patch is discarded since I can not reproduce the issue with the latest
trunk.
Thanks!
-Zhenqiang
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
> Sent: Thursday, June 26, 2014
Ping?
Patch is attached for easy to apply.
Thanks!
-Zhenqiang
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
> Sent: Tuesday, July 01, 2014 1:08 PM
> To: Richard Earnshaw
> Cc: gcc-p
Ping?
Patch is attached for easy to apply.
Thanks!
-Zhenqiang
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
> Sent: Monday, June 23, 2014 3:00 PM
> To: gcc-patches@gcc.gnu.org
> Sub
Ping?
Patch is rebased and regenerated since "[PATCH, 3/10] skip swapping operands
used in ccmp" is discarded.
Please find the updated patch in attachment.
Bootstrap and no make check regression on X86-64.
Thanks!
-Zhenqiang
ChangeLog:
2014-09-23 Zhenqiang Chen
* ccmp.c
Ping?
Patch is attached for easy to apply.
Thanks!
-Zhenqiang
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
> Sent: Monday, June 23, 2014 3:00 PM
> To: gcc-patches@gcc.gnu.org
> Sub
Ping?
Patch is attached for easy to apply.
Thanks!
-Zhenqiang
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
> Sent: Monday, June 23, 2014 3:00 PM
> To: gcc-patches@gcc.gnu.org
> Sub
Ping?
Patch is attached for easy to apply.
Move the cstorecc4 pattern from "[PATCH, 10/10] aarch64: Handle ccmp in
ifcvt to make it work with cmov" to this patch, since cmov optimization does
not depend on that patch.
Thanks!
-Zhenqiang
ChangeLog:
2014-09-23 Zhenqiang Chen
Ping?
Patch is attached for easy to apply.
Bootstrap on AARCH64 qemu.
Test cases: test_frame_*.c need update after the patch.
Thanks!
-Zhenqiang
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Zhenqiang Ch
Ping?
Patch is rebased and attached.
Thanks!
-Zhenqiang
ChangeLog
2014-09-23 Zhenqiang Chen
Andrew Pinski
* ccmp.c (used_in_cond_stmt_p): Hande ? expr.
* expr.c (expand_cond_expr_using_cmove): Handle CCmode.
* ifcvt.c: #include "ccmp.h".
> -Original Message-
> From: Jiong Wang [mailto:jiong.w...@arm.com]
> Sent: Thursday, September 25, 2014 2:13 AM
> To: Jeff Law; Zhenqiang Chen
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH, 2/2] shrink wrap a function with a single loop: split
> live_edge
>
g00581.html
The patch is similar to the fix for aarch64.
Bootstrap and no make check regression on Panda Board.
Is it OK for trunk and 4.8?
Thanks!
-Zhenqiang
ChangeLog:
2013-06-18 Zhenqiang Chen
* config/arm/neon.md (vcond): Fix floating-point vector
comparisons agains
On 18 June 2013 17:41, Ramana Radhakrishnan wrote:
> On 06/18/13 09:50, Zhenqiang Chen wrote:
>>
>> Hi,
>>
>> During expand, function vcond inverses some CMP, e.g.
>>
>> a LE b -> b GE a
>>
>> But if "b" is "CONST0_RTX
So the check in function
move_insn_for_shrink_wrap is not enough.
The patch is to add more check bases on DF_LIVE_BB_INFO (bb)->gen if
df-live is available.
Bootstrap and no make check regression on x86-64 and Panda board.
Is is OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2013-06-27 Zhenq
On 27 June 2013 21:10, Richard Earnshaw wrote:
> On 27/06/13 10:02, Zhenqiang Chen wrote:
>>
>> Hi,
>>
>> Shrink-wrap optimization sinks some instructions for more
>> opportunities. It uses DF_LR_BB_INFO (bb)->def to check whether BB
>> clobbers SRC.
Hi,
The patch is updated. If there is no df_live, we still can not
guarantee the correctness. So the new patch just checks the
DF_INSN_DEFS.
Bootstrap and no make check regression on x86-64.
Bootstrap on ARM chrome book.
Is it OK?
Thanks!
-Zhenqiang
Changelog:
2013-07-05 Zhenqiang Chen
On 5 July 2013 16:18, Jakub Jelinek wrote:
> On Fri, Jul 05, 2013 at 04:11:00PM +0800, Zhenqiang Chen wrote:
>> + FOR_BB_INSNS(bb, x)
>
> Just style nits:
> Missing space between (. Also, please don't use uppercase names
> for labels.
>
> Jakub
Th
-mfloat-abi=hard -S" } */
>
> dg-add-options arm_neon ?
> dg-require-effective-target arm_neon ?
I will update it.
Thanks!
-Zhenqiang
> On Wed, Jun 26, 2013 at 9:01 AM, Zhenqiang Chen
> wrote:
>> On 18 June 2013 17:41, Ramana Radhakrishnan wrote:
>>> On 0
Ping?
Thanks!
-Zhenqiang
On 5 July 2013 17:37, Zhenqiang Chen wrote:
> On 5 July 2013 16:18, Jakub Jelinek wrote:
>> On Fri, Jul 05, 2013 at 04:11:00PM +0800, Zhenqiang Chen wrote:
>>> + FOR_BB_INSNS(bb, x)
>>
>> Just style nits:
>> Missing spac
On 11 July 2013 18:31, Eric Botcazou wrote:
>> Shrink-wrap optimization sinks some instructions for more
>> opportunities. It uses DF_LR_BB_INFO (bb)->def to check whether BB
>> clobbers SRC. But for ARM, gcc might generate cond_exec insns before
>> shrink-wrapping. And DF_LR_BB_INFO (bb)->def doe
Ping?
Is the updated patch OK for trunk?
Thanks!
-Zhenqiang
On 16 July 2013 17:29, Zhenqiang Chen wrote:
> On 11 July 2013 18:31, Eric Botcazou wrote:
>>> Shrink-wrap optimization sinks some instructions for more
>>> opportunities. It uses DF_LR_BB_INFO (bb)->
ve it and use __builtin_abort instead. Would it be possible to
> remove stdio.h as well?
Update abort to __builtin_abort and malloc to __builtin_malloc. And
remove all the include.
ChangeLog
2013-07-22 Zhenqiang Chen
* function.c (move_insn_for_shrink_wrap): check gen of df_live if
the ChangeLog updated according to your comments.
-Zhenqiang
>> ChangeLog
>> 2013-07-22 Zhenqiang Chen
>>
>> * function.c (move_insn_for_shrink_wrap): check gen of df_live if
>> it exists, otherwise (-O1) give up searching.
>
> Capit
Thank you all for the comments. The patch is updated as:
1) Revert it to the original one.
2) For the testcase, replace the dg-options with
/* { dg-do compile } */
/* { dg-require-effective-target arm_neon } */
/* { dg-add-options arm_neon } */
/* { dg-options "-O3" } */
Bootstrap on Chromebook an
it OK for trunk?
Thanks!
-Zhenqiang
ChangeLog
2013-08-05 Zhenqiang Chen
* tree-ssa-reassoc.c (optimize_range_tests): Reasociate
X == CST1 || X == CST2 if popcount (CST2 - CST1) == 1 into
((X - CST1) & ~(CST2 - CST1)) == 0.
testsuite/ChangeLog
2013-08-05 Zhenqi
> -Original Message-
> From: Andrew Pinski [mailto:pins...@gmail.com]
> Sent: Monday, August 05, 2013 4:40 PM
> To: Zhenqiang Chen
> Cc: GCC Patches
> Subject: Re: [PATCH] Reassociate X == CST1 || X == CST2 if popcount (CST2 -
> CST1) == 1 into ((X - CST1) & ~(C
Ping? Is it OK for 4.8 and trunk?
Thanks!
-Zhenqiang
On 1 August 2013 10:04, Zhenqiang Chen wrote:
> Thank you all for the comments. The patch is updated as:
> 1) Revert it to the original one.
> 2) For the testcase, replace the dg-options with
> /* { dg-do compile } */
>
Ping?
Thanks!
-Zhenqiang
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
> Sent: Friday, January 11, 2013 5:21 PM
> To: gcc-patches@gcc.gnu.org
> Subject: [PATCH libgcc] Fix ARM uclinux l
bc. So an
additional %L is required for non-static link.
Is it OK for trunk?
Thanks!
-Zhenqiang
2013-03-19 Zhenqiang Chen
* config/arm/uclinux-elf.h: Add %L to LINK_GCC_C_SEQUENCE_SPEC for
non- static link
diff --git a/gcc/config/arm/uclinux-elf.h b/gcc/config/arm/uclinux-elf.h
inde
ssion.
Is it OK?
Thanks!
-Zhenqiang
ChangeLog:
2013-03-21 Zhenqiang Chen
* config/arm/arm.c (arm_add_cfa_adjust_cfa_note): New added.
(arm_emit_multi_reg_pop): Add REG_CFA_ADJUST_CFA notes.
(arm_emit_vfp_multi_reg_pop): Likewise.
(thumb2_emit_ldrd_pop): Likewise.
Hi,
The patch is to enable shrink-wrap for TARGET_ARM and TARGET_THUMB2.
Bootstrapped and no make check regression.
All previous Linaro shrink-wrap bugs (http://goo.gl/6fGg5) are verified.
Is it OK?
Thanks!
-Zhenqiang
ChangeLog:
2013-03-21 Bernd Schmidt
Zhenqiang Chen
Ping.
On 21 March 2013 14:58, Zhenqiang Chen wrote:
> Hi,
>
> When shrink-wrap is enabled, the "returns" from simple-return path and
> normal return path can be merged. The code is like:
>
> tst ...
> / \
> | push ...
> | ...
> |
On 2 April 2013 17:55, Ramana Radhakrishnan wrote:
> On Thu, Mar 21, 2013 at 7:03 AM, Zhenqiang Chen
> wrote:
>> Hi,
>>
>> The patch is to enable shrink-wrap for TARGET_ARM and TARGET_THUMB2.
>>
>> Bootstrapped and no make check regression.
>> All previ
e patch is to make "b" a register when inversing LE.
Is it OK for trunk, 4.8 and arm/aarch64-4.7-branch?
Thanks!
-Zhenqiang
ChangeLog:
2013-04-10 Zhenqiang Chen
* config/aarch64/aarch64-simd.md (aarch64_vcond_internal): Set
operands[5] to register when inversing L
On 10 April 2013 16:05, Andrew Pinski wrote:
> On Wed, Apr 10, 2013 at 1:02 AM, Zhenqiang Chen
> wrote:
>> Hi,
>>
>> During expand, function aarch64_vcond_internal inverses some CMP, e.g.
>>
>> a LE b -> b GE a
>>
>> But if "b" i
On 10 April 2013 17:18, Andrew Pinski wrote:
> On Wed, Apr 10, 2013 at 2:02 AM, Zhenqiang Chen
> wrote:
>> On 10 April 2013 16:05, Andrew Pinski wrote:
>>> On Wed, Apr 10, 2013 at 1:02 AM, Zhenqiang Chen
>>> wrote:
>>>> Hi,
>>>>
>>>
>>
>>>> -Original Message-
>>>> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
>>>> ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
>>>> Sent: 10 April 2013 09:02
>>>> To: gcc-patches@gcc.gnu.org
>>>> Cc: Marcus S
On 28 April 2014 18:16, Marcus Shawcroft wrote:
> On 22 April 2014 10:36, Zhenqiang Chen wrote:
>
>>> +float f1 (float a, float b, float c, float d)
>>> +{
>>> + if (a > 0.0)
>>> +return c;
>>> + else
>>> +return 2.0;
>
Ping? OK for trunk?
Thanks!
-Zhenqiang
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen
> Sent: Tuesday, February 25, 2014 5:35 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Ramana Radhakrishnan
. There is no way to sink it out of the entry
block.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-05-08 Zhenqiang Chen
* function.c (last_or_compare_p, try_copy_prop): new functions.
(move_insn_for_shrink_wrap): try copy propagation.
(prepare_shrink_wrap): Sep
Hi,
The patch splits the live_edge for move_insn_for_shrink_wrap to sink
the copy out of the entry block.
Bootstrap and no make check regression on X86-64 and ARM.
OK for trunk?
Thanks!
-Zhenqiang
ChangeLog:
2014-05-08 Zhenqiang Chen
* function.c (next_block_for_reg): Allow
On 9 May 2014 14:08, Jeff Law wrote:
> On 05/08/14 02:07, Zhenqiang Chen wrote:
>>
>> Hi,
>>
>> The patch splits the live_edge for move_insn_for_shrink_wrap to sink
>> the copy out of the entry block.
>>
>> Bootstrap and no make check regression on X86
On 9 May 2014 14:00, Jeff Law wrote:
> On 05/08/14 02:06, Zhenqiang Chen wrote:
>>
>> Hi,
>>
>> Similar issue was discussed in thread
>> http://gcc.gnu.org/ml/gcc-patches/2013-04/msg01145.html. The patches
>> are close to Jeff's suggestion: "si
Ping? OK for trunk?
Thanks!
-Zhenqiang
On 25 March 2014 16:13, Zhenqiang Chen wrote:
> Hi
>
> The patch enables shrink-wrap for apcs frame.
>
> Bootstrap and no make check regression in ARM, THUMB1 and THUMB2 modes.
> No make check regression with "-g/-mapcs/-marm&q
On 13 May 2014 15:55, Marek Polacek wrote:
> On Tue, May 13, 2014 at 03:14:34PM +0800, Zhenqiang Chen wrote:
>> Thanks. Committed the patch @r210351 with changes:
>> (1) Create shrink-wrap.h.
>> (2) Move all shrink-wrapping related interfaces from function.h to
>> s
On 13 May 2014 16:13, Marek Polacek wrote:
> On Tue, May 13, 2014 at 04:08:21PM +0800, Zhenqiang Chen wrote:
>> On 13 May 2014 15:55, Marek Polacek wrote:
>> > On Tue, May 13, 2014 at 03:14:34PM +0800, Zhenqiang Chen wrote:
>> >> Thanks. Committed the patch @
On 9 May 2014 14:08, Jeff Law wrote:
> On 05/08/14 02:07, Zhenqiang Chen wrote:
>>
>> Hi,
>>
>> The patch splits the live_edge for move_insn_for_shrink_wrap to sink
>> the copy out of the entry block.
>>
>> Bootstrap and no make check regression on X86
After reading the code in regcprop.c, I think I should reuse the
copyprop_hardreg_forward_1. So rewrite the patch, which is much simple
and should handle HAVE_cc0. But not sure we'd handle DEBUG_INSN or
not.
2014-05-13 Zhenqiang Chen
* regcprop.c (skip_debug_insn_p): New
On 13 May 2014 20:56, Richard Earnshaw wrote:
> On 25/03/14 08:13, Zhenqiang Chen wrote:
>> Hi
>>
>> The patch enables shrink-wrap for apcs frame.
>>
>> Bootstrap and no make check regression in ARM, THUMB1 and THUMB2 modes.
>> No make check regression with
On 15 May 2014 02:03, Jeff Law wrote:
> On 05/13/14 03:49, Zhenqiang Chen wrote:
>>
>> On 9 May 2014 14:08, Jeff Law wrote:
>>>
>>> On 05/08/14 02:07, Zhenqiang Chen wrote:
>>>>
>>>>
>>>> Hi,
>>>>
>>>>
On 15 May 2014 02:07, Jeff Law wrote:
> On 05/13/14 04:04, Zhenqiang Chen wrote:
>>
>> After reading the code in regcprop.c, I think I should reuse the
>> copyprop_hardreg_forward_1. So rewrite the patch, which is much simple
>> and should handle HAVE_cc0. But not sur
On 13 May 2014 20:56, Richard Earnshaw wrote:
> On 25/03/14 08:13, Zhenqiang Chen wrote:
>> Hi
>>
>> The patch enables shrink-wrap for apcs frame.
>>
>> Bootstrap and no make check regression in ARM, THUMB1 and THUMB2 modes.
>> No make check regression with
Hi,
The patch fix ICE issue triggered by shrink-wrapping enhancement.
Bootstrap and no make check regression on X86-64.
OK for trunk?
Thanks!
-Zhenqiang
2014-05-20 Zhenqiang Chen
PR rtl-optimization/61220
Part of PR rtl-optimization/61225
* shrink-wrap.c
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