Ping? Patch is attached for easy to apply.
Thanks! -Zhenqiang > -----Original Message----- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen > Sent: Monday, June 23, 2014 3:00 PM > To: gcc-patches@gcc.gnu.org > Subject: [PATCH, 6/10] aarch64: add ccmp CC mode > > Hi, > > The patches add a set of CC mode for AARCH64, which is similar as them for > ARM. > > OK for trunk? > > Thanks! > -Zhenqiang > > ChangeLog: > 2014-06-23 Zhenqiang Chen <zhenqiang.c...@linaro.org> > > * config/aarch64/aarch64-modes.def: Define new CC modes for ccmp. > * config/aarch64/aarch64.c (aarch64_get_condition_code_1): > New prototype. > (aarch64_get_condition_code): Call aarch64_get_condition_code_1. > (aarch64_get_condition_code_1): New function to handle ccmp CC > mode. > * config/aarch64/predicates.md (ccmp_cc_register): New. > > diff --git a/gcc/config/aarch64/aarch64-modes.def > b/gcc/config/aarch64/aarch64-modes.def > index 1d2cc76..71fd2f0 100644 > --- a/gcc/config/aarch64/aarch64-modes.def > +++ b/gcc/config/aarch64/aarch64-modes.def > @@ -25,6 +25,16 @@ CC_MODE (CC_ZESWP); /* zero-extend LHS (but swap > to make it RHS). */ CC_MODE (CC_SESWP); /* sign-extend LHS (but swap to > make it RHS). */ > CC_MODE (CC_NZ); /* Only N and Z bits of condition flags are valid. */ > CC_MODE (CC_Z); /* Only Z bit of condition flags is valid. */ > +CC_MODE (CC_DNE); > +CC_MODE (CC_DEQ); > +CC_MODE (CC_DLE); > +CC_MODE (CC_DLT); > +CC_MODE (CC_DGE); > +CC_MODE (CC_DGT); > +CC_MODE (CC_DLEU); > +CC_MODE (CC_DLTU); > +CC_MODE (CC_DGEU); > +CC_MODE (CC_DGTU); > > /* Vector modes. */ > VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI. */ > diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c > index ecf88f9..e5ede6e 100644 > --- a/gcc/config/aarch64/aarch64.c > +++ b/gcc/config/aarch64/aarch64.c > @@ -3460,6 +3460,9 @@ aarch64_select_cc_mode (RTX_CODE code, rtx x, > rtx y) } > > static unsigned > +aarch64_get_condition_code_1 (enum machine_mode, enum rtx_code); > + > +static unsigned > aarch64_get_condition_code (rtx x) > { > enum machine_mode mode = GET_MODE (XEXP (x, 0)); @@ -3467,7 > +3470,12 @@ aarch64_get_condition_code (rtx x) > > if (GET_MODE_CLASS (mode) != MODE_CC) > mode = SELECT_CC_MODE (comp_code, XEXP (x, 0), XEXP (x, 1)); > + return aarch64_get_condition_code_1 (mode, comp_code); } > > +static unsigned > +aarch64_get_condition_code_1 (enum machine_mode mode, enum > rtx_code > +comp_code) { > switch (mode) > { > case CCFPmode: > @@ -3490,6 +3498,27 @@ aarch64_get_condition_code (rtx x) > } > break; > > + case CC_DNEmode: > + return comp_code == NE ? AARCH64_NE : AARCH64_EQ; > + case CC_DEQmode: > + return comp_code == NE ? AARCH64_EQ : AARCH64_NE; > + case CC_DGEmode: > + return comp_code == NE ? AARCH64_GE : AARCH64_LT; > + case CC_DLTmode: > + return comp_code == NE ? AARCH64_LT : AARCH64_GE; > + case CC_DGTmode: > + return comp_code == NE ? AARCH64_GT : AARCH64_LE; > + case CC_DLEmode: > + return comp_code == NE ? AARCH64_LE : AARCH64_GT; > + case CC_DGEUmode: > + return comp_code == NE ? AARCH64_CS : AARCH64_CC; > + case CC_DLTUmode: > + return comp_code == NE ? AARCH64_CC : AARCH64_CS; > + case CC_DGTUmode: > + return comp_code == NE ? AARCH64_HI : AARCH64_LS; > + case CC_DLEUmode: > + return comp_code == NE ? AARCH64_LS : AARCH64_HI; > + > case CCmode: > switch (comp_code) > { > diff --git a/gcc/config/aarch64/predicates.md > b/gcc/config/aarch64/predicates.md > index dd35714..ab02fd0 100644 > --- a/gcc/config/aarch64/predicates.md > +++ b/gcc/config/aarch64/predicates.md > @@ -39,6 +39,23 @@ > (ior (match_operand 0 "register_operand") > (match_operand 0 "aarch64_ccmp_immediate"))) > > +(define_special_predicate "ccmp_cc_register" > + (and (match_code "reg") > + (and (match_test "REGNO (op) == CC_REGNUM") > + (ior (match_test "mode == GET_MODE (op)") > + (match_test "mode == VOIDmode > + && (GET_MODE (op) == CC_DNEmode > + || GET_MODE (op) == CC_DEQmode > + || GET_MODE (op) == CC_DLEmode > + || GET_MODE (op) == CC_DLTmode > + || GET_MODE (op) == CC_DGEmode > + || GET_MODE (op) == CC_DGTmode > + || GET_MODE (op) == CC_DLEUmode > + || GET_MODE (op) == CC_DLTUmode > + || GET_MODE (op) == CC_DGEUmode > + || GET_MODE (op) == CC_DGTUmode)")))) > +) > + > (define_predicate "aarch64_simd_register" > (and (match_code "reg") > (ior (match_test "REGNO_REG_CLASS (REGNO (op)) == FP_LO_REGS")
6-ccmp-cc-mode.patch
Description: Binary data
