Ping? Patch is attached for easy to apply.
Thanks! -Zhenqiang > -----Original Message----- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of Zhenqiang Chen > Sent: Monday, June 23, 2014 3:00 PM > To: gcc-patches@gcc.gnu.org > Subject: [PATCH, 5/10] aarch64: add ccmp operand predicate > > Hi, > > The patches defines ccmp operand predicate for AARCH64. > > OK for trunk? > > Thanks! > -Zhenqiang > > ChangeLog: > 2014-06-23 Zhenqiang Chen <zhenqiang.c...@linaro.org> > > * config/aarch64/aarch64-protos.h (aarch64_uimm5): New prototype. > * config/aarch64/constraints.md (Usn): Immediate for ccmn. > * config/aarch64/predicates.md (aarch64_ccmp_immediate): New. > (aarch64_ccmp_operand): New. > * config/aarch64/aarch64.c (aarch64_uimm5): New function. > > diff --git a/gcc/config/aarch64/aarch64-protos.h > b/gcc/config/aarch64/aarch64-protos.h > index c4f75b3..997ff50 100644 > --- a/gcc/config/aarch64/aarch64-protos.h > +++ b/gcc/config/aarch64/aarch64-protos.h > @@ -246,6 +246,8 @@ void aarch64_init_expanders (void); void > aarch64_print_operand (FILE *, rtx, char); void > aarch64_print_operand_address (FILE *, rtx); > > +bool aarch64_uimm5 (HOST_WIDE_INT); > + > /* Initialize builtins for SIMD intrinsics. */ void init_aarch64_simd_builtins > (void); > > diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c > index f2968ff..ecf88f9 100644 > --- a/gcc/config/aarch64/aarch64.c > +++ b/gcc/config/aarch64/aarch64.c > @@ -9566,6 +9566,13 @@ aarch64_expand_movmem (rtx *operands) > return true; > } > > +/* Return true if val can be encoded as a 5-bit unsigned immediate. */ > +bool > +aarch64_uimm5 (HOST_WIDE_INT val) > +{ > + return (val & (HOST_WIDE_INT) 0x1f) == val; } > + > #undef TARGET_ADDRESS_COST > #define TARGET_ADDRESS_COST aarch64_address_cost diff --git > a/gcc/config/aarch64/constraints.md > b/gcc/config/aarch64/constraints.md > index 807d0b1..bb6a8a1 100644 > --- a/gcc/config/aarch64/constraints.md > +++ b/gcc/config/aarch64/constraints.md > @@ -89,6 +89,11 @@ > (and (match_code "const_int") > (match_test "(unsigned HOST_WIDE_INT) ival < 32"))) > > +(define_constraint "Usn" > + "A constant that can be used with a CCMN operation (once negated)." > + (and (match_code "const_int") > + (match_test "aarch64_uimm5 (-ival)"))) > + > (define_constraint "Usd" > "@internal > A constraint that matches an immediate shift constant in DImode." > diff --git a/gcc/config/aarch64/predicates.md > b/gcc/config/aarch64/predicates.md > index 2702a3c..dd35714 100644 > --- a/gcc/config/aarch64/predicates.md > +++ b/gcc/config/aarch64/predicates.md > @@ -30,6 +30,15 @@ > (ior (match_code "symbol_ref") > (match_operand 0 "register_operand"))) > > +(define_predicate "aarch64_ccmp_immediate" > + (and (match_code "const_int") > + (ior (match_test "aarch64_uimm5 (INTVAL (op))") > + (match_test "aarch64_uimm5 (-INTVAL (op))")))) > + > +(define_predicate "aarch64_ccmp_operand" > + (ior (match_operand 0 "register_operand") > + (match_operand 0 "aarch64_ccmp_immediate"))) > + > (define_predicate "aarch64_simd_register" > (and (match_code "reg") > (ior (match_test "REGNO_REG_CLASS (REGNO (op)) == FP_LO_REGS")
5-ccmp-operants.patch
Description: Binary data
