[gcc r16-1410] testsuite: Add -mpopcnt and -mabm variants of PR90693 tests

https://gcc.gnu.org/g:e477e7cd104af96c55379f69125db3f1c350c9ed commit r16-1410-ge477e7cd104af96c55379f69125db3f1c350c9ed Author: Jakub Jelinek Date: Wed Jun 11 07:16:06 2025 +0200 testsuite: Add -mpopcnt and -mabm variants of PR90693 tests My r16-1398 patch broke bootstrap on aarc

[gcc r16-1409] ranger: Handle the theoretical case of GIMPLE_COND with one succ edge during expansion [PR120434]

https://gcc.gnu.org/g:f3dde39e597f48832208f423fb20f29674ce49ae commit r16-1409-gf3dde39e597f48832208f423fb20f29674ce49ae Author: Jakub Jelinek Date: Wed Jun 11 07:03:04 2025 +0200 ranger: Handle the theoretical case of GIMPLE_COND with one succ edge during expansion [PR120434] On

[gcc r16-1408] internal-fn: Fix up .POPCOUNT expansion

https://gcc.gnu.org/g:9e9c8aaab10ffeeb58c4936b55e8126ad5e31307 commit r16-1408-g9e9c8aaab10ffeeb58c4936b55e8126ad5e31307 Author: Jakub Jelinek Date: Wed Jun 11 07:00:27 2025 +0200 internal-fn: Fix up .POPCOUNT expansion Apparently my ranger during expansion patch broke bootstrap o

[gcc r16-1404] diagnostics: fix tag nesting issues in experimental-html sink [PR120610]

https://gcc.gnu.org/g:3dcce649a1e0833a4c3bb9ced4b9c0b38c3fb8a5 commit r16-1404-g3dcce649a1e0833a4c3bb9ced4b9c0b38c3fb8a5 Author: David Malcolm Date: Tue Jun 10 20:06:37 2025 -0400 diagnostics: fix tag nesting issues in experimental-html sink [PR120610] I've been seeing issues in t

[gcc r16-1405] diagnostics: xml: add add_text_from_pp

https://gcc.gnu.org/g:896edb1d0ae90ff1f60a6b894f04eb3c436790f5 commit r16-1405-g896edb1d0ae90ff1f60a6b894f04eb3c436790f5 Author: David Malcolm Date: Tue Jun 10 20:06:38 2025 -0400 diagnostics: xml: add add_text_from_pp Various places use xp.add_text (pp_formatted_text (&pp))

[gcc r16-1406] diagnostics: make experimental-html sink prettier [PR116792]

https://gcc.gnu.org/g:cb1d203445c923aa64bca01b0ffb6d3d16a82130 commit r16-1406-gcb1d203445c923aa64bca01b0ffb6d3d16a82130 Author: David Malcolm Date: Tue Jun 10 20:06:38 2025 -0400 diagnostics: make experimental-html sink prettier [PR116792] This patch to the "experimental-html" di

[gcc r16-1403] gimple-ssa-warn-access: add missing auto_diagnostic_group

https://gcc.gnu.org/g:b619b4d7e7a5078d4fe8b1c4e89258ce4d21be4d commit r16-1403-gb619b4d7e7a5078d4fe8b1c4e89258ce4d21be4d Author: David Malcolm Date: Tue Jun 10 20:06:37 2025 -0400 gimple-ssa-warn-access: add missing auto_diagnostic_group Spotted whilst implementing nesting support

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:71bee51da51e6cd1ce25dd48c69c2aaf8840791b commit 71bee51da51e6cd1ce25dd48c69c2aaf8840791b Author: Michael Meissner Date: Tue Jun 10 18:07:26 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:426e6a7c25056fcd5303ce1de6f3beb36b41194a commit 426e6a7c25056fcd5303ce1de6f3beb36b41194a Author: Michael Meissner Date: Tue Jun 10 18:00:38 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:d8dc55ea7482cad5d7e776d3b080c233672e commit d8dc55ea7482cad5d7e776d3b080c233672e Author: Michael Meissner Date: Tue Jun 10 17:40:41 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:05eece5a4cb62268780e5568a25dc6784f9b8c47 commit 05eece5a4cb62268780e5568a25dc6784f9b8c47 Author: Michael Meissner Date: Tue Jun 10 17:15:11 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:539aa4e4b24ae01bdf157cd10feb7dc9ce63c5ca commit 539aa4e4b24ae01bdf157cd10feb7dc9ce63c5ca Author: Michael Meissner Date: Tue Jun 10 17:22:37 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:fa43d1cdb8be87fe0f2e6259ce17d8803806115a commit fa43d1cdb8be87fe0f2e6259ce17d8803806115a Author: Michael Meissner Date: Tue Jun 10 16:55:47 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:a033ea0c0d3822b7b2f43b244d17ae3c04173e61 commit a033ea0c0d3822b7b2f43b244d17ae3c04173e61 Author: Michael Meissner Date: Tue Jun 10 18:19:39 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:a5bdfca7a952be8e1dd86f5e5a026197bf08fd98 commit a5bdfca7a952be8e1dd86f5e5a026197bf08fd98 Author: Michael Meissner Date: Tue Jun 10 16:34:00 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:2f541cae69f67d9e61b6bafa6f4847fa27fdaf05 commit 2f541cae69f67d9e61b6bafa6f4847fa27fdaf05 Author: Michael Meissner Date: Tue Jun 10 18:24:33 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:50059b8faffe92785770f269feca74119ddbd249 commit 50059b8faffe92785770f269feca74119ddbd249 Author: Michael Meissner Date: Tue Jun 10 16:41:51 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:1b6089173e851ffae80699d949666f4c27032e1c commit 1b6089173e851ffae80699d949666f4c27032e1c Author: Michael Meissner Date: Tue Jun 10 16:20:16 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:b144edb81dc7fac54df459d2a5dfbd36ef0daf51 commit b144edb81dc7fac54df459d2a5dfbd36ef0daf51 Author: Michael Meissner Date: Tue Jun 10 18:13:21 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:c58f75947d43a31a787e4028e15e37f058fa121c commit c58f75947d43a31a787e4028e15e37f058fa121c Author: Michael Meissner Date: Tue Jun 10 18:16:42 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:2b8a8f1a9e461de365f0de90374398833adb8b74 commit 2b8a8f1a9e461de365f0de90374398833adb8b74 Author: Michael Meissner Date: Tue Jun 10 17:55:21 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:8228e5b4ab9a58e16b692a4f4ca4fa83c688c222 commit 8228e5b4ab9a58e16b692a4f4ca4fa83c688c222 Author: Michael Meissner Date: Tue Jun 10 17:45:02 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:ae5fc7bc755592194e73535df4f28dddf58cf517 commit ae5fc7bc755592194e73535df4f28dddf58cf517 Author: Michael Meissner Date: Tue Jun 10 18:10:38 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:303ab25c03790bd8cc2be68240371e41e5e75c7f commit 303ab25c03790bd8cc2be68240371e41e5e75c7f Author: Michael Meissner Date: Tue Jun 10 17:36:30 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:2b9d7bfbad695f60f0dbc8afeead50fe309cc761 commit 2b9d7bfbad695f60f0dbc8afeead50fe309cc761 Author: Michael Meissner Date: Tue Jun 10 17:25:30 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:c29e8af614954a24935024b7662144e94a313b94 commit c29e8af614954a24935024b7662144e94a313b94 Author: Michael Meissner Date: Tue Jun 10 18:04:39 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:c5ffa5bd175214d557b2bec0ee3ea6bd64745ac7 commit c5ffa5bd175214d557b2bec0ee3ea6bd64745ac7 Author: Michael Meissner Date: Tue Jun 10 16:53:16 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:1eee925a0672077c5d0518f58b1723c2beea16f0 commit 1eee925a0672077c5d0518f58b1723c2beea16f0 Author: Michael Meissner Date: Tue Jun 10 17:58:15 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:f656cd986db4f0d02a93bde8ca178b566face611 commit f656cd986db4f0d02a93bde8ca178b566face611 Author: Michael Meissner Date: Tue Jun 10 16:44:55 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:41f7160530b5590d445c0eba8edc13349fca0fbf commit 41f7160530b5590d445c0eba8edc13349fca0fbf Author: Michael Meissner Date: Tue Jun 10 17:52:13 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:a55729c0c364eb53b14d70af25b13f20f88c6bbd commit a55729c0c364eb53b14d70af25b13f20f88c6bbd Author: Michael Meissner Date: Tue Jun 10 17:48:14 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:83297e5ec6c3b8713c10c628aa7acc2a7cfda2c3 commit 83297e5ec6c3b8713c10c628aa7acc2a7cfda2c3 Author: Michael Meissner Date: Tue Jun 10 16:26:51 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:dbc3e4ec82fcfcf17f12065b7b7e71cca3af9c19 commit dbc3e4ec82fcfcf17f12065b7b7e71cca3af9c19 Author: Michael Meissner Date: Tue Jun 10 17:34:06 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:20db16cfc7f50b4f218466526dff7a6d01c85cba commit 20db16cfc7f50b4f218466526dff7a6d01c85cba Author: Michael Meissner Date: Tue Jun 10 17:28:09 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:a59034f2a6084d924133668e58db1b2bba2e6a43 commit a59034f2a6084d924133668e58db1b2bba2e6a43 Author: Michael Meissner Date: Tue Jun 10 17:20:17 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:29fb0c6566c9ef1f149d1084dc2581c872649b12 commit 29fb0c6566c9ef1f149d1084dc2581c872649b12 Author: Michael Meissner Date: Tue Jun 10 17:17:48 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:0dfbbfadd4b128ca440e3b38c0abbb0a6f1bf35e commit 0dfbbfadd4b128ca440e3b38c0abbb0a6f1bf35e Author: Michael Meissner Date: Tue Jun 10 16:58:06 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:0d518163697d4fc03874268389223ad567abf13a commit 0d518163697d4fc03874268389223ad567abf13a Author: Michael Meissner Date: Tue Jun 10 16:47:39 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:9a5a4fedf0d84ea698e1e31304cf6a4d8652051c commit 9a5a4fedf0d84ea698e1e31304cf6a4d8652051c Author: Michael Meissner Date: Tue Jun 10 17:00:25 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:b3706b848edd2b31abe5ef2698392805303548d2 commit b3706b848edd2b31abe5ef2698392805303548d2 Author: Michael Meissner Date: Tue Jun 10 16:50:19 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:31416ca5a3c12ca137ce74887f2e6bcaed62e4ca commit 31416ca5a3c12ca137ce74887f2e6bcaed62e4ca Author: Michael Meissner Date: Tue Jun 10 16:39:17 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:5e246c3eea3303bbc3be494765009cc443eda276 commit 5e246c3eea3303bbc3be494765009cc443eda276 Author: Michael Meissner Date: Tue Jun 10 16:36:08 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:728f505faf021f60c6157433af58bf1c7499 commit 728f505faf021f60c6157433af58bf1c7499 Author: Michael Meissner Date: Tue Jun 10 16:23:42 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:8bfffbaaf94907d12c535486cd9d8a3a53a1aea9 commit 8bfffbaaf94907d12c535486cd9d8a3a53a1aea9 Author: Michael Meissner Date: Tue Jun 10 16:14:34 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:14010241a92479cbcf0bf6cc5a584065821c9173 commit 14010241a92479cbcf0bf6cc5a584065821c9173 Author: Michael Meissner Date: Tue Jun 10 16:17:16 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:4a0c4551f0f9df5a312141b8a5bff58645f5115f commit 4a0c4551f0f9df5a312141b8a5bff58645f5115f Author: Michael Meissner Date: Tue Jun 10 16:11:38 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:c25a0ce44f75ec67528a2d855ef5229abfe4cf6d commit c25a0ce44f75ec67528a2d855ef5229abfe4cf6d Author: Michael Meissner Date: Tue Jun 10 15:56:02 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:a75dd22985863e77b051d70f250e939214ba32dc commit a75dd22985863e77b051d70f250e939214ba32dc Author: Michael Meissner Date: Tue Jun 10 16:07:51 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:141ce9e514fba385685c8c46587719fc2ddf464e commit 141ce9e514fba385685c8c46587719fc2ddf464e Author: Michael Meissner Date: Tue Jun 10 16:05:20 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:6ee9c4088f72ad5a26d56e8e405ddfcea3aba769 commit 6ee9c4088f72ad5a26d56e8e405ddfcea3aba769 Author: Michael Meissner Date: Tue Jun 10 16:02:26 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:fd2acd0a00a7ce79e474e5cc55d071601c54d2db commit fd2acd0a00a7ce79e474e5cc55d071601c54d2db Author: Michael Meissner Date: Tue Jun 10 15:59:17 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc(refs/users/meissner/heads/work210-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:742340663eeb49c659420603e1d5a73579316004 commit 742340663eeb49c659420603e1d5a73579316004 Author: Michael Meissner Date: Tue Jun 10 15:45:21 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner

[gcc r16-1402] RISC-V: testsuite: fix an obvious build error

https://gcc.gnu.org/g:0005b1e577135bf0345447529d138f4d15618ec0 commit r16-1402-g0005b1e577135bf0345447529d138f4d15618ec0 Author: Vineet Gupta Date: Tue May 20 14:15:53 2025 -0700 RISC-V: testsuite: fix an obvious build error For a non-multilib build, I see following errors.

[gcc/devel/omp/gcc-15] ChangeLog.omp bump

Add gfx942, gfx950 and gfx9-4-generic. + * config/gcn/gcn-tables.opt: Regenerate. + 2025-06-06 Tobias Burnus Backported from master: diff --git a/gcc/DATESTAMP.omp b/gcc/DATESTAMP.omp index c6de4e349988..52988ae3b03d 100644 --- a/gcc/DATESTAMP.omp +++ b/gcc/DATESTAMP.omp @@ -1 +1 @@

[gcc/devel/omp/gcc-15] gcn: Add experimental MI300 (gfx942) support

https://gcc.gnu.org/g:5e75ec7168fd3ea5b7791ed67f25a29b44967fc3 commit 5e75ec7168fd3ea5b7791ed67f25a29b44967fc3 Author: Tobias Burnus Date: Tue Jun 10 15:12:47 2025 +0200 gcn: Add experimental MI300 (gfx942) support As gfx942 and gfx950 belong to gfx9-4-generic, the latter two are

[gcc/devel/omp/gcc-15] libgomp: Add OpenMP's omp_target_memset/omp_target_memset_async

https://gcc.gnu.org/g:7704131525574cd28bf3f779da1e1057c46a1f25 commit 7704131525574cd28bf3f779da1e1057c46a1f25 Author: Tobias Burnus Date: Mon Jun 2 17:43:57 2025 +0200 libgomp: Add OpenMP's omp_target_memset/omp_target_memset_async PR libgomp/120444 include/Chang

[gcc/devel/omp/gcc-15] Merge branch 'releases/gcc-15' into devel/omp/gcc-15

https://gcc.gnu.org/g:682e7678f3d2b5b974bf564deea7a405f0fd37bf commit 682e7678f3d2b5b974bf564deea7a405f0fd37bf Merge: f34abf47bf57 5327eef7b003 Author: Tobias Burnus Date: Tue Jun 10 21:56:49 2025 +0200 Merge branch 'releases/gcc-15' into devel/omp/gcc-15 Merge up to r15-9819-g532

[gcc/devel/omp/gcc-15] (33 commits) ChangeLog.omp bump

The branch 'devel/omp/gcc-15' was updated to point to: a6a5a2674c5c... ChangeLog.omp bump It previously pointed to: f34abf47bf57... ChangeLog.omp bump Diff: Summary of changes (added commits): --- a6a5a26... ChangeLog.omp bump 5e75ec7... gcn: Add experime

[gcc r13-9750] libstdc++: Fix incorrect links to archived SGI STL docs

https://gcc.gnu.org/g:d97de614f7a3729f7a841f48748d0b3bf746d0a2 commit r13-9750-gd97de614f7a3729f7a841f48748d0b3bf746d0a2 Author: Jonathan Wakely Date: Tue May 20 10:53:41 2025 +0100 libstdc++: Fix incorrect links to archived SGI STL docs In r8--g25949ee33201f2 I updated some U

[gcc r14-11834] libstdc++: Fix incorrect links to archived SGI STL docs

https://gcc.gnu.org/g:e1cbf566970f02a7ac110df58c412be11604b278 commit r14-11834-ge1cbf566970f02a7ac110df58c412be11604b278 Author: Jonathan Wakely Date: Tue May 20 10:53:41 2025 +0100 libstdc++: Fix incorrect links to archived SGI STL docs In r8--g25949ee33201f2 I updated some

[gcc r15-9819] libstdc++: Make system_clock::to_time_t always_inline [PR99832]

https://gcc.gnu.org/g:5327eef7b003f66b90841af77c5095eebfa53938 commit r15-9819-g5327eef7b003f66b90841af77c5095eebfa53938 Author: Jonathan Wakely Date: Wed May 28 15:19:18 2025 +0100 libstdc++: Make system_clock::to_time_t always_inline [PR99832] For some 32-bit targets Glibc suppo

[gcc r15-9818] libstdc++: Fix std::format thousands separators when sign present [PR120548]

https://gcc.gnu.org/g:974d59aec69b35bd4f7f8464a3bcfc55e849ed1f commit r15-9818-g974d59aec69b35bd4f7f8464a3bcfc55e849ed1f Author: Jonathan Wakely Date: Wed Jun 4 18:22:28 2025 +0100 libstdc++: Fix std::format thousands separators when sign present [PR120548] The leading sign charac

[gcc r16-1401] More API for IPA profile manipulation

https://gcc.gnu.org/g:e416c8097fc87513e05c2d104c63488f733758c0 commit r16-1401-ge416c8097fc87513e05c2d104c63488f733758c0 Author: Jan Hubicka Date: Tue Jun 10 21:32:40 2025 +0200 More API for IPA profile manipulation This patch attempts to make IPA profile manipulation easier. It

[gcc r16-1398] expand, ranger: Use ranger during expansion [PR120434]

https://gcc.gnu.org/g:8154fc95f097a146f9c80edcaafb2baff73065b5 commit r16-1398-g8154fc95f097a146f9c80edcaafb2baff73065b5 Author: Jakub Jelinek Date: Tue Jun 10 20:04:52 2025 +0200 expand, ranger: Use ranger during expansion [PR120434] As the following testcase shows, during expans

[gcc r16-1399] i386: Handle ZERO_EXTEND like SIGN_EXTEND in bsr patterns [PR120434]

https://gcc.gnu.org/g:54da199f28da07166a44eae7d53acb9e3abe1306 commit r16-1399-g54da199f28da07166a44eae7d53acb9e3abe1306 Author: Jakub Jelinek Date: Tue Jun 10 20:07:06 2025 +0200 i386: Handle ZERO_EXTEND like SIGN_EXTEND in bsr patterns [PR120434] The just posted second PR120434

[gcc r16-1400] expand: Use less costly from sign and zero extensions for values where value range says they don't h

https://gcc.gnu.org/g:2e4688a7202d73baeb4de18ca4591e6b0985f4a4 commit r16-1400-g2e4688a7202d73baeb4de18ca4591e6b0985f4a4 Author: Jakub Jelinek Date: Tue Jun 10 20:06:14 2025 +0200 expand: Use less costly from sign and zero extensions for values where value range says they don't have MSB s

[gcc r16-1397] Check if constant is a member before returning it.

https://gcc.gnu.org/g:6a4da727020b24b02b062f4bff718c9a5699629c commit r16-1397-g6a4da727020b24b02b062f4bff718c9a5699629c Author: Andrew MacLeod Date: Tue Jun 10 12:11:18 2025 -0400 Check if constant is a member before returning it. set_range_from_bitmask checks the new bitmask, an

[gcc r16-1396] cobol: Variety of small changes in answer to cppcheck diagnostics.

https://gcc.gnu.org/g:70c3dd9a81cdefcaf24a66ec0c1ceddf5d3984dd commit r16-1396-g70c3dd9a81cdefcaf24a66ec0c1ceddf5d3984dd Author: James K. Lowden Date: Tue Jun 10 10:34:28 2025 -0400 cobol: Variety of small changes in answer to cppcheck diagnostics. Remove non-ASCII input and blank

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: frm/mode-switch: remove TARGET_MODE_CONFLUENCE

https://gcc.gnu.org/g:2b418bd916ce1d993c66a4658e4e7804d9256c45 commit 2b418bd916ce1d993c66a4658e4e7804d9256c45 Author: Vineet Gupta Date: Sun Jun 8 14:44:29 2025 -0700 RISC-V: frm/mode-switch: remove TARGET_MODE_CONFLUENCE This is effectively reverting e5d1f538bb7d "(RISC-V: A

[gcc r16-1368] ada: Fix Value_Decimal to raise Constraint_Error on boundary values

https://gcc.gnu.org/g:5db0a4c3c736a2164774344c3c1b4c3b34e59a75 commit r16-1368-g5db0a4c3c736a2164774344c3c1b4c3b34e59a75 Author: Eric Botcazou Date: Tue Mar 18 22:44:15 2025 +0100 ada: Fix Value_Decimal to raise Constraint_Error on boundary values Even though the issue is not user

[gcc r12-11132] tree-sra: Do not create stores into const aggregates (PR111873)

https://gcc.gnu.org/g:16d6a270b11a00d30966d42d9bc086e5873b5632 commit r12-11132-g16d6a270b11a00d30966d42d9bc086e5873b5632 Author: Martin Jambor Date: Wed May 14 12:08:24 2025 +0200 tree-sra: Do not create stores into const aggregates (PR111873) This patch fixes (hopefully the) one

[gcc r16-1395] libstdc++: Make __max_size_type and __max_diff_type structural

https://gcc.gnu.org/g:1f402fe23b0d4cf024688a729f4c86c37144d54a commit r16-1395-g1f402fe23b0d4cf024688a729f4c86c37144d54a Author: Patrick Palka Date: Tue Jun 10 10:15:25 2025 -0400 libstdc++: Make __max_size_type and __max_diff_type structural This patch makes these integer-class t

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [to-be-committed][RISC-V] Handle 32bit operands in condition for conditional moves

https://gcc.gnu.org/g:38f54b2523adf37f545c92b5dac751a421047731 commit 38f54b2523adf37f545c92b5dac751a421047731 Author: Jeff Law Date: Sat Jun 7 07:48:46 2025 -0600 [to-be-committed][RISC-V] Handle 32bit operands in condition for conditional moves So here's the next chunk of condi

[gcc r16-1394] libstdc++: Implement LWG3528 make_from_tuple can perform (the equivalent of) a C-style cast

https://gcc.gnu.org/g:73edc003c0a8f0badc7027e6deefd3a573300b03 commit r16-1394-g73edc003c0a8f0badc7027e6deefd3a573300b03 Author: Yihan Wang Date: Mon Jun 9 11:07:51 2025 +0100 libstdc++: Implement LWG3528 make_from_tuple can perform (the equivalent of) a C-style cast Implement LW

[gcc r16-1393] gcn: Add experimental MI300 (gfx942) support

https://gcc.gnu.org/g:37b454b7e171bd8a792cbe4c57ea0f9702afa22d commit r16-1393-g37b454b7e171bd8a792cbe4c57ea0f9702afa22d Author: Tobias Burnus Date: Tue Jun 10 15:12:47 2025 +0200 gcn: Add experimental MI300 (gfx942) support As gfx942 and gfx950 belong to gfx9-4-generic, the latte

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: frm/mode-switch: Reduce FRM restores on DYN transition [PR119164]

https://gcc.gnu.org/g:e9f1bc45ff3500d57d3ad5d7372b5092f2c121fc commit e9f1bc45ff3500d57d3ad5d7372b5092f2c121fc Author: Vineet Gupta Date: Sun Jun 8 14:55:01 2025 -0700 RISC-V: frm/mode-switch: Reduce FRM restores on DYN transition [PR119164] FRM mode switching state machine has DY

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve signed division by 2^n

https://gcc.gnu.org/g:5dd9e41c33464836a07c7cd93111a439993e26d8 commit 5dd9e41c33464836a07c7cd93111a439993e26d8 Author: Jeff Law Date: Thu Jun 5 16:58:45 2025 -0600 [RISC-V] Improve signed division by 2^n So another class of cases where we can do better than a zicond sequence. Li

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vdivu.vv combine case 1 with GR2VR cost 0, 1 and 2

https://gcc.gnu.org/g:f47952a91134c4c78e0eeae2f7b455030eeb8ad8 commit f47952a91134c4c78e0eeae2f7b455030eeb8ad8 Author: Pan Li Date: Fri Jun 6 09:51:10 2025 +0800 RISC-V: Add test for vec_duplicate + vdivu.vv combine case 1 with GR2VR cost 0, 1 and 2 Add asm dump check test for ve

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: frm/mode-switch: remove dubious frm edge insertion before call_insn

https://gcc.gnu.org/g:807bdaaea37a400347258a8be14f9c7e35378195 commit 807bdaaea37a400347258a8be14f9c7e35378195 Author: Vineet Gupta Date: Sun Jun 8 14:54:37 2025 -0700 RISC-V: frm/mode-switch: remove dubious frm edge insertion before call_insn This showed up when debugging the tes

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Enable more if-conversion on RISC-V

https://gcc.gnu.org/g:65b255f2b11679630d29e4d77557e97caf7c2653 commit 65b255f2b11679630d29e4d77557e97caf7c2653 Author: Jeff Law Date: Mon Jun 9 06:55:21 2025 -0600 [RISC-V] Enable more if-conversion on RISC-V Another czero related adjustment. This time in costing of conditional m

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix ICE due to splitter emitting constant loads directly

https://gcc.gnu.org/g:4c63893d1c1a92052016cfdb18854f9712bdf949 commit 4c63893d1c1a92052016cfdb18854f9712bdf949 Author: Jeff Law Date: Tue Jun 10 06:38:52 2025 -0600 [RISC-V] Fix ICE due to splitter emitting constant loads directly This is a fix for a bug found internally in Ventan

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vremu.vv to vremu.vx on GR2VR cost

https://gcc.gnu.org/g:1af3a0a0a9fbd5c74b1f623cdb50ace115ee3c97 commit 1af3a0a0a9fbd5c74b1f623cdb50ace115ee3c97 Author: Pan Li Date: Mon Jun 9 16:24:34 2025 +0800 RISC-V: Combine vec_duplicate + vremu.vv to vremu.vx on GR2VR cost This patch would like to combine the vec_duplicate +

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for vremu.vx combine

https://gcc.gnu.org/g:2e3b57db30a7b75eebc0e58470ada83c3e68c219 commit 2e3b57db30a7b75eebc0e58470ada83c3e68c219 Author: Pan Li Date: Mon Jun 9 16:28:50 2025 +0800 RISC-V: Reconcile the existing test for vremu.vx combine Some existing vrem related test need some adjust for the a

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vremu.vv combine case 0 with GR2VR cost 0, 2 and 15

https://gcc.gnu.org/g:62503999c8624c0878cd1a955ecb29680d524d12 commit 62503999c8624c0878cd1a955ecb29680d524d12 Author: Pan Li Date: Mon Jun 9 16:33:52 2025 +0800 RISC-V: Add test for vec_duplicate + vremu.vv combine case 0 with GR2VR cost 0, 2 and 15 Add asm dump check test for v

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vrem.vv to vrem.vx on GR2VR cost

https://gcc.gnu.org/g:852bbabde714134af1940772450e059d26bc5b65 commit 852bbabde714134af1940772450e059d26bc5b65 Author: Pan Li Date: Sun Jun 8 16:48:33 2025 +0800 RISC-V: Combine vec_duplicate + vrem.vv to vrem.vx on GR2VR cost This patch would like to combine the vec_duplicate + v

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Regen riscv-ext.texi [NFC]

https://gcc.gnu.org/g:e3ada8eb1b917128350fc45c00092b1687506e41 commit e3ada8eb1b917128350fc45c00092b1687506e41 Author: Kito Cheng Date: Tue Jun 10 10:32:37 2025 +0800 RISC-V: Regen riscv-ext.texi [NFC] Regenerates the `riscv-ext.texi` file in the GCC documentation. gcc/Ch

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrem.vv combine case 1 with GR2VR cost 0, 1 and 2

https://gcc.gnu.org/g:725444b6f84ccd8bf5c6864dbf29582ccead900f commit 725444b6f84ccd8bf5c6864dbf29582ccead900f Author: Pan Li Date: Sun Jun 8 16:55:34 2025 +0800 RISC-V: Add test for vec_duplicate + vrem.vv combine case 1 with GR2VR cost 0, 1 and 2 Add asm dump check test for vec

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vremu.vv combine case 1 with GR2VR cost 0, 1 and 2

https://gcc.gnu.org/g:64b8deea76e40d16bbcb66ed7204f72cfe4d9669 commit 64b8deea76e40d16bbcb66ed7204f72cfe4d9669 Author: Pan Li Date: Mon Jun 9 16:35:47 2025 +0800 RISC-V: Add test for vec_duplicate + vremu.vv combine case 1 with GR2VR cost 0, 1 and 2 Add asm dump check test for ve

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrem.vv combine case 0 with GR2VR cost 0, 2 and 15

https://gcc.gnu.org/g:a4bcae5ad4962e1c6f6337ae93e75aeddecc922e commit a4bcae5ad4962e1c6f6337ae93e75aeddecc922e Author: Pan Li Date: Sun Jun 8 16:53:05 2025 +0800 RISC-V: Add test for vec_duplicate + vrem.vv combine case 0 with GR2VR cost 0, 2 and 15 Add asm dump check test for ve

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for vrem.vx combine

https://gcc.gnu.org/g:b48ccf650b32ff2af612029da693b83c23c490bc commit b48ccf650b32ff2af612029da693b83c23c490bc Author: Pan Li Date: Sun Jun 8 16:50:52 2025 +0800 RISC-V: Reconcile the existing test for vrem.vx combine Some existing vrem related test need some adjust for the as

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: frm/mode-switch: robustify call_insn backtracking [PR120203]

https://gcc.gnu.org/g:3458870cad987cf3e3bf5add23399f1ca285 commit 3458870cad987cf3e3bf5add23399f1ca285 Author: Vineet Gupta Date: Sun Jun 8 14:55:11 2025 -0700 RISC-V: frm/mode-switch: robustify call_insn backtracking [PR120203] As described in prior patches of this series

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Handle 32bit operands in condition for conditional moves

https://gcc.gnu.org/g:e47d4027be18683eb090b3601e50c854a6c60c5b commit e47d4027be18683eb090b3601e50c854a6c60c5b Author: Shreya Munnangi Date: Sun Jun 8 08:42:53 2025 -0600 [RISC-V] Handle 32bit operands in condition for conditional moves So here's the next chunk of conditional move

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for vdivu.vx combine

https://gcc.gnu.org/g:f633e6fe9a173e001890629d659e2ecd68be2fea commit f633e6fe9a173e001890629d659e2ecd68be2fea Author: Pan Li Date: Fri Jun 6 10:03:50 2025 +0800 RISC-V: Reconcile the existing test for vdivu.vx combine Some existing vdiv related test need some adjust for the a

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vidvu.vv to vdivu.vx on GR2VR cost

https://gcc.gnu.org/g:7e0e5701d71b649ed911a5c236af8f8fd714bbc4 commit 7e0e5701d71b649ed911a5c236af8f8fd714bbc4 Author: Pan Li Date: Fri Jun 6 09:33:21 2025 +0800 RISC-V: Combine vec_duplicate + vidvu.vv to vdivu.vx on GR2VR cost This patch would like to combine the vec_duplicate +

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vdivu.vv combine case 0 with GR2VR cost 0, 2 and 15

https://gcc.gnu.org/g:f34bc1ecce268061e8ad8ef7248203a50ecd0036 commit f34bc1ecce268061e8ad8ef7248203a50ecd0036 Author: Pan Li Date: Fri Jun 6 09:49:56 2025 +0800 RISC-V: Add test for vec_duplicate + vdivu.vv combine case 0 with GR2VR cost 0, 2 and 15 Add asm dump check test for v

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support -mcpu for XiangShan Kunminghu cpu.

https://gcc.gnu.org/g:523071dcf5e5abecc50f96b24ad3d35dadbbe7cd commit 523071dcf5e5abecc50f96b24ad3d35dadbbe7cd Author: Jiawei Date: Wed Jun 4 17:56:49 2025 +0800 RISC-V: Support -mcpu for XiangShan Kunminghu cpu. This patch adds support for the XiangShan Kunminghu CPU in GCC, allo

[gcc r16-1392] [RISC-V] Fix ICE due to splitter emitting constant loads directly

https://gcc.gnu.org/g:b93d8873cda88f0892c7782b274904fa8d3751fb commit r16-1392-gb93d8873cda88f0892c7782b274904fa8d3751fb Author: Jeff Law Date: Tue Jun 10 06:38:52 2025 -0600 [RISC-V] Fix ICE due to splitter emitting constant loads directly This is a fix for a bug found internally

[gcc r16-1391] libfortran: Add script to regenerate source files

https://gcc.gnu.org/g:d2f82b57c819eea607c909d28f3687316ff17611 commit r16-1391-gd2f82b57c819eea607c909d28f3687316ff17611 Author: Francois-Xavier Coudert Date: Mon Jun 9 17:19:04 2025 +0200 libfortran: Add script to regenerate source files Move the regeneration of libgfortran sourc

[gcc r15-9817] vectorizer: Fix riscv build [PR120042]

https://gcc.gnu.org/g:615a92a1e6a90bcb012deb216cd141266b0954a0 commit r15-9817-g615a92a1e6a90bcb012deb216cd141266b0954a0 Author: Andrew Pinski Date: Wed Apr 30 15:10:29 2025 -0700 vectorizer: Fix riscv build [PR120042] r15-9859-ga6cfde60d8c added a call to dominated_by_p to tree-v

[gcc r15-9816] ada: Error on subtype with static predicate used in case_expression

https://gcc.gnu.org/g:a35f642d231baa62d6b28e5e5aaf3cc30425552c commit r15-9816-ga35f642d231baa62d6b28e5e5aaf3cc30425552c Author: Gary Dismukes Date: Sat Mar 22 00:01:52 2025 + ada: Error on subtype with static predicate used in case_expression The compiler improperly flags an

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