https://gcc.gnu.org/g:b144edb81dc7fac54df459d2a5dfbd36ef0daf51
commit b144edb81dc7fac54df459d2a5dfbd36ef0daf51 Author: Michael Meissner <meiss...@linux.ibm.com> Date: Tue Jun 10 18:13:21 2025 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations 2025-06-10 Michael Meissner <meiss...@linux.ibm.com> gcc/ PR target/117251 * config/rs6000/fusion.md: Regenerate. * config/rs6000/genfusion.pl (gen_logical_addsubf): Add support to generate vector xor => nand fusion if XXEVAL is supported. Diff: --- gcc/config/rs6000/fusion.md | 15 +++++++++------ gcc/config/rs6000/genfusion.pl | 1 + 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md index 39b586918c17..e0f9ac17659a 100644 --- a/gcc/config/rs6000/fusion.md +++ b/gcc/config/rs6000/fusion.md @@ -2477,20 +2477,23 @@ ;; logical-logical fusion pattern generated by gen_logical_addsubf ;; vector vxor -> vnand (define_insn "*fuse_vxor_vnand" - [(set (match_operand:VM 3 "altivec_register_operand" "=&0,&1,&v,v") - (ior:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v") - (match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))) - (not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))) - (clobber (match_scratch:VM 4 "=X,X,X,&v"))] + [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v") + (ior:VM (not:VM (xor:VM (match_operand:VM 0 "vector_fusion_operand" "v,v,v,wa,v") + (match_operand:VM 1 "vector_fusion_operand" "v,v,v,wa,v"))) + (not:VM (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v")))) + (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))] "(TARGET_P10_FUSION)" "@ vxor %3,%1,%0\;vnand %3,%3,%2 vxor %3,%1,%0\;vnand %3,%3,%2 vxor %3,%1,%0\;vnand %3,%3,%2 + xxeval %x3,%x2,%x1,%x0,249 vxor %4,%1,%0\;vnand %3,%4,%2" [(set_attr "type" "fused_vector") (set_attr "cost" "6") - (set_attr "length" "8")]) + (set_attr "length" "8") + (set_attr "prefixed" "*,*,*,yes,*") + (set_attr "isa" "*,*,*,xxeval,*")]) ;; logical-logical fusion pattern generated by gen_logical_addsubf ;; vector vand -> vnor diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl index 86bca81286ca..5d22a0732df6 100755 --- a/gcc/config/rs6000/genfusion.pl +++ b/gcc/config/rs6000/genfusion.pl @@ -256,6 +256,7 @@ sub gen_logical_addsubf "veqv_vnand" => 246, "vnor_vnand" => 247, "vor_vnand" => 248, + "vxor_vnand" => 249, ); KIND: foreach $kind ('scalar','vector') {