https://gcc.gnu.org/g:50059b8faffe92785770f269feca74119ddbd249
commit 50059b8faffe92785770f269feca74119ddbd249
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Tue Jun 10 16:41:51 2025 -0400
PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations
2025-06-10 Michael Meissner <meiss...@linux.ibm.com>
gcc/
PR target/117251
* config/rs6000/fusion.md: Regenerate.
* config/rs6000/genfusion.pl (gen_logical_addsubf): Add support to
generate vector orc => eqv fusion if XXEVAL is supported.
Diff:
---
gcc/config/rs6000/fusion.md | 15 +++++++++------
gcc/config/rs6000/genfusion.pl | 1 +
2 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index f45e65f0217c..f84d0aee5d79 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -2294,20 +2294,23 @@
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vorc -> veqv
(define_insn "*fuse_vorc_veqv"
- [(set (match_operand:VM 3 "altivec_register_operand" "=&0,&1,&v,v")
- (not:VM (xor:VM (ior:VM (not:VM (match_operand:VM 0
"altivec_register_operand" "v,v,v,v"))
- (match_operand:VM 1 "altivec_register_operand"
"v,v,v,v"))
- (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
+ [(set (match_operand:VM 3 "vector_fusion_operand" "=&0,&1,&v,wa,v")
+ (not:VM (xor:VM (ior:VM (not:VM (match_operand:VM 0
"vector_fusion_operand" "v,v,v,wa,v"))
+ (match_operand:VM 1 "vector_fusion_operand"
"v,v,v,wa,v"))
+ (match_operand:VM 2 "vector_fusion_operand" "v,v,v,wa,v"))))
+ (clobber (match_scratch:VM 4 "=X,X,X,X,&v"))]
"(TARGET_P10_FUSION)"
"@
vorc %3,%1,%0\;veqv %3,%3,%2
vorc %3,%1,%0\;veqv %3,%3,%2
vorc %3,%1,%0\;veqv %3,%3,%2
+ xxeval %x3,%x2,%x1,%x0,75
vorc %4,%1,%0\;veqv %3,%4,%2"
[(set_attr "type" "fused_vector")
(set_attr "cost" "6")
- (set_attr "length" "8")])
+ (set_attr "length" "8")
+ (set_attr "prefixed" "*,*,*,yes,*")
+ (set_attr "isa" "*,*,*,xxeval,*")])
;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vxor -> veqv
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 720e8d440c2d..8ba1aa081f75 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -230,6 +230,7 @@ sub gen_logical_addsubf
"vandc_vxor" => 45,
"vandc_vor" => 47,
"vorc_vnor" => 64,
+ "vorc_veqv" => 75,
);
KIND: foreach $kind ('scalar','vector') {
