On Sat, Feb 09, 2002 at 05:03:31AM +, Keith Whitwell wrote:
| ... opengl doesn't require that we get exactly the same results in these
| two cases - certainly it's desirable, but the specification specifically
| allows these types of variances.
Yes. This subject came up on opengl-gamedev
Andrew James Richardson wrote:
>
> Hello there,
>
> I've been avidly looking at the DRI web site on the status page to see if
> there is any mention of the main CVS trunk code being Mesa 4.x yet. For me
> this is quite important as I have patches to Mesa 4.x for SMP
> vertex/light/tex trans th
[EMAIL PROTECTED] wrote:
>
> Bugs item #514749, was opened at 2002-02-08 02:11
> You can respond by visiting:
> http://sourceforge.net/tracker/?func=detail&atid=100387&aid=514749&group_id=387
>
> Category: MGA OpenGL
> Group: Rendering Error
> Status: Open
> Resolution: None
> Priority: 5
> Subm
[EMAIL PROTECTED] wrote:
>
> Bugs item #514743, was opened at 2002-02-08 01:57
> You can respond by visiting:
> http://sourceforge.net/tracker/?func=detail&atid=100387&aid=514743&group_id=387
>
> Category: MGA X Server
> Group: X Server Hang/Core Dump
> Status: Open
> Resolution: None
> Priority
Michael wrote:
>
> Ok, I've found a couple of problems going through the glut demos but I'm
> a bit stuck which direction to move to fix them and thought someone
> brighter might give me a pointer.
>
> Both problems have similar symptoms. The example here is underwater.c.
>
> Scenario 1. vertic
[EMAIL PROTECTED] wrote:
>
> Bugs item #514084, was opened at 2002-02-06 18:48
> You can respond by visiting:
> http://sourceforge.net/tracker/?func=detail&atid=100387&aid=514084&group_id=387
>
> Category: ATI OpenGL
> Group: Rendering Error
> Status: Open
> Resolution: None
> Priority: 5
> Subm
On Fri, 8 Feb 2002, Ian Romanick wrote:
> > > > The problem is that Mesa 3.4 only supported two texture units (there were
> > > > some bitfields that didn't have room for more bits). In Mesa 3.5 and
> > > > later the limit is eight. It shouldn't be hard to enable the third unit
> > > > on the
Hi Frank,
On 2002.02.08 22:04 Frank C . Earl wrote:
> On Thursday 07 February 2002 12:37 pm, Jose Fonseca wrote:
>
> > Their glossary (http://utah-glx.sourceforge.net/faq.html#AEN364) gives
> > the definition of PIO, DMA and Pseudo DMA.
>
> PsuedoDMA is pushing the command data in a DMA-able fo
Hello there,
I've been avidly looking at the DRI web site on the status page to see if
there is any mention of the main CVS trunk code being Mesa 4.x yet. For me
this is quite important as I have patches to Mesa 4.x for SMP
vertex/light/tex trans that I wrote ~6 months ago and have been dyin
> > > The problem is that Mesa 3.4 only supported two texture units (there were
> > > some bitfields that didn't have room for more bits). In Mesa 3.5 and
> > > later the limit is eight. It shouldn't be hard to enable the third unit
> > > on the mesa-4-0 branch.
Just to forewarn everyone, I'd l
Vladimir Dergachev wrote:
>
> On Fri, 8 Feb 2002, Brian Paul wrote:
>
> > Vladimir Dergachev wrote:
> > >
> > > Would anyone know what was wrong with support for Radeon third texture
> > > unit ?
> >
> > The problem is that Mesa 3.4 only supported two texture units (there were
> > some bitfields
On Friday 08 February 2002 11:03 am, Jose Fonseca wrote:
> Keith, is pseudo DMA a hardware feature of Matrox cards or just a
> software hack for debugging purposes?
I'm not Keith, but I'll venture an answer. It's a software hack that was in
the Utah-GLX drivers for the G200/G400 and RagePRO (a
On Thursday 07 February 2002 12:37 pm, Jose Fonseca wrote:
> Their glossary (http://utah-glx.sourceforge.net/faq.html#AEN364) gives
> the definition of PIO, DMA and Pseudo DMA.
PsuedoDMA is pushing the command data in a DMA-able format to an engine that
issues PIO commands one-by-one. It's act
Ok, I've found a couple of problems going through the glut demos but I'm
a bit stuck which direction to move to fix them and thought someone
brighter might give me a pointer.
Both problems have similar symptoms. The example here is underwater.c.
Scenario 1. vertices are rendered in 2 passes.
P
>From what I understood from Alexander and Keith replies, DMA allows not
only to copy raw data (e.g., textures, z-buffers, vertexs) from the
system memory to the card's memory but also allows to automate the
card's registers programming in a way which is different of the PIO or
MMIO modes. Am I ri
> > > Would anyone know what was wrong with support for Radeon
> third texture
> > > unit ?
> >
> > The problem is that Mesa 3.4 only supported two texture
> units (there were
> > some bitfields that didn't have room for more bits). In
> Mesa 3.5 and
> > later the limit is eight. It shouldn't
On Fri, 8 Feb 2002, Brian Paul wrote:
> Vladimir Dergachev wrote:
> >
> > Would anyone know what was wrong with support for Radeon third texture
> > unit ?
>
> The problem is that Mesa 3.4 only supported two texture units (there were
> some bitfields that didn't have room for more bits). In Me
On Fri, 2002-02-08 at 14:54, bimshop wrote:
> Hi All,
>
> Just started messing around with all this dri stuff yesterday. I was able
> to do a full compile, but have yet been unable to get setup properly. I
> will keep messing with it, as I'm new to X and dri I expect a hard learning
> curve (b
Vladimir Dergachev wrote:
>
> Would anyone know what was wrong with support for Radeon third texture
> unit ?
The problem is that Mesa 3.4 only supported two texture units (there were
some bitfields that didn't have room for more bits). In Mesa 3.5 and
later the limit is eight. It shouldn't be
Hi All,
Just started messing around with all this dri stuff yesterday. I was able
to do a full compile, but have yet been unable to get setup properly. I
will keep messing with it, as I'm new to X and dri I expect a hard learning
curve (but fun ofcourse...nobody put a gun to my head.).
My que
Would anyone know what was wrong with support for Radeon third texture
unit ?
thanks
Vladimir Dergachev
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On Fri, 2002-02-08 at 10:52, Kamil Toman wrote:
> Feb 8 02:20:02 whale kernel: [drm:radeon_freelist_get] *ERROR*
> returning NULL!
I think this is only a symptom of the chip locking up, causing the DRM
to run out of buffers. I wish the problems which actually cause these
were logged. ;(
--
E
Grepping through logs I also found this interesting sequence:
Feb 8 02:20:02 whale kernel: [drm:radeon_freelist_get] *ERROR*
returning NULL!
Feb 8 02:20:33 whale last message repeated 1667 times
Feb 8 02:20:58 whale last message repeated 1370 times
Feb 8 02:20:58 whale kernel: SysRq : HELP :
On Pá, 2002-02-08 at 03:41, Vladimir Dergachev wrote:
>
> I am seeing this too.. Interestingly enough Quake3 locks up withing a
> first minute of playing with no visible messages. I am often able to
> telnet it. However, Descent3 (started without multitexturing) is rock
> solid.
>
> Perhaps this
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