https://sourceware.org/bugzilla/show_bug.cgi?id=22791
--- Comment #14 from H.J. Lu <hjl.tools at gmail dot com> --- (In reply to Cary Coutant from comment #13) > (In reply to H.J. Lu from comment #12) > > Since there is no need to prepare for PLT branch on x86-64, we can treat > > PC32 relocation with branch as PLT32 relocation. I posted a patch for ld: > > > > https://sourceware.org/ml/binutils/2018-02/msg00065.html > > What do you mean by "prepare for PLT branch"? On i386, there are 2 types of PLTs, PIC and non-PIC. PIE and shared objects must use PIC PLT. To use PIC PLT, you need to load _GLOBAL_OFFSET_TABLE_ into EBX first. There is no need for that on x86-64. > It looks like your patch examines the opcode(s) preceding the relocated > value to determine whether it's a branch or not. How is this safe? It seems > fragile to me. In addition, it requires the linker to read section contents > while scanning relocations, which is not normally necessary, and will slow > the linker down significantly -- we normally don't need to read most > sections' contents until it's time to apply relocations. > > If your argument is that you can always treat PC32 relocations on branches > as if they were PLT32 relocations, why not just have the compiler emit PLT32 > relocations in the first place? Yes, this patch does that: https://sourceware.org/ml/binutils/2018-02/msg00074.html -- You are receiving this mail because: You are on the CC list for the bug. _______________________________________________ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
