@@ -0,0 +1,336 @@
+// REQUIRES: arm-emulator
+
+// DEFINE: %{compile} = mlir-opt %s \
+// DEFINE: --convert-vector-to-scf --convert-scf-to-cf
--convert-vector-to-llvm='enable-arm-neon enable-arm-i8mm' \
+// DEFINE: --expand-strided-metadata --convert-to-llvm
--finalize-memr
https://github.com/aengelke updated
https://github.com/llvm/llvm-project/pull/142584
>From 4cbc231699c11444cff73ff28b88dc0f3835c752 Mon Sep 17 00:00:00 2001
From: Alexis Engelke
Date: Wed, 4 Jun 2025 09:21:02 +
Subject: [PATCH 1/2] Move one check to beginning of function
Created using spr
https://github.com/nigelp-xmos approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/144976
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https://github.com/banach-space approved this pull request.
Thanks, it's great to see more tests for `i8mm`. The documentation makes it
relatively easy to follow (despite this being fairly complex!) - that's much
appreciated!
Overall LGTM, but I have one request. Could you unify the input data
https://github.com/aengelke updated
https://github.com/llvm/llvm-project/pull/142584
>From 4cbc231699c11444cff73ff28b88dc0f3835c752 Mon Sep 17 00:00:00 2001
From: Alexis Engelke
Date: Wed, 4 Jun 2025 09:21:02 +
Subject: [PATCH 1/2] Move one check to beginning of function
Created using spr
@@ -0,0 +1,262 @@
+// RUN: mlir-opt --arm-sve-legalize-vector-storage --split-input-file %s |
FileCheck %s
+
+// -
+
+// CHECK-LABEL: @test_base_case
+// CHECK-SAME: %[[I:arg0]]: index, %[[J:arg1]]: index, %[[M:arg2]]:
+// CHECK: %[[COLLAPSE:.+]]
@@ -0,0 +1,262 @@
+// RUN: mlir-opt --arm-sve-legalize-vector-storage --split-input-file %s |
FileCheck %s
+
+// -
+
+// CHECK-LABEL: @test_base_case
+// CHECK-SAME: %[[I:arg0]]: index, %[[J:arg1]]: index, %[[M:arg2]]:
+// CHECK: %[[COLLAPSE:.+]]
@@ -298,16 +298,139 @@ struct LegalizeSVEMaskLoadConversion : public
OpRewritePattern {
}
};
+/// Transforms a `transfer_read` operation so it reads vector of a type that
+/// can be mapped to an LLVM type. This is done by collapsing trailing
+/// dimensions so we obtain a
@@ -298,16 +298,139 @@ struct LegalizeSVEMaskLoadConversion : public
OpRewritePattern {
}
};
+/// Transforms a `transfer_read` operation so it reads vector of a type that
+/// can be mapped to an LLVM type. This is done by collapsing trailing
+/// dimensions so we obtain a
@@ -0,0 +1,262 @@
+// RUN: mlir-opt --arm-sve-legalize-vector-storage --split-input-file %s |
FileCheck %s
+
+// -
+
+// CHECK-LABEL: @test_base_case
+// CHECK-SAME: %[[I:arg0]]: index, %[[J:arg1]]: index, %[[M:arg2]]:
+// CHECK: %[[COLLAPSE:.+]]
@@ -298,16 +298,139 @@ struct LegalizeSVEMaskLoadConversion : public
OpRewritePattern {
}
};
+/// Transforms a `transfer_read` operation so it reads vector of a type that
+/// can be mapped to an LLVM type. This is done by collapsing trailing
+/// dimensions so we obtain a
https://github.com/momchil-velikov updated
https://github.com/llvm/llvm-project/pull/143146
>From 198ed819841270aeec7159fe2a9a4c092b8d8af7 Mon Sep 17 00:00:00 2001
From: Momchil Velikov
Date: Wed, 14 May 2025 09:03:49 +
Subject: [PATCH 1/4] [MLIR] Legalize certain `vector.transfer_read` ops
https://github.com/Pierre-vh approved this pull request.
https://github.com/llvm/llvm-project/pull/142789
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@@ -137,7 +138,109 @@ class AMDGPURegBankLegalizeCombiner {
return {MatchMI, MatchMI->getOperand(1).getReg()};
}
+ std::pair tryMatchRALFromUnmerge(Register Src) {
+MachineInstr *ReadAnyLane = MRI.getVRegDef(Src);
+if (ReadAnyLane->getOpcode() == AMDGPU::G_AMDGP
https://github.com/aengelke created
https://github.com/llvm/llvm-project/pull/145009
Similar to the existing implementations for X86 and PPC, support
symbolizing branch targets for AArch64. Do not omit the address for ADRP
as the target is typically not at an intended location.
__
https://github.com/arsenm edited
https://github.com/llvm/llvm-project/pull/145024
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arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/145024?utm_source=stack-comment-downstack-mergeability-warning";
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
AMDGPU: Introduce a pass to replace VGPR MFMAs with AGPR
In gfx90a-gfx950, it's possible to emit MFMAs which use AGPRs or VGPRs
for vdst and src2. We do not want to do use the AGPR form, unless
requ
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/145025
We do not want to use AGPRs unless absolutely required due
to register pressure. Rely on a post-regalloc pass to replace
VGPR MFMAs with the AGPR version if it avoids the copies introduced
due to live range splitt
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
We do not want to use AGPRs unless absolutely required due
to register pressure. Rely on a post-regalloc pass to replace
VGPR MFMAs with the AGPR version if it avoids the copies introduced
due to liv
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/145025?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/145024
AMDGPU: Introduce a pass to replace VGPR MFMAs with AGPR
In gfx90a-gfx950, it's possible to emit MFMAs which use AGPRs or VGPRs
for vdst and src2. We do not want to do use the AGPR form, unless
required by regist
llvmbot wrote:
@llvm/pr-subscribers-llvm-binary-utilities
Author: Alexis Engelke (aengelke)
Changes
Similar to the existing implementations for X86 and PPC, support
symbolizing branch targets for AArch64. Do not omit the address for ADRP
as the target is typically not at an intended locati
https://github.com/ilovepi approved this pull request.
LGTM. overall really good improvement. most of my comments are me noticing bad
existing code we should fix.
I also left a few nit comments to address, but they're rather minor.
https://github.com/llvm/llvm-project/pull/144430
_
@@ -662,6 +709,14 @@ void addTemplateSpecialization(TemplateInfo *I,
I->Specialization.emplace(std::move(TSI));
}
+template static void addConstraint(T I, ConstraintInfo &&C) {
+ llvm::errs() << "invalid container for constraint info";
+ exit(1);
+}
ilove
@@ -248,6 +257,27 @@ static void serializeCommonChildren(const ScopeChildren
&Children,
}
}
+template
+static void serializeArray(const std::vector &Records, Object &Obj,
+ const std::string &Key,
+ SerializationFunc seri
@@ -817,6 +872,20 @@ llvm::Error ClangDocBitcodeReader::readSubBlock(unsigned
ID, T I) {
addChild(I, std::move(TI));
return llvm::Error::success();
}
+ case BI_CONSTRAINT_BLOCK_ID: {
+ConstraintInfo CI;
+if (auto Err = readBlock(ID, &CI))
+ return Err;
@@ -4274,6 +4274,7 @@ bool LLParser::parseValID(ValID &ID, PerFunctionState
*PFS, Type *ExpectedTy) {
case lltok::kw_bitcast:
case lltok::kw_addrspacecast:
case lltok::kw_inttoptr:
+ // ptrtoaddr not supported in constant exprs (yet?).
jrtc27 wrote:
(i
@@ -4274,6 +4274,7 @@ bool LLParser::parseValID(ValID &ID, PerFunctionState
*PFS, Type *ExpectedTy) {
case lltok::kw_bitcast:
case lltok::kw_addrspacecast:
case lltok::kw_inttoptr:
+ // ptrtoaddr not supported in constant exprs (yet?).
jrtc27 wrote:
Th
https://github.com/rampitec commented:
Do you assume that at this stage there are no accvgpr_write/read instructions,
but only COPY?
https://github.com/llvm/llvm-project/pull/145024
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https://github.com/krzysz00 commented:
I think the RFC's at consensus and that things are in a decent state.
One comment I have is that the documentation mentions vectors of pointers and I
don't see any tests for that.
But that minor issue aside, I'd lay ... one last call for comments before t
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@@ -584,6 +613,18 @@ template <> llvm::Error addReference(RecordInfo *I,
Reference &&R, FieldId F) {
}
}
+template <>
+llvm::Error addReference(ConstraintInfo *I, Reference &&R, FieldId F) {
+ switch (F) {
+ case FieldId::F_concept:
+I->ConceptRef = std::move(R);
+
https://github.com/rafaelauler approved this pull request.
lgtm
https://github.com/llvm/llvm-project/pull/90429
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https://github.com/llvm/llvm-project/pull/144034
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arichardson wrote:
ping. What can I do to push this forward? I would like to avoid making any
further follow-up changes if there is any risk this would not land.
@nikic are you still happy with the introduction of this instruction?
https://github.com/llvm/llvm-project/pull/139357
_
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https://github.com/dpaoliello approved this pull request.
https://github.com/llvm/llvm-project/pull/144977
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https://github.com/banach-space edited
https://github.com/llvm/llvm-project/pull/143146
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@@ -203,7 +205,14 @@ class AMDGPURegBankLegalizeCombiner {
bool tryEliminateReadAnyLane(MachineInstr &Copy) {
Register Dst = Copy.getOperand(0).getReg();
Register Src = Copy.getOperand(1).getReg();
-if (!Src.isVirtual())
+
+// Skip non-vgpr Dst
+if ((Dst.i
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https://github.com/rafaelauler approved this pull request.
lgtm
https://github.com/llvm/llvm-project/pull/143233
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https://github.com/matthias-springer updated
https://github.com/llvm/llvm-project/pull/145030
>From d65161f2d8e65512a6924ac96f069ab5acce0fcd Mon Sep 17 00:00:00 2001
From: Matthias Springer
Date: Fri, 20 Jun 2025 12:25:00 +
Subject: [PATCH] [mlir][Transforms] Dialect conversion: Add missing
https://github.com/matthias-springer updated
https://github.com/llvm/llvm-project/pull/145030
>From edb49ecf11faa51847b324d6e43336845e71fcf4 Mon Sep 17 00:00:00 2001
From: Matthias Springer
Date: Fri, 20 Jun 2025 12:25:00 +
Subject: [PATCH] [mlir][Transforms] Dialect conversion: Add missing
llvmbot wrote:
@llvm/pr-subscribers-mlir-core
Author: Matthias Springer (matthias-springer)
Changes
Add missing listener notifications when erasing nested blocks/operations.
This commit also moves some of the functionality from
`ConversionPatternRewriter` to `ConversionPatternRewriterImp
@@ -0,0 +1,262 @@
+// RUN: mlir-opt --arm-sve-legalize-vector-storage --split-input-file %s |
FileCheck %s
+
+// -
+
+// CHECK-LABEL: @test_base_case
+// CHECK-SAME: %[[I:arg0]]: index, %[[J:arg1]]: index, %[[M:arg2]]:
+// CHECK: %[[COLLAPSE:.+]]
https://github.com/aaupov updated
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@@ -298,16 +298,139 @@ struct LegalizeSVEMaskLoadConversion : public
OpRewritePattern {
}
};
+/// Transforms a `transfer_read` operation so it reads vector of a type that
+/// can be mapped to an LLVM type. This is done by collapsing trailing
+/// dimensions so we obtain a
@@ -298,16 +298,139 @@ struct LegalizeSVEMaskLoadConversion : public
OpRewritePattern {
}
};
+/// Transforms a `transfer_read` operation so it reads vector of a type that
+/// can be mapped to an LLVM type. This is done by collapsing trailing
+/// dimensions so we obtain a
@@ -298,16 +298,139 @@ struct LegalizeSVEMaskLoadConversion : public
OpRewritePattern {
}
};
+/// Transforms a `transfer_read` operation so it reads vector of a type that
+/// can be mapped to an LLVM type. This is done by collapsing trailing
+/// dimensions so we obtain a
@@ -649,6 +693,9 @@ template <> void addTemplate(RecordInfo *I, TemplateInfo
&&P) {
template <> void addTemplate(FunctionInfo *I, TemplateInfo &&P) {
I->Template.emplace(std::move(P));
}
+template <> void addTemplate(ConceptInfo *I, TemplateInfo &&P) {
+ I->Template = std::
https://github.com/banach-space edited
https://github.com/llvm/llvm-project/pull/144699
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https://github.com/banach-space commented:
Great work, Momchil - thank you!
I've left a number of comments, but nothing major. My main high-level
suggestion is to follow the guidance in [MLIR's Testing
Guide](https://mlir.llvm.org/getting_started/TestingGuide/#contributor-guidelines)
a bit mo
banach-space wrote:
[nit] Avoid using the word `test` in test function names. It's just noise that
doesn't add any new info. Instead, try to convey what makes a particular test
case unique. See here for MLIR guidelines:
https://mlir.llvm.org/getting_started/T
@@ -298,16 +298,139 @@ struct LegalizeSVEMaskLoadConversion : public
OpRewritePattern {
}
};
+/// Transforms a `transfer_read` operation so it reads vector of a type that
+/// can be mapped to an LLVM type. This is done by collapsing trailing
+/// dimensions so we obtain a
@@ -0,0 +1,262 @@
+// RUN: mlir-opt --arm-sve-legalize-vector-storage --split-input-file %s |
FileCheck %s
+
+// -
+
+// CHECK-LABEL: @test_base_case
+// CHECK-SAME: %[[I:arg0]]: index, %[[J:arg1]]: index, %[[M:arg2]]:
+// CHECK: %[[COLLAPSE:.+]]
@@ -0,0 +1,262 @@
+// RUN: mlir-opt --arm-sve-legalize-vector-storage --split-input-file %s |
FileCheck %s
+
+// -
+
+// CHECK-LABEL: @test_base_case
+// CHECK-SAME: %[[I:arg0]]: index, %[[J:arg1]]: index, %[[M:arg2]]:
+// CHECK: %[[COLLAPSE:.+]]
@@ -298,16 +298,139 @@ struct LegalizeSVEMaskLoadConversion : public
OpRewritePattern {
}
};
+/// Transforms a `transfer_read` operation so it reads vector of a type that
+/// can be mapped to an LLVM type. This is done by collapsing trailing
+/// dimensions so we obtain a
@@ -0,0 +1,262 @@
+// RUN: mlir-opt --arm-sve-legalize-vector-storage --split-input-file %s |
FileCheck %s
+
+// -
+
+// CHECK-LABEL: @test_base_case
+// CHECK-SAME: %[[I:arg0]]: index, %[[J:arg1]]: index, %[[M:arg2]]:
+// CHECK: %[[COLLAPSE:.+]]
@@ -57,6 +57,226 @@ void
RegBankLegalizeHelper::findRuleAndApplyMapping(MachineInstr &MI) {
lower(MI, Mapping, WaterfallSgprs);
}
+bool RegBankLegalizeHelper::executeInWaterfallLoop(
+MachineIRBuilder &B, iterator_range Range,
+SmallSet &SGPROperandRegs) {
+ // Tra
@@ -0,0 +1,262 @@
+// RUN: mlir-opt --arm-sve-legalize-vector-storage --split-input-file %s |
FileCheck %s
+
+// -
+
+// CHECK-LABEL: @test_base_case
+// CHECK-SAME: %[[I:arg0]]: index, %[[J:arg1]]: index, %[[M:arg2]]:
+// CHECK: %[[COLLAPSE:.+]]
@@ -0,0 +1,262 @@
+// RUN: mlir-opt --arm-sve-legalize-vector-storage --split-input-file %s |
FileCheck %s
+
+// -
+
+// CHECK-LABEL: @test_base_case
+// CHECK-SAME: %[[I:arg0]]: index, %[[J:arg1]]: index, %[[M:arg2]]:
banach-space wrote:
Is i
@@ -298,16 +298,139 @@ struct LegalizeSVEMaskLoadConversion : public
OpRewritePattern {
}
};
+/// Transforms a `transfer_read` operation so it reads vector of a type that
+/// can be mapped to an LLVM type. This is done by collapsing trailing
+/// dimensions so we obtain a
@@ -298,16 +298,139 @@ struct LegalizeSVEMaskLoadConversion : public
OpRewritePattern {
}
};
+/// Transforms a `transfer_read` operation so it reads vector of a type that
+/// can be mapped to an LLVM type. This is done by collapsing trailing
+/// dimensions so we obtain a
@@ -0,0 +1,262 @@
+// RUN: mlir-opt --arm-sve-legalize-vector-storage --split-input-file %s |
FileCheck %s
+
+// -
+
+// CHECK-LABEL: @test_base_case
+// CHECK-SAME: %[[I:arg0]]: index, %[[J:arg1]]: index, %[[M:arg2]]:
+// CHECK: %[[COLLAPSE:.+]]
https://github.com/tblah updated
https://github.com/llvm/llvm-project/pull/144898
>From 392514e4d56491575ec47a1eb5607fd52f5b1ff9 Mon Sep 17 00:00:00 2001
From: Tom Eccles
Date: Wed, 18 Jun 2025 21:01:13 +
Subject: [PATCH 1/2] [flang][OpenMP][NFC] remove globals with mlir::StateStack
Idea s
llvmbot wrote:
@llvm/pr-subscribers-mlir
Author: Matthias Springer (matthias-springer)
Changes
Add missing listener notifications when erasing nested blocks/operations.
This commit also moves some of the functionality from
`ConversionPatternRewriter` to `ConversionPatternRewriterImpl`. T
https://github.com/matthias-springer created
https://github.com/llvm/llvm-project/pull/145030
Add missing listener notifications when erasing nested blocks/operations.
This commit also moves some of the functionality from
`ConversionPatternRewriter` to `ConversionPatternRewriterImpl`. This is
https://github.com/matthias-springer edited
https://github.com/llvm/llvm-project/pull/145030
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@@ -0,0 +1,262 @@
+// RUN: mlir-opt --arm-sve-legalize-vector-storage --split-input-file %s |
FileCheck %s
+
+// -
+
+// CHECK-LABEL: @test_base_case
+// CHECK-SAME: %[[I:arg0]]: index, %[[J:arg1]]: index, %[[M:arg2]]:
+// CHECK: %[[COLLAPSE:.+]]
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https://github.com/SLTozer updated
https://github.com/llvm/llvm-project/pull/143594
>From afeb26be5f099d384115a55b19707bbb2a730245 Mon Sep 17 00:00:00 2001
From: Stephen Tozer
Date: Tue, 10 Jun 2025 20:02:36 +0100
Subject: [PATCH] [DLCov] Origin-Tracking: Add debugify support
---
llvm/lib/Tra
https://github.com/SLTozer updated
https://github.com/llvm/llvm-project/pull/143592
>From 4410b5f351cad4cd611cbc773337197d5fa367b8 Mon Sep 17 00:00:00 2001
From: Stephen Tozer
Date: Tue, 10 Jun 2025 20:00:51 +0100
Subject: [PATCH] [DLCov] Origin-Tracking: Core implementation
---
llvm/include/
https://github.com/SLTozer updated
https://github.com/llvm/llvm-project/pull/143592
>From 4410b5f351cad4cd611cbc773337197d5fa367b8 Mon Sep 17 00:00:00 2001
From: Stephen Tozer
Date: Tue, 10 Jun 2025 20:00:51 +0100
Subject: [PATCH] [DLCov] Origin-Tracking: Core implementation
---
llvm/include/
https://github.com/SLTozer updated
https://github.com/llvm/llvm-project/pull/143594
>From afeb26be5f099d384115a55b19707bbb2a730245 Mon Sep 17 00:00:00 2001
From: Stephen Tozer
Date: Tue, 10 Jun 2025 20:02:36 +0100
Subject: [PATCH] [DLCov] Origin-Tracking: Add debugify support
---
llvm/lib/Tra
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https://github.com/llvm/llvm-project/pull/145070
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Author: Michael Buch
Date: 2025-06-20T17:20:32+01:00
New Revision: 34db3b66fd4b406453ed712bf8995eb2ed32dcb7
URL:
https://github.com/llvm/llvm-project/commit/34db3b66fd4b406453ed712bf8995eb2ed32dcb7
DIFF:
https://github.com/llvm/llvm-project/commit/34db3b66fd4b406453ed712bf8995eb2ed32dcb7.diff
https://github.com/evelez7 created
https://github.com/llvm/llvm-project/pull/145070
None
>From 7c0658cc9cbf5d28125ecbfed4b95667cb1ccecf Mon Sep 17 00:00:00 2001
From: Erick Velez
Date: Wed, 18 Jun 2025 16:36:49 -0700
Subject: [PATCH] [clang-doc] document global variables
---
clang-tools-extr
evelez7 wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/145070?utm_source=stack-comment-downstack-mergeability-warning";
evelez7 wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/145069?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/evelez7 created
https://github.com/llvm/llvm-project/pull/145069
None
>From f572cfc62317c37510288a63cb0fccb6a3a1f000 Mon Sep 17 00:00:00 2001
From: Erick Velez
Date: Thu, 19 Jun 2025 21:25:13 -0700
Subject: [PATCH] [clang-doc] Precommit test for global variables
---
.../te
https://github.com/ilovepi approved this pull request.
https://github.com/llvm/llvm-project/pull/145069
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https://github.com/svkeerthy updated
https://github.com/llvm/llvm-project/pull/143999
>From 8b8932b55c8a6a087d516e174e1d57c9908259bd Mon Sep 17 00:00:00 2001
From: svkeerthy
Date: Thu, 12 Jun 2025 23:54:10 +
Subject: [PATCH] Simplifying creation of Embedder
---
llvm/docs/MLGO.rst
https://github.com/svkeerthy updated
https://github.com/llvm/llvm-project/pull/144139
>From 7fa87f2e42378d656ba743a4971e5c2ffaee8492 Mon Sep 17 00:00:00 2001
From: svkeerthy
Date: Fri, 13 Jun 2025 18:22:10 +
Subject: [PATCH] [NFC] Formatting PassRegistry.def
---
llvm/lib/Passes/PassRegist
https://github.com/svkeerthy updated
https://github.com/llvm/llvm-project/pull/143999
>From 8b8932b55c8a6a087d516e174e1d57c9908259bd Mon Sep 17 00:00:00 2001
From: svkeerthy
Date: Thu, 12 Jun 2025 23:54:10 +
Subject: [PATCH] Simplifying creation of Embedder
---
llvm/docs/MLGO.rst
https://github.com/svkeerthy updated
https://github.com/llvm/llvm-project/pull/144139
>From 7fa87f2e42378d656ba743a4971e5c2ffaee8492 Mon Sep 17 00:00:00 2001
From: svkeerthy
Date: Fri, 13 Jun 2025 18:22:10 +
Subject: [PATCH] [NFC] Formatting PassRegistry.def
---
llvm/lib/Passes/PassRegist
https://github.com/svkeerthy created
https://github.com/llvm/llvm-project/pull/145117
None
>From d05856c47337b3b6e9086a5ee06b7c39412d9103 Mon Sep 17 00:00:00 2001
From: svkeerthy
Date: Fri, 20 Jun 2025 22:56:46 +
Subject: [PATCH] Increasing tolerance in ApproximatelyEquals
---
llvm/inclu
https://github.com/svkeerthy created
https://github.com/llvm/llvm-project/pull/145118
None
>From cbd2c6e77eefb4ba7b8acbf6ea12f21486e7dbc8 Mon Sep 17 00:00:00 2001
From: svkeerthy
Date: Fri, 20 Jun 2025 23:00:40 +
Subject: [PATCH] Overloading operator+ for Embeddngs
---
llvm/include/llvm/
svkeerthy wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/145117?utm_source=stack-comment-downstack-mergeability-warning
https://github.com/evelez7 updated
https://github.com/llvm/llvm-project/pull/145070
>From fa5f1cb09df62f018e5b7b53ccec4b77d94d1828 Mon Sep 17 00:00:00 2001
From: Erick Velez
Date: Wed, 18 Jun 2025 16:36:49 -0700
Subject: [PATCH] [clang-doc] document global variables
---
clang-tools-extra/clan
https://github.com/aankit-ca approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/144975
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arsenm wrote:
> Do you assume that at this stage there are no accvgpr_write/read
> instructions, but only COPY?
Yes, you should never use those for actual copies. Not using COPY always hurts
optimizations
https://github.com/llvm/llvm-project/pull/145024
__
@@ -211,6 +214,15 @@ struct TemplateSpecializationInfo {
std::vector Params;
};
+struct ConstraintInfo {
+ ConstraintInfo() = default;
+ ConstraintInfo(SymbolID USR, StringRef Name)
+ : ConceptRef(USR, Name, InfoType::IT_concept) {}
+ Reference ConceptRef;
+
+ Small
@@ -248,6 +257,27 @@ static void serializeCommonChildren(const ScopeChildren
&Children,
}
}
+template
+static void serializeArray(const std::vector &Records, Object &Obj,
+ const std::string &Key,
+ SerializationFunc seri
https://github.com/j2kun approved this pull request.
LGTM!
https://github.com/llvm/llvm-project/pull/145030
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