On 12/02/16 07:43, Jeff Law wrote:
On 02/11/2016 06:28 PM, Bernd Schmidt wrote:
This seems fairly straightforward:
(insn 213 455 216 6 (set (reg:SI 266)
(mem/u/c:SI (post_inc:SI (reg/f:SI 267)) [4 S4 A32])) 748
{*thumb1_movsi_insn}
(expr_list:REG_EQUAL (const_int -1044200508 [
On 12/02/16 13:33, Bernd Schmidt wrote:
On 02/12/2016 02:18 PM, Jiong Wang wrote:
PR rtl-optimization/69752
* ira.c (update_equiv_regs): When looking for more than a single
SET,
also take other side effects into account.
Will it be better that we don't remove the insn if i
On 12/02/16 14:56, Charles Baylis wrote:
This is encountered when building an allyesconfig Linux kernel because
the Linux build system generates very large sections by partial
linking a large number of object files. This causes link failures
I have tried latest BFD linker? I suspect the follo
On 12/02/16 15:02, Jiong Wang wrote:
On 12/02/16 14:56, Charles Baylis wrote:
This is encountered when building an allyesconfig Linux kernel because
the Linux build system generates very large sections by partial
linking a large number of object files. This causes link failures
I have
and tightening their predicates appropriately.
>
> Jeff
Attachment is the patch which repair -fno-plt support for AArch64.
aarch64_is_noplt_call_p will only be true if:
* gcc is generating position independent code.
* function symbol has declaration.
* either -fno-plt or "(no_pl
* either -fno-plt or "(no_plt)" attribute specified.
>> * it's a external function.
>>
>> OK for trunk?
>>
>> 2015-07-16 Jiong Wang
>>
>> gcc/
>> * config/aarch64/aarch64-protos.h (aarch64_is_noplt_call_p): New
>> declara
pported on AArch64, while for absolute
address, anchor used, single "ldr" generated, IV hoisted by PRE pass
also, in either case, this testcase doesn't apply, we should skip it
thus.
Committed attach patch as obivious.
2015-07-20 Jiong Wang
gcc/testsuite/
* gcc.target/aarch64
Jiong Wang writes:
> Alexander Monakov writes:
>
>>> Attachment is the patch which repair -fno-plt support for AArch64.
>>>
>>> aarch64_is_noplt_call_p will only be true if:
>>>
>>> * gcc is generating position independent code.
>>&
Jiong Wang writes:
> Current IRA still use both target macros in a few places.
>
> Tell IRA to use the order we defined rather than with it's own cost
> calculation. Allocate caller saved first, then callee saved.
>
> This is especially useful for LR/x30, as it's fr
Jiong Wang writes:
> Marcus Shawcroft writes:
>
>> On 26 June 2015 at 10:32, Jiong Wang wrote:
>>>
>>> This patch respin https://gcc.gnu.org/ml/gcc-patches/2015-05/msg01804.html.
>>>
>>> A new symbol classification "SYMBOL_SMALL_GOT_28K"
James Greenhalgh writes:
> On Fri, Jun 26, 2015 at 02:45:39PM +0100, Jiong Wang wrote:
>>
>> Marcus Shawcroft writes:
>>
>> 2015-06-26 Jiong Wang
>>
>> wwwdocs/
>> * htdocs/gcc-6/changes.html (AArch64): Document -fpic for sm
James Greenhalgh writes:
> On Wed, May 20, 2015 at 01:35:41PM +0100, Jiong Wang wrote:
>> Current IRA still use both target macros in a few places.
>>
>> Tell IRA to use the order we defined rather than with it's own cost
>> calculation. Allocate calle
Andrew Pinski writes:
> On Fri, Jul 24, 2015 at 2:07 AM, Jiong Wang wrote:
>>
>> James Greenhalgh writes:
>>
>>> On Wed, May 20, 2015 at 01:35:41PM +0100, Jiong Wang wrote:
>>>> Current IRA still use both target macros in a few places.
>>>>
model the override of x0 caused by the function call which is
hidded by the UNSPEC.
So here, we restricting operand 0 to be x0, the override of x0 can be
reflected to the gcc.
OK for trunk?
2015-07-28 Ramana Radhakrishnan
Jiong Wang
gcc/
* config/aarch64/aarch64.d (tlsdesc_smal
On 28/07/15 16:44, Martin Sebor wrote:
Attached is an updated patch with the changes above.
gcc/testsuite/ChangeLog
2015-07-28 Martin Sebor
* g++.dg/Wframe-address-in-Wall.C: New test.
* g++.dg/Wframe-address.C: New test.
* g++.dg/Wno-frame-address.C: New test.
* gcc.dg/Wfr
James Greenhalgh writes:
> On Tue, Jul 28, 2015 at 02:12:36PM +0100, Jiong Wang wrote:
>>
>> The instruction sequences for preparing argument for TLS descriptor
>> runtime resolver and the later function call to resolver can actually be
>> hoisted out of the loop
James Greenhalgh writes:
> On Thu, Jul 16, 2015 at 11:21:25AM +0100, Jiong Wang wrote:
>>
>> Jeff Law writes:
>>
>> > On 06/23/2015 02:29 AM, Ramana Radhakrishnan wrote:
>> >
>> >>> If you try disabling the REG_EQUAL note generation
James Greenhalgh writes:
> On Tue, Jul 21, 2015 at 01:42:35PM +0100, Jiong Wang wrote:
>>
>> Jiong Wang writes:
>>
>> > Alexander Monakov writes:
>> >
>> >>> Attachment is the patch which repair -fno-plt support for AArch64.
>&
ecursive call of expand_ccmp_expr_1 while this patch only
handle the inner most call where the incoming gimple is with both
operands be comparision operations.
NOTE: AArch64 backend can't cost CCMP instruction accurately, so I marked
the testcase as XFAIL which will be removed once we fix
Bernd Schmidt writes:
> On 09/18/2015 05:21 PM, Jiong Wang wrote:
>>
>> Current conditional compare (CCMP) support in GCC aim to optimize
>> short circuit for cascade comparision, given a simple conditional
>> compare candidate:
>>
>>if (a == 17 || a =
Marcus Shawcroft writes:
> On 26 August 2015 at 14:58, Jiong Wang wrote:
>>
>> This patch cover tlsle tiny model tests, tls size truncation for tiny &
>> small model included also.
>>
>> All testcases pass native test.
>>
>> OK for trunk?
&
Andrew Pinski writes:
> On Tue, Jul 28, 2015 at 6:12 AM, Jiong Wang wrote:
>>
>> The instruction sequences for preparing argument for TLS descriptor
>> runtime resolver and the later function call to resolver can actually be
>> hoisted out of the loop.
>>
>
Jiong Wang writes:
> Andrew Pinski writes:
>
>> On Tue, Jul 28, 2015 at 6:12 AM, Jiong Wang wrote:
>>>
>>> The instruction sequences for preparing argument for TLS descriptor
>>> runtime resolver and the later function call to resolver can
Jiong Wang writes:
> Marcus Shawcroft writes:
>
>> On 26 August 2015 at 14:58, Jiong Wang wrote:
>>>
>>> This patch cover tlsle tiny model tests, tls size truncation for tiny &
>>> small model included also.
>>>
>>> All testcases pass
James Greenhalgh writes:
> Hi Jiong,
>
> I was looking at another bug and in the process of auditing our code
> spotted an issue with this patch from back in June...
>
> On Fri, Jun 19, 2015 at 10:15:38AM +0100, Jiong Wang wrote:
>> diff --git a/gcc/config/aarch64/aarch64
Since armv8.1 added, we need to improve --with-arch recognition sed
pattern to catch the new "." in the architecture base name.
OK for trunk?
2015-10-14 Jiong Wang
gcc/
* config.gcc: Recognize "." in architecture base name for AArch64.
diff --git a/gcc/config.gcc b/
On 14/10/15 16:24, Andreas Schwab wrote:
Jiong Wang writes:
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 5818663..215ad9a 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -3544,7 +3544,7 @@ case "${target}" in
eval "val=\$with_$which"
hanks.
2015-10-16 Jiong. Wang
gcc/
* config/aarch64/aarch64.h: Update the comments on usage of X30.
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 5a8db76..1eaaca0 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -210,14 +210,17 @@ e
On 27/10/15 11:37, H.J. Lu wrote:
On Tue, Oct 27, 2015 at 4:20 AM, Bernd Schmidt wrote:
On 10/19/2015 09:55 PM, H.J. Lu wrote:
* calls.c (prepare_call_address): Don't handle -fno-plt here.
Is any other target using -fno-plt? If not, and if that's really just a
aarch64 is the onl
On 27/10/15 13:06, H.J. Lu wrote:
On Tue, Oct 27, 2015 at 5:52 AM, Jiong Wang wrote:
On 27/10/15 11:37, H.J. Lu wrote:
On Tue, Oct 27, 2015 at 4:20 AM, Bernd Schmidt
wrote:
On 10/19/2015 09:55 PM, H.J. Lu wrote:
* calls.c (prepare_call_address): Don't handle -fno-plt
On 27/10/15 14:50, H.J. Lu wrote:
On Tue, Oct 27, 2015 at 7:34 AM, Ramana Radhakrishnan
wrote:
OK, then it's fairly x86-64 specific optimization, because we can't do "call
*mem" in
aarch64 and some other targets.
It is a fairly x86_64 specific optimization and doesn't apply to AArch64.
The
On 16/10/15 15:36, Jiong Wang wrote:
The patch https://gcc.gnu.org/ml/gcc-patches/2014-09/msg02654.html
from last year changed the definition of LR in CALL_USED_REGISTERS,
but didn't update the comment above the #define to reflect the new usage.
This patch bring the comment inline wit
On 02/11/15 12:01, Richard Earnshaw wrote:
On 16/10/15 15:36, Jiong Wang wrote:
The patch https://gcc.gnu.org/ml/gcc-patches/2014-09/msg02654.html
from last year changed the definition of LR in CALL_USED_REGISTERS,
but didn't update the comment above the #define to reflect the new
On 27 May 2015 at 22:15, Christophe Lyon
wrote:
* gcc.target/aarch64/advsimd-intrinsics/vtbX.c: Likewise.
Noticed this testcase failed on big-endian on my local test
gcc.target/aarch64/advsimd-intrinsics/vtbX.c line 188 in buffer
'expected_vtbl3') at type int8x8 index 0: got 0x0
On 02/11/15 14:38, Christophe Lyon wrote:
On 2 November 2015 at 15:20, Jiong Wang wrote:
On 27 May 2015 at 22:15, Christophe Lyon wrote:
* gcc.target/aarch64/advsimd-intrinsics/vtbX.c: Likewise.
Noticed this testcase failed on big-endian on my local test
gcc.target/aarch64
On 02/11/15 14:52, Richard Earnshaw wrote:
On 02/11/15 12:58, Jiong Wang wrote:
On 02/11/15 12:01, Richard Earnshaw wrote:
On 16/10/15 15:36, Jiong Wang wrote:
The patch https://gcc.gnu.org/ml/gcc-patches/2014-09/msg02654.html
from last year changed the definition of LR in
perand is only used by several misalign pattern, I
guess that's why this bug is not exposed for long time.
boostrap & regression OK on armv8 aarch32, ok for trunk?
2015-11-04 Jiong Wang
Jim Wilson
gcc/
PR target/67305
* config/arm/arm.md (neon_vector_mem_operand): Return F
you compile with
"-O2 -ftls-model=global-dynamic -fpic -mtls-dialect=trad t.c -mcmodel=tiny
-fomit-frame-pointer",
wrong code will be generated:
main:
str x19, [sp, -16]! <--- x30 is not saved.
adr x0, :tlsgd:t0
bl __tls_get_addr
nop
Patc
On 21/08/15 10:47, Jiong Wang wrote:
Richard Biener writes:
I see the following ICE:
t.c:13:1: internal compiler error: in decompose_normal_address, at
rtlanal.c:6090
}
^
0xc94a37 decompose_normal_address
/space/rguenther/tramp3d/trunk/gcc/rtlanal.c:6090
0xc94d25
8 new VR_VARYING ->
VR_RANGE
found by vrp1, and 5008 new by vrp2.
While on AArch64 there are 44756 new by vrp1, and 6047 new by vrp2.
OK for trunk?
2015-11-11 Richard Biener
Jiong Wang
gcc/
PR tree-optimization/68234
* tree-vrp.c (vrp_visit_phi_node): Extend SCEV check to th
On 04/11/15 09:45, Jiong Wang wrote:
As discussed at the bugzilla
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67305
neon_vector_mem_operand is broken. As the comments says
"/* Reject eliminable registers. */", the code block at the head
of this function which checks eliminable
On 05/11/15 14:57, Jiong Wang wrote:
Marcus Shawcroft writes:
+#ifdef HAVE_AS_TINY_TLSGD_RELOCS
+ return SYMBOL_TINY_TLSGD;
+#else
+ return SYMBOL_SMALL_TLSGD;
+#endif
Rather than introduce blocks of conditional compilation it is better
to gate different behaviours with a test on a
11-23 Richard Biener
Jiong Wang
gcc/
PR tree-optimization/68137
PR tree-optimization/68326
* tree-vrp.c (adjust_range_with_scev): Call drop_tree_overflow if the
final min and max are not infinity.
gcc/testsuite/
* gcc.dg/pr68139.c: New testcase.
--
Regards,
Jiong
diff --
On 24/11/15 10:18, Richard Earnshaw wrote:
I presume you are aware of the canonicalization rules for add? That is,
for a shift-and-add operation, the shift operand must appear first. Ie.
(plus (shift (op, op)), op)
not
(plus (op, (shift (op, op))
R.
Looks to me it's not optimal to gener
On 24/11/15 13:23, Richard Earnshaw wrote:
On 24/11/15 13:06, Jiong Wang wrote:
On 24/11/15 10:18, Richard Earnshaw wrote:
I presume you are aware of the canonicalization rules for add? That is,
for a shift-and-add operation, the shift operand must appear first. Ie.
(plus (shift (op, op
On 13/11/15 15:21, Jiong Wang wrote:
On 05/11/15 14:57, Jiong Wang wrote:
Marcus Shawcroft writes:
+#ifdef HAVE_AS_TINY_TLSGD_RELOCS
+ return SYMBOL_TINY_TLSGD;
+#else
+ return SYMBOL_SMALL_TLSGD;
+#endif
Rather than introduce blocks of conditional compilation it is better
to gate
The same skip should be applied to big-endian for tiny and large code model.
Applied to trunk as obvious r231413.
2015-12-08 Jiong Wang
gcc/testsuite/
* gcc.target/aarch64/got_mem_hoist_1.c (dg-skip-if): Match big-endian as well.
diff --git a/gcc/testsuite/gcc.target/aarch64
On 15/06/17 15:12, Wilco Dijkstra wrote:
This results in smaller code and unwind info.
I have done a quick test on your updated patch through building latest linux
kernel.
Dwarf frame size improved (~ 5% smaller) as using sp to address locals doesn't
need to update CFA register etc.
Though th
.md (neon_copysignf): New pattern for vector copysignf.
gcc/testsuite/
* gcc.target/arm/vect-copysignf.c: New testcase.
commit 533b209f1899a1070394506ab32cc640de6a58e3
Author: Jiong Wang
Date: Thu Aug 14 11:54:41 2014 +0100
vect copysignf.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/ar
for *a function with frame size >= 512 and there is outgoing area*,
aarch64 gcc is generate wrong .cfi_def_cfa_offset for the last
stack adjustment instruction in epiloue.
given a simple testcase
test.c
===
int
main (int argc, char **argv)
{
char a[600];
int b = 0x10;
printf ("%d, %d, %d,
On 22/08/14 23:05, Richard Henderson wrote:
Don't continually re-read data from cfun->machine.
* config/aarch64/aarch64.c (aarch64_expand_prologue): Load
cfun->machine->frame.hard_fp_offset into a local variable.
---
gcc/config/aarch64/aarch64.c | 14 +++---
1 file cha
thanks,
verified no regression on aarch64-none-elf bare-metal check-gcc/check-gdb.
-- Jiong
On 22/08/14 23:05, Richard Henderson wrote:
Delay cfi restore opcodes until the stack frame is deallocated.
This reduces the number of cfi advance opcodes required.
We perform a similar optimization in
On 26/08/14 14:37, Jiong Wang wrote:
thanks,
verified no regression on aarch64-none-elf bare-metal check-gcc/check-gdb.
-- Jiong
On 22/08/14 23:05, Richard Henderson wrote:
Delay cfi restore opcodes until the stack frame is deallocated.
This reduces the number of cfi advance opcodes required
On 28/08/14 17:48, Richard Henderson wrote:
On 08/26/2014 05:58 AM, Jiong Wang wrote:
there is a field "hardfp_offset" in aarch64_frame, and I think that field is
not used and not initialized correctly.
how about hoisting the calculation to aarch64_layout_frame to avoid duplicated
On 03/09/14 11:33, Marcus Shawcroft wrote:
On 20 August 2014 09:43, Jiong Wang wrote:
gcc/
* config/aarch64/aarch64.c (aarch64_expand_epilogue): Remove redundant cfa
offset update.
OK
/Marcus
thanks for review.
this fix is included in Richard H's patch at
https://gcc.gnu.org/m
this patch enabled stack shrink-wrap support on AArch64.
no regression on aarch64-none-elf bare-metal.
aarch64 bootstrap OK.
ok to install?
2014-09-04 Renlin Li
gcc/
* config/aarch64/aarch64.md (return): New expand.
(simple_return): Likewise.
* config/aarch64/aarch64.c (aarch64_use_retur
check-gcc.
both aarch64 and x86-64 bootstrap OK.
ok for install?
2014-09-04 Jiong Wang
gcc/
* shrink-wrap.c (rtx_search_arg): New structure type.
(rtx_search_arg_p): New typedef.
(count_reg_const): New callback function.
(move_insn_for_shrink_wrap): Relax the restriction on src operand.
On 05/09/14 20:48, Jeff Law wrote:
On 09/04/14 08:15, Jiong Wang wrote:
this patch relax the restriction on src to accept any one of the following:
+ REG
+ CONST_OBJ, like SYMBOL_REF
+ combination of single REG and any other CONST_OBJs.
(reg def/use calculation will not
On 08/10/14 15:00, Maxim Ostapenko wrote:
Hm, as I see, others testsuites such as gfortran.exp, go.exp etc. do not
call restore_ld_library_path at all. Perhaps we could simply follow this
way?
Would failing tests still fail if remove restore_ld_library_path from
{asan, tsan, ubsan}_finish?
Hi
On 30/09/14 19:36, Jiong Wang wrote:
2014-09-30 17:30 GMT+01:00 Jeff Law :
On 09/30/14 08:37, Jiong Wang wrote:
On 30/09/14 05:21, Jeff Law wrote:
I do agree with Richard that it would be useful to see the insns that
are incorrectly sunk and the surrounding context.
So I must be missing
will cause it work on your and my test
environment but fail on others. because looks like
these restore_ld_library_path is added deliberately.
Regards,
Jiong
-Maxim
On 10/08/2014 06:30 PM, Jiong Wang wrote:
On 08/10/14 15:00, Maxim Ostapenko wrote:
Hm, as I see, others testsuites su
On 10/10/14 16:59, Richard Henderson wrote:
On 10/08/2014 08:31 AM, Jiong Wang wrote:
Ping ~
And as there is NONDEBUG_INSN_P check before move_insn_for_shrink_wrap invoked,
we could avoid creating new wrapper function by invoke single_set_2 directly.
I'm committing the following to fix
On 23/09/14 16:22, Stubbs, Andrew wrote:
Maybe the original patch is better? Or maybe it should reconfigure the FPU
instead of erroring out? But reconfigure it to what?
Andrew,
are you still working on this?
a bunch of tests on my local environment failed because of the reason James m
On 15/10/14 17:58, Andrew Stubbs wrote:
On 15/10/14 17:34, Jiong Wang wrote:
On 23/09/14 16:22, Stubbs, Andrew wrote:
Maybe the original patch is better? Or maybe it should reconfigure the
FPU instead of erroring out? But reconfigure it to what?
Andrew,
are you still working on this
the cause should be one minor bug in prepare_cmp_insn.
the last mode parameter "pmode" of "prepare_cmp_insn" should match the
mode of the first parameter "x", while during the recursive call of
"prepare_cmp_insn",
x is with mode of targetm.libgcc_cmp_return_mode () while pmode is assign to
word
this patch update arm testcases for recently gnu11 change.
ok for trunk?
thanks.
gcc/testsuite/
* gcc.target/arm/20031108-1.c: Add explicit declaration.
* gcc.target/arm/cold-lc.c: Likewise.
* gcc.target/arm/neon-modes-2.c: Likewise.
* gcc.target/arm/pr43920-2.c: Likewise.
* gcc.target
Update testcases for recent gnu11 changes.
ok for trunk?
thanks.
gcc/testsuite/
* gcc.target/aarch64/pic-constantpool1.c: Add explicit declaration.
* gcc.target/aarch64/pic-symrefplus.c: Likewise.
* gcc.target/aarch64/reload-valid-spoff.c: Likewise.
* gcc.target/aarch64/vect.x: Likewise
On 19/08/14 17:30, Mike Stump wrote:
On Aug 19, 2014, at 6:12 AM, Kyrill Tkachov wrote:
So how about this?
Ok. Thanks.
looks like this patch only fixed one invoke path.
currently, "gcc-dg-prune" may be invoked directly *or* via
${tool}_check_compile:
and "gcc-dg-prune" is implemented to
On 21/10/14 15:13, Ramana Radhakrishnan wrote:
On 21/10/14 14:48, Jiong Wang wrote:
this patch update arm testcases for recently gnu11 change.
ok for trunk?
This is OK bar the minor nit in the ChangeLog below - as a follow up it
would be nice to see if we can use the ACLE feature macros
On 20/10/14 19:21, Andrew MacLeod wrote:
creates cfg.h, cfganal.h, lcm.h, and loop-unroll.h to house the
prototypes for those .c files.
cfganal.h also gets "struct edge_list" and "class control_dependences"
definitions since that is where all the routines and manipulators are
declared.
loo
On 21/10/14 17:30, Andrew MacLeod wrote:
Try the following patch.
Apparently missed because that target is not in contrib/config-list.mk
and no other target must have enabled that code path. Seems to work now.
checked in as obvious.
verified OK, thanks.
Regards,
Jiong
Andrew
config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define
__ARM_FEATURE_IDIV__.
Also fixed the missing '\' on the last line as obvious
2014-10-22 Jiong Wang
gcc/
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Add missing '\'.
PR 63574 ICE building libjava (segfault) on arm-linux-gnueabihf is
caused by this commit.
from the backtrace, the ICF pass is trying to compare two label tree
node without type info.
while looks like "compare_operand" expect the type info always be not
empty before invoking "func_checker::compati
we should not add explicit declaration there.
arm_neon.h contains those prototype already. they will be available if the
compiler configuration is with related builtin predefine, for example
__ARM_FEATURE_CRYPTO.
so, actually, if there is any warning when compile these test programs, they
are
a furhter cleanup under aapcs sub-directory.
ok for trunk?
gcc/testsuite/
* gcc.target/arm/aapcs/abitest.h: Declare memcpy.
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/abitest.h b/gcc/testsuite/gcc.target/arm/aapcs/abitest.h
index 06a92c3..7bce58b 100644
--- a/gcc/testsuite/gcc.target/arm/
ping~
thanks.
Regards,
Jiong
On 17/10/14 13:04, Jiong Wang wrote:
the cause should be one minor bug in prepare_cmp_insn.
the last mode parameter "pmode" of "prepare_cmp_insn" should match the
mode of the first parameter "x", while during the recursive call of
On 24/10/14 12:50, Marek Polacek wrote:
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/abitest.h
b/gcc/testsuite/gcc.target/arm/aapcs/abitest.h
index 06a92c3..7bce58b 100644
--- a/gcc/testsuite/gcc.target/arm/aapcs/abitest.h
+++ b/gcc/testsuite/gcc.target/arm/aapcs/abitest.h
@@ -49,6 +49,8 @@
On 24/10/14 19:41, Jeff Law wrote:
On 10/24/14 08:09, Jiong Wang wrote:
ping~
thanks.
Regards,
Jiong
On 17/10/14 13:04, Jiong Wang wrote:
the cause should be one minor bug in prepare_cmp_insn.
the last mode parameter "pmode" of "prepare_cmp_insn" should match t
On 27/10/14 15:30, Ilya Palachev wrote:
Hi all,
The attached patch is an attempt to fix the bug PR ipa/63576.
As it is said in the comment to the bug,
Jan Hubicka wrote:
THen you need to sum counts (instead of taking ones from BB) and
turn them back to frequencies (because it is profile only
For AArch64, there may have been an odd num core registers need to be saved.
This small patch ensure we remain 16 byte aligned for subsequent STP writes of
D registers.
OK for trunk?
thanks.
gcc/
* config/aarch64/aarch64.c (aarch64_layout_frame): Make sure start offset
for vector regist
/test_frame_13.c: Likewise.
* gcc.target/aarch64/test_frame_14.c: Likewise.
* gcc.target/aarch64/test_frame_15.c: Likewise.
commit ec07ddf26d31696b61d6ffbff52227bb5e86bd2a
Author: Jiong Wang
Date: Fri Jun 6 10:18:19 2014 +0100
[AArch64] Add a set of stack layout testcases.
The following
This patch add predicate for storewb_pair/loadwb_pair, because aarch64
register pair push and pop instructions only accept constant offset
within certain range.
OK for trunk?
Thanks.
gcc/ChangeLog:
2014-06-12 Renlin Li
* config/aarch64/aarch64.c (offset_7bit_signed_scaled_p): Rename to
Jeff Law writes:
> For all kinds of reassociation we have to concern ourselves with adding
> overflow where it didn't already occur. Assuming a 32 bit architecture
> we could get overflow if A is 0x7fff, b is -4 and and c = 3
>
> 0x7fff + -4 = 0x7ffb
> 0x7ffb + 3 = 0x7ffe
>
p, we use pseudo pic reg, and let
register allocator to use any one possible.
Binutils correspondent
test done
=
gcc bootstrap OK on aarch64 board with BOOT_CFLAGS="-O2 -fpic".
built glibc under -fpic, code size slightly smaller.
Ok for trunk?
2015-05-20 Jiong. Wang
gcc/
Shawcroft
Jiong Wang
gcc/
* config/aarch64/aarch64-protos.h (arch64_symbol_type): Rename
SYMBOL_SMALL_TPREL to SYMBOL_TLSLE.
(aarch64_symbol_context): Ditto.
* config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Ditto.
(aarch64_expand_mov_immediate): Ditto.
(aarch64_pri
Similar to the rename from SYMBOL_SMALL_TPREL to SYMBOL_TLSLE, this
patch rename the rtl pattern name.
ok for trunk?
2015-05-19 Jiong Wang
gcc/
* config/aarch64/aarch64.md (tlsle_small): Rename to tlsle.
(tlsle_small_): Rename to tlsle_.
* config/aarc64/aarch64.c
Add new unspec name UNSPEC_TLSLE, use it for all tlsle pattern.
ok for trunk?
2015-05-19 Jiong Wang
gcc/
* config/aarch64/aarch64.md (UNSPEC_TLSLE): New enumeration.
(tlsle): Use new unspec name.
(tlsle_): Ditto.
--
Regards,
Jiong
diff --git a/gcc/config/aarch64/aarch64.md b/gcc
ed in leaf function.
Haven't noticed significant impact on benchmarks, but by grepping some
keywords like "Spilling", "Push.*spill" etc in ira rtl dump, the number
is smaller.
OK for trunk?
2015-05-19 Jiong. Wang
gcc/
PR 63521
* config/aarch64/
sequences.
Currently, -mtls-size accept all integer, then will translate it into
12(4K), 24(16M), 32(4G), 48(256TB) based on the value.
no functional change.
ok for trunk?
2015-05-20 Jiong Wang
gcc/
* config/aarch64/aarch64.opt (mtls-size): New entry.
* config/aarch64/aarch64.c
R_AARCH64_TLSLE_MOVW_TPREL_G2x4
movk t0, #:tprel_g1_nc:x4 R_AARCH64_TLSLE_MOVW_TPREL_G1_NC x4
movk t0, #:tprel_g0_nc:x4 R_AARCH64_TLSLE_MOVW_TPREL_G0_NC x4
add t0, t0, tp
OK for trunk?
2015-05-14 Jiong Wang
gcc/
* config/aarch64/aarch64.c
Jiong Wang writes:
> This patch add -mtls-size option for AArch64. This option let user to do
> finer control on code generation for various TLS model on AArch64.
>
> For example, for TLS LE, user can specify smaller tls-size, for example
> 4K which is quite usual, to let
Jeff Law writes:
> On 05/14/2015 03:13 PM, Jiong Wang wrote:
>>
>> Jeff Law writes:
>>
>>> For all kinds of reassociation we have to concern ourselves with adding
>>> overflow where it didn't already occur. Assuming a 32 bit architecture
>>>
This is a rework of
https://gcc.gnu.org/ml/gcc-patches/2014-07/msg01998.html
After second thinking, I feel it's better to fix this in earlier stage
during RTL expand which is more generic, and we also avoid making the
already complex combine pass complexer.
Currently gcc expand wide mode left
2015-02-11 18:18 GMT+00:00 Jiong Wang :
>
> 2015-02-11 Jiong Wang
>
> gcc/
> * loop-invariant.c (find_defs): Enable DF_DU_CHAIN build.
> (vfp_const_iv): New hash table.
> (expensive_addr_check_p): New boolean.
> (init_inv_motion_data): Initialize new variables.
&
Jiong Wang writes:
> 2015-04-14 18:24 GMT+01:00 Jeff Law :
>> On 04/14/2015 10:48 AM, Steven Bosscher wrote:
>>>>
>>>> So I think this stage2/3 binary difference is acceptable?
>>>
>>>
>>> No, they should be identical. If there'
Jeff Law writes:
> On 04/21/2015 08:24 AM, Jiong Wang wrote:
>>
>> Jiong Wang writes:
>>
>>> 2015-04-14 18:24 GMT+01:00 Jeff Law :
>>>> On 04/14/2015 10:48 AM, Steven Bosscher wrote:
>>>>>>
>>>>>> So I think this
Jeff Law writes:
> On 04/16/2015 05:04 AM, Jiong Wang wrote:
>>
>> This is a rework of
>>
>>https://gcc.gnu.org/ml/gcc-patches/2014-07/msg01998.html
>>
>> After second thinking, I feel it's better to fix this in earlier stage
>> during R
Hi Matthew,
2015-04-21 15:24 GMT+01:00 Jiong Wang :
>
> 2015-04-21 Jiong Wang
>
> gcc/
> * loop-invariant.c (find_defs): Enable DF_DU_CHAIN build.
> (vfp_const_iv): New hash table.
> (expensive_addr_check_p): New boolean.
> (init_inv_motion_data):
2015-04-28 14:56 GMT+01:00 Matthew Fortune :
>> Hi Matthew,
>>
>> 2015-04-21 15:24 GMT+01:00 Jiong Wang :
>>
>> >
>> > 2015-04-21 Jiong Wang
>> >
>> > gcc/
>> > * loop-invariant.c (find_defs): Enable DF_DU_CHAIN build.
Jeff Law writes:
> On 04/27/2015 02:21 PM, Jiong Wang wrote:
>
>> Jeff,
>>
>>Sorry, I can't understand the meaning of "overlap between t_low and low",
>>assume "right" in "right value" means the opposite of "left"
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