[AArch64] Make sure start callee-save offset for D registers aligned

[Jiong Wang]

For AArch64, there may have been an odd num core registers need to be saved.

This small patch ensure we remain 16 byte aligned for subsequent STP writes of 
D registers.

OK for trunk?

thanks.

gcc/
  * config/aarch64/aarch64.c (aarch64_layout_frame): Make sure start offset
    for vector registers in callee-saved area 16-byte aligned.


diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index aada704..c4abf1e 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -1793,6 +1793,10 @@ aarch64_layout_frame (void)
 	offset += UNITS_PER_WORD;
       }
 
+  /* Align offset to 16-bytes.
+     There may have been an odd num core registers. Ensure we remain
+     16 byte aligned for subsequent STP writes of D registers.  */
+  offset = AARCH64_ROUND_UP (offset, 2 * UNITS_PER_WORD);
   for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
     if (cfun->machine->frame.reg_offset[regno] == SLOT_REQUIRED)
       {