James Greenhalgh writes:
> On Fri, Jun 26, 2015 at 02:45:39PM +0100, Jiong Wang wrote:
>>
>> Marcus Shawcroft writes:
>>
>> 2015-06-26 Jiong Wang <jiong.w...@arm.com>
>>
>> wwwdocs/
>> * htdocs/gcc-6/changes.html (AArch64): Document -fpic for small model.
>>
>
>> Index: gcc-6/changes.html
>> ===================================================================
>> RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-6/changes.html,v
>> retrieving revision 1.12
>> diff -u -r1.12 changes.html
>> --- gcc-6/changes.html 16 Jun 2015 08:48:02 -0000 1.12
>> +++ gcc-6/changes.html 26 Jun 2015 13:30:05 -0000
>> @@ -90,6 +90,15 @@
>> If GCC is unable to detect the host CPU these options have no effect.
>> </li>
>> </ul>
>> + <ul>
>
> This should be a new <li> (list item) in the above <ul> (unordered list),
> rather than a new <ul>.
thanks, fixed.
>
>> + <li>
>> + <code>-fpic</code> is now supported on AArch64 for small memory
>> + model.
>
> In invoke.texi we describe -mcmodel as the "small code model" rather
> than as a "memory model". How about rewording this as so:
>
> <code>-fpic</code> is now supported by the AArch64 target when generating
> code for the small code model (<code>-mcmodel=small</code>).
fixed.
>
>> Compared with <code>-fPIC</code>, <code>-fpic</code>
>> + will guide GCC to generate more efficient position independent
>> + instruction sequences when accessing global objects and
>> + 28KiB/15KiB global offset table size supported under ILP64/32.
>
> I'm not sure this part is needed, the difference between -fpic and -fPIC
> is already covered by invoke.texi. If you do want to include this text,
> I might try rewriting it as:
>
> <code>-fpic</code> generates position-independent code which accesses all
> constant addresses through a global offset table (GOT). For AArch64, the
> size of the GOT is limited to 28KiB under the LP64 SysV ABI, and 15KiB
> under the ILP32 SysV ABI.
As this page documents changes, I combined two of your rewording together as:
<code>-fpic</code> is now supported by the AArch64 target when generating
code for the small code model (<code>-mcmodel=small</code>). The size of
the GOT is limited to 28KiB under the LP64 SysV ABI, and 15KiB under the
ILP32 SysV ABI.
>
> As I was looking in invoke.texi, do we want to document the limits on our
> GOT size there as other targets have?
Maybe, I haven't touch invoke.texi in this patch.
>
> "These maximums are 8k on the SPARC and 32k on the m68k and RS/6000.
> The x86 has no such limit."
patch updated. Ok for trunk?
2015-07-23 Jiong Wang <jiong.w...@arm.com>
wwwdocs/
* htdocs/gcc-6/changes.html (AArch64): Document -fpic for small model.
--
Regards,
Jiong
Index: htdocs/gcc-6/changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-6/changes.html,v
retrieving revision 1.12
diff -u -r1.12 changes.html
--- htdocs/gcc-6/changes.html 16 Jun 2015 08:48:02 -0000 1.12
+++ htdocs/gcc-6/changes.html 23 Jul 2015 08:45:11 -0000
@@ -89,6 +89,12 @@
rewrite these options to the optimal setting for that system.
If GCC is unable to detect the host CPU these options have no effect.
</li>
+ <li>
+ <code>-fpic</code> is now supported by the AArch64 target when generating
+ code for the small code model (<code>-mcmodel=small</code>). The size of
+ the GOT is limited to 28KiB under the LP64 SysV ABI, and 15KiB under the
+ ILP32 SysV ABI.
+ </li>
</ul>
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