On Thu, Jun 3, 2021 at 5:49 AM H.J. Lu wrote:
>
> Update move expanders to convert the CONST_WIDE_INT operand to vector
> broadcast from a byte with AVX2. Add ix86_gen_scratch_sse_rtx to
> return a scratch SSE register which won't increase stack alignment
> requirement and blocks transformation b
Right, we can consider this cpu switch missing in gcc11.
Best,
Claudiu
From: Vineet Gupta
Sent: Wednesday, June 2, 2021 8:36 PM
To: Claudiu Zissulescu ; gcc-patches@gcc.gnu.org
Cc: linux-snps-...@lists.infradead.org
Subject: Re: [PATCH] ARC: gcc driver default
Hi!
On Thu, Jun 03, 2021 at 01:22:38PM +0800, Kewen.Lin wrote:
> on 2021/6/3 上午7:52, Segher Boessenkool wrote:
> >> - add a new "define_independent_insn_and_split" that has the
> >> current semantics of define_insn_and_split. This should be
> >> mechanical.
> >
> > I'd rather not have that -
"Kewen.Lin" writes:
> Hi Richi/Richard/Jeff/Segher,
>
> Thanks for the comments!
>
> on 2021/6/3 锟斤拷锟斤拷7:52, Segher Boessenkool wrote:
>> On Wed, Jun 02, 2021 at 06:32:13PM +0100, Richard Sandiford wrote:
>>> Richard Biener writes:
So what Richard suggests would be to disallow split conditio
On Wed, Jun 02, 2021 at 10:04:03AM -0600, Martin Sebor via Gcc-patches wrote:
> On 6/2/21 12:55 AM, Richard Biener wrote:
> > On Tue, Jun 1, 2021 at 9:56 PM Martin Sebor wrote:
> > >
> > > On 5/27/21 2:53 PM, Jason Merrill wrote:
> > > > On 4/27/21 11:52 AM, Martin Sebor via Gcc-patches wrote:
>
On Mon, 15 Mar 2021 at 17:03, Christophe Lyon
wrote:
>
> On Wed, 3 Mar 2021 at 15:00, Richard Earnshaw
> wrote:
> >
> > On 02/03/2021 18:35, Christophe Lyon wrote:
> > > On Tue, 2 Mar 2021 at 19:18, Richard Earnshaw
> > > wrote:
> > >>
> > >> On 02/03/2021 18:14, Richard Earnshaw via Gcc-patches
On Thu, 3 Jun 2021 at 10:38, Christophe Lyon wrote:
>
> On Mon, 15 Mar 2021 at 17:03, Christophe Lyon
> wrote:
> >
> > On Wed, 3 Mar 2021 at 15:00, Richard Earnshaw
> > wrote:
> > >
> > > On 02/03/2021 18:35, Christophe Lyon wrote:
> > > > On Tue, 2 Mar 2021 at 19:18, Richard Earnshaw
> > > > w
On Thu, 3 Jun 2021 at 00:31, Przemyslaw Wirkus via Gcc-patches
wrote:
>
> Hi,
>
> > -Original Message-
> > From: Vladimir Makarov
> > Sent: 31 May 2021 16:52
> > To: Przemyslaw Wirkus ; Richard Biener
> >
> > Cc: gcc-patches@gcc.gnu.org; ja...@redhat.com; ni...@redhat.com;
> > Richard Ea
> -Original Message-
> From: Christophe Lyon
> Sent: 03 June 2021 09:45
> To: Przemyslaw Wirkus
> Cc: Vladimir Makarov ; ja...@redhat.com; Richard
> Earnshaw ; Richard Biener
> ; gcc-patches@gcc.gnu.org; Ramana Radhakrishnan
>
> Subject: Re: [backport gcc10, gcc9] Requet to backport PR
Hi!
The following testcase FAILs because a dependent (late) attribute is never
tsubsted. While the testcase is OpenMP, I think it is a generic C++ FE problem
that could affect any other dependent attribute.
apply_late_template_attributes documents that it relies on
/* save_template_attributes
For evex encoding extended instructions, when vector length is less
than 512 bits, AVX512VL is needed, besides some instructions like
vpmovzxbx need extra AVX512BW. So this patch refines corresponding
constraints, i.e. from "v/vm" to "Yv/Yvm", from "v/vm" to "Yw/Ywm".
Bootstrapped and regtested on
On Thu, 3 Jun 2021 at 10:54, Przemyslaw Wirkus
wrote:
>
>
>
> > -Original Message-
> > From: Christophe Lyon
> > Sent: 03 June 2021 09:45
> > To: Przemyslaw Wirkus
> > Cc: Vladimir Makarov ; ja...@redhat.com; Richard
> > Earnshaw ; Richard Biener
> > ; gcc-patches@gcc.gnu.org; Ramana Rad
> -Original Message-
> From: Christophe Lyon
> Sent: 03 June 2021 10:10
> To: Przemyslaw Wirkus
> Cc: Vladimir Makarov ; ja...@redhat.com; Richard
> Earnshaw ; Richard Biener
> ; gcc-patches@gcc.gnu.org; Ramana Radhakrishnan
>
> Subject: Re: [backport gcc10, gcc9] Requet to backport PR
On Thu, Jun 03, 2021 at 03:00:44AM -0500, Segher Boessenkool wrote:
> On Thu, Jun 03, 2021 at 01:22:38PM +0800, Kewen.Lin wrote:
> The whole point of requiring the split condition to start with && is so
> it will become harder to mess things up (it will make the gen* code a
> tiny little bit simple
Hi All,
A late change in the patch changed the implemented ID to one that
hasn't been used yet to avoid any ambiguity. Unfortunately the
chosen value of 0xFF matches the value of -1 which is used as an
invalid implementer so the test started failing.
This patch changes it to 0xFE which is the hig
On Thu, Jun 03, 2021 at 09:05:02AM +0100, Richard Sandiford via Gcc-patches
wrote:
> Right. Plus it creates less make-work. If we didn't have it, someone
> would need to split the define_insn_and_splits that don't currently
> use "&&", then later someone might decide that the missing "&&" was a
Segher Boessenkool writes:
> On Thu, Jun 03, 2021 at 09:05:02AM +0100, Richard Sandiford via Gcc-patches
> wrote:
>> Right. Plus it creates less make-work. If we didn't have it, someone
>> would need to split the define_insn_and_splits that don't currently
>> use "&&", then later someone might
> Not sure whether we know VLA results are always returned by
> reference? In particular does this mean we'll never see a
> WITH_SIZE_EXPR on the LHS of a call? You might have noticed
> I've done WITH_SIZE_EXPR "enhancements" recently on trunk.
VLAs are always aggregate_value_p so the caller pas
On 6/2/21 10:41 PM, Martin Sebor wrote:
On 5/31/21 7:25 AM, Martin Liška wrote:
Hello.
I've made quite some progress with the porting of the documentation and
I would like to present it to the community now:
https://splichal.eu/scripts/sphinx/
Hello.
Thank you for the review.
Just a few
>-Original Message-
>From: Segher Boessenkool
>Sent: Thursday, June 3, 2021 4:46 AM
>To: Richard Biener
>Cc: Liu, Hongtao ; GCC Patches patc...@gcc.gnu.org>
>Subject: Re: [PATCH] Canonicalize (vec_duplicate (not A)) to (not
>(vec_duplicate A)).
>
>Hi!
>
>On Wed, Jun 02, 2021 at 09:07:3
On Thu, Jun 03, 2021 at 11:03:43AM +, Liu, Hongtao via Gcc-patches wrote:
> In simplify_rtx, no simplication occurs, there is just the difference between
> (vec_duplicate (not REG)) and (not (vec_duplicate (REG)). So here tem will
> only be 0.
> Basically we don't know it's a simplication unt
This is a respin of an older series of three patches which I have
merged into one. The new (committed) patch is keeping the obsolete
options int .opt file marking them accrodingly for backwards
compatibility.
Remove the following obsolete options:
- munalign-prob-threshold
- malign-call
- mmixed-c
On Wed, Jun 2, 2021 at 11:27 AM Jeff Law wrote:
> On 6/2/2021 11:09 AM, Jakub Jelinek wrote:
> > When building gcc targetting xtensa-linux, there are 2 warnings the PR
> > complains about:
> > ../../gcc/dwarf2cfi.c: In function ‘void init_one_dwarf_reg_size(int,
> > machine_mode, rtx, machine_mod
This is a regression present on the mainline and 11 branch in the form of a
miscompilation by the new mod/ref IPA pass of code that passes constrained
bit-packed array objets in a call to a subprograms taking unconstrained bit-
packed array parameters, which occurs for predicate on bit-packed array
On 27/05/21 09:50 -0400, Patrick Palka via Libstdc++ wrote:
On Wed, 26 May 2021, Tim Song wrote:
On Wed, May 26, 2021 at 1:43 PM Patrick Palka wrote:
>
> On Wed, 26 May 2021, Tim Song wrote:
> >
> > On Wed, May 26, 2021 at 12:00 PM Patrick Palka via Libstdc++
> > wrote:
> > >
> > > - el
On 14/05/21 14:27 -0400, Patrick Palka via Libstdc++ wrote:
r11-8053 rewrote the range adaptor implementation in conformance with
P2281, making partial application act like a SFINAE-friendly perfect
forwarding call wrapper. Making SFINAE-friendliness coexist with
perfect forwarding here requires
On 6/2/21 6:44 PM, Joseph Myers wrote:
On Wed, 2 Jun 2021, Joel Sherrill wrote:
For RTEMS, we switched from texinfo to Sphinx and the dependency
on Python3 for Sphinx has caused a bit of hassle. Is this going to be
an issue for GCC?
What Sphinx (and, thus, Python) versions does the GCC manual
On 27/05/21 19:37 +0200, François Dumont via Libstdc++ wrote:
We have been talking for a long time of a debug mode with less impact
on performances.
We already have it, that's what _GLIBCXX_ASSERTIONS already is :-)
I propose to simply use the existing _GLIBCXX_ASSERTIONS macro.
libstdc+
Thank you Kewen!!
I will apply this now.
BR,
Andre
On 25/05/2021 09:42, Kewen.Lin wrote:
on 2021/5/24 下午3:21, Kewen.Lin via Gcc-patches wrote:
Hi Andre,
on 2021/5/24 下午2:17, Andre Vieira (lists) via Gcc-patches wrote:
Hi,
When vectorizing with --param vect-partial-vector-usage=1 the vector
On 6/2/21 7:46 PM, Xionghu Luo wrote:
Hi,
On 2021/6/3 06:20, Segher Boessenkool wrote:
On Wed, Jun 02, 2021 at 03:19:32AM -0500, Xionghu Luo wrote:
On P8LE, extra rot64+rot64 load or store instructions are generated
in float128 to vector __int128 conversion.
This patch teaches pass swaps to a
On Thu, Jun 03, 2021 at 05:07:26PM +0800, liuhongt via Gcc-patches wrote:
> @@ -18163,10 +18163,10 @@ (define_expand "v16qiv16si2"
>"TARGET_AVX512F")
>
> (define_insn "avx2_v8qiv8si2"
> - [(set (match_operand:V8SI 0 "register_operand" "=v")
> + [(set (match_operand:V8SI 0 "register_operand
On 6/2/21 6:32 AM, Aldy Hernandez wrote:
We've been having "issues" in our branch when exporting to the global
space ranges that take into account previously known ranges
(SSA_NAME_RANGE_INFO, etc). For the longest time we had the export
feature turned off because it had the potential of remov
On 6/1/21 7:44 PM, Segher Boessenkool wrote:
It would be nice if we had a selector for when we can use -mrop-protect,
instead of assuming it is only for ELFv2.
Agreed -- I'll take a note and try to get to this sometime.
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as 4bdc6e17c9dc621f9502a84abceb2e17ae0418f8.
gcc/ChangeLog:
* diagnostic-show-locus.c (diagnostic_show_locus): Don't reject
printing the same location twice if there are fix-it hints,
multiple lo
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as e84fe25f638efe1ead4304693d91d7555e7a.
gcc/analyzer/ChangeLog:
* svalue.cc (poisoned_svalue::dump_to_pp): Dump type.
(compound_svalue::dump_to_pp): Dump any type.
Signed-off-by: David Malcolm
---
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as 981d98b883ed521c88c295ed82227c605d82add4.
gcc/analyzer/ChangeLog:
* store.h (store::get_direct_binding): Remove unused decl.
(store::get_default_binding): Likewise.
Signed-off-by: David Malcolm
---
Hi José,
Patch tested only on x86_64-pc-linux-gnu.
Also tested on darwin20. The patch is OK for me.
Thanks for the work,
Dominique
On Thu, Jun 03, 2021 at 12:30:50AM +0200, Tobias Burnus wrote:
> This patch adds support for 'omp loop' to gfortran including the combined
> constructs. It also fixes some splitting issues with clauses in
> combined constructs.
>
> It does not attempt to clean up all remaining Fortran issues with
Andrew had some minor suggestions and cleanups after I posted this.
Andrew, is this what you had in mind?
Aldy
On Sat, May 29, 2021 at 6:06 AM Jeff Law wrote:
>
>
>
> On 5/27/2021 2:55 AM, Aldy Hernandez via Gcc-patches wrote:
> > Right now, range_of_expr only works with constants, SSA names, a
On 6/3/21 11:39 AM, Aldy Hernandez via Gcc-patches wrote:
Andrew had some minor suggestions and cleanups after I posted this.
Andrew, is this what you had in mind?
Aldy
On Sat, May 29, 2021 at 6:06 AM Jeff Law wrote:
On 5/27/2021 2:55 AM, Aldy Hernandez via Gcc-patches wrote:
Right now, r
Ping.
Is this OK now?
On 18/04/21 23:45 +0100, Jonathan Wakely wrote:
Remove GNU and FSF attribution from HTML page titles.
I don't see why we should have to "comply with the GNU style" if we're
truly an independent project run by the GCC developers and aided by
the steering committee.
OK f
This works around an irregularity of the language whereby subtypes, unlike
types, are not visible through a limited_with clause.
Tested on x86-64/Linux, applied on the mainline.
2021-06-03 Eric Botcazou
c-family/
* c-ada-spec.c (pp_ada_tree_identifier): Tidy up.
(dump_ada_nod
Ada does not support anonymous record declarations nested in other record
declarations so -fdump-ada-spec needs to unnest them, and this contains a few
fixes for this machinery.
Tested on x86-64/Linux, applied on the mainline.
2021-06-03 Eric Botcazou
c-family/
* c-ada-spec.c (dump
The namespace rules are different in the C family of languages and in Ada, and a
few adjustments are further needed in -fdump-ada-spec because of them.
Tested on x86-64/Linux, applied on the mainline.
2021-06-03 Eric Botcazou
c-family/
* c-ada-spec.c (dump_ada_enum_type): Dump a pref
On 03/06/21 16:50 +0100, Jonathan Wakely wrote:
Ping.
Is this OK now?
On 18/04/21 23:45 +0100, Jonathan Wakely wrote:
Remove GNU and FSF attribution from HTML page titles.
I don't see why we should have to "comply with the GNU style" if we're
truly an independent project run by the GCC deve
> From: Kewen.Lin
> Date: Thu, 3 Jun 2021 07:45:57 +0200
> on 2021/6/2 Hans-Peter Nilsson wrote:
> >> From: Kewen Lin
> >> Date: Wed, 2 Jun 2021 07:04:54 +0200
> >
> >> gcc/ChangeLog:
> >>
> >>* config/cris/cris.md (*addi_reload): Fix empty split condition.
> >> - ""
> >> + "&& 1"
> > O
Ping*2
-- Forwarded message -
From: Aldy Hernandez
Date: Thu, May 13, 2021, 20:02
Subject: Re: [PUSHED] Skip out on processing __builtin_clz when varying.
To: Jakub Jelinek
Cc: GCC patches
On 5/12/21 5:08 PM, Jakub Jelinek wrote:
> On Wed, May 12, 2021 at 05:01:00PM -0400, A
The original operator was underconstrained. _Up needs to fulfill
compare_three_way_result,
as mentioned in this bug report
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98842
diff --git a/libstdc++-v3/include/std/optional
b/libstdc++-v3/include/std/optional
index 8b9e038e6e510..9e61c1b2cbfbd 100644
Hi,
This RFC is motivated by the IV sharing RFC in
https://gcc.gnu.org/pipermail/gcc-patches/2021-May/569502.html and the
need to have the IVOPTS pass be able to clean up IV's shared between
multiple loops. When creating a similar problem with C code I noticed
IVOPTs treated IV's with uses ou
Streams got crossed there and used the wrong subject ...
On 03/06/2021 17:34, Andre Vieira (lists) via Gcc-patches wrote:
Hi,
This RFC is motivated by the IV sharing RFC in
https://gcc.gnu.org/pipermail/gcc-patches/2021-May/569502.html and the
need to have the IVOPTS pass be able to clean up
Forgot to assign to gcc_context.cfa and gcc_context.ra. Note this fix can
be backported to earlier editions of gcc as well
diff --git a/libgcc/unwind-seh.c b/libgcc/unwind-seh.c
index 8c6aade9a3b39..d40d16702a9e1 100644
--- a/libgcc/unwind-seh.c
+++ b/libgcc/unwind-seh.c
@@ -466,6 +466,9 @@ _Unwin
On 6/3/2021 2:00 AM, Segher Boessenkool wrote:
Hi!
On Thu, Jun 03, 2021 at 01:22:38PM +0800, Kewen.Lin wrote:
on 2021/6/3 上午7:52, Segher Boessenkool wrote:
- add a new "define_independent_insn_and_split" that has the
current semantics of define_insn_and_split. This should be
mechanic
On Thu, 3 Jun 2021, Martin Liška wrote:
> On 6/2/21 6:44 PM, Joseph Myers wrote:
> > On Wed, 2 Jun 2021, Joel Sherrill wrote:
> >
> > > For RTEMS, we switched from texinfo to Sphinx and the dependency
> > > on Python3 for Sphinx has caused a bit of hassle. Is this going to be
> > > an issue for G
Hi!
On Thu, May 20, 2021 at 05:49:49PM +0800, HAO CHEN GUI wrote:
> rs6000 has instructions that can do almost everything 32 bit
> at least as efficiently as corresponding 64 bit things. The
> mode promotion can be defered to when a wide mode is necessary.
> So it helps a l
On 6/2/21 12:33 PM, Koning, Paul wrote:
On Jun 2, 2021, at 11:03 AM, Jason Merrill via Gcc-patches
wrote:
On 6/1/21 3:22 PM, Richard Biener via Gcc wrote:
On June 1, 2021 7:30:54 PM GMT+02:00, David Malcolm via Gcc
wrote:
...
The MAINTAINERS file doesn't seem to have such a "DCO list"
On Wed, Jun 02, 2021 at 07:27:35PM -0500, Segher Boessenkool wrote:
> On Wed, Jun 02, 2021 at 05:13:15PM -0500, Paul A. Clarke wrote:
> > Add a naive implementation of the subject x86 intrinsic to
> > ease porting.
>
> > +/* Return horizontal packed word minimum and its index in bits [15:0]
> > +
On Wed, Jun 02, 2021 at 08:50:56PM -0500, Segher Boessenkool wrote:
> On Wed, Jun 02, 2021 at 05:13:16PM -0500, Paul A. Clarke wrote:
> > + for (i = 0; i < NUM; i++)
> > +src.s[i] = i * i - 68 * i + 1200;
>
> Could you do tests with some identical elements as well? Because that
> is where I
Here, we're rejecting the specialization of g with T=A, F=&f in the
first testcase due to a spurious constness mismatch between the type of
the template argument &f and the substituted type of F (the substituted
type has a top-level const). Note that this mismatch doesn't occur with
object pointer
The patch introduces insert and extract patterns for 4-byte vectors.
It effectively only emits PINSR and PEXTR instructions when available,
otherwise falls back to generic code that emulates these instructions
via inserts, extracts, logic operations and shifts in integer registers.
Please note tha
On Thu, 3 Jun 2021, Patrick Palka wrote:
> Here, we're rejecting the specialization of g with T=A, F=&f in the
> first testcase due to a spurious constness mismatch between the type of
> the template argument &f and the substituted type of F (the substituted
> type has a top-level const). Note th
This patch optimizes and simplifies many of the standard string functions.
Since C99, some of the standard string functions have been changed to use
the restrict modifier.
diff --git a/libgcc/memcmp.c b/libgcc/memcmp.c
index 2348afe1d27f7..74195cf6baf13 100644
--- a/libgcc/memcmp.c
+++ b/libgcc/m
On 6/2/2021 4:43 PM, Segher Boessenkool wrote:
Hi!
On Wed, Jun 02, 2021 at 06:07:28PM +0100, Richard Sandiford wrote:
Segher Boessenkool writes:
Since times immemorial there has been const_int_rtx for all values from
-64 to 64, but only constm1_rtx..const2_rtx have been available for
conve
On Thu, Jun 03, 2021 at 11:03:43AM +, Liu, Hongtao wrote:
> >A very typical example is how UMIN is optimised:
> >
> > case UMIN:
> > if (trueop1 == CONST0_RTX (mode) && ! side_effects_p (op0))
> > return op1;
> > if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
> >
Hi, Richard,
For the following, I need more clarification:
+/* Expand the IFN_DEFERRED_INIT function according to its second
argument. */
+static void
+expand_DEFERRED_INIT (internal_fn, gcall *stmt)
+{
+ tree var = gimple_call_lhs (stmt);
+ tree init = NULL_TREE;
+ enum auto_init_type init
Hi!
On Thu, Jun 03, 2021 at 08:46:46AM +0800, Xionghu Luo wrote:
> On 2021/6/3 06:20, Segher Boessenkool wrote:
> > On Wed, Jun 02, 2021 at 03:19:32AM -0500, Xionghu Luo wrote:
> >> On P8LE, extra rot64+rot64 load or store instructions are generated
> >> in float128 to vector __int128 conversion.
Hi, Richard,
On May 26, 2021, at 6:18 AM, Richard Biener
mailto:rguent...@suse.de>> wrote:
On Wed, 12 May 2021, Qing Zhao wrote:
Hi,
This is the 3rd version of the patch for the new security feature for GCC.
Please take look and let me know your comments and suggestions.
+/* Returns true w
On Thu, Jun 03, 2021 at 08:09:36AM -0500, Bill Schmidt wrote:
> Note also that swap optimization can handle more general cases than
> simplify-rtx.
Do you have examples? That should be fixed (unless it is something
Power-specific?)
> In my view it's best to have it covered in both places.
Oh c
*PING*
> Gesendet: Donnerstag, 27. Mai 2021 um 22:20 Uhr
> Von: "Harald Anlauf"
> An: "fortran" , "gcc-patches"
> Betreff: [PATCH] PR fortran/99839 - [9/10/11/12 Regression] ICE in
> inline_matmul_assign, at fortran/frontend-passes.c:4234
>
> Dear Fortranners,
>
> frontend optimization tries to
On 6/3/21 5:00 AM, Jakub Jelinek wrote:
Hi!
The following testcase FAILs because a dependent (late) attribute is never
tsubsted. While the testcase is OpenMP, I think it is a generic C++ FE problem
that could affect any other dependent attribute.
apply_late_template_attributes documents that i
On Thu, Jun 03, 2021 at 02:49:15PM +0800, Xionghu Luo wrote:
> If remove the rotate in simplify-rtx like below:
>
> +++ b/gcc/simplify-rtx.c
> @@ -3830,10 +3830,16 @@ simplify_context::simplify_binary_operation_1
> (rtx_code code,
> case ROTATE:
>if (trueop1 == CONST0_RTX (mode))
>
On 6/3/21 3:19 PM, Segher Boessenkool wrote:
On Thu, Jun 03, 2021 at 08:09:36AM -0500, Bill Schmidt wrote:
Note also that swap optimization can handle more general cases than
simplify-rtx.
Do you have examples? That should be fixed (unless it is something
Power-specific?)
It is Power-specifi
On 6/3/21 2:40 PM, Patrick Palka wrote:
On Thu, 3 Jun 2021, Patrick Palka wrote:
Here, we're rejecting the specialization of g with T=A, F=&f in the
first testcase due to a spurious constness mismatch between the type of
the template argument &f and the substituted type of F (the substituted
ty
These were only enabled for embedded elf originally because that was
the safe option, and linux had no obvious use for them. But now that
we have new extensions coming like V that affect process state and ABIs,
the attributes are expected to be useful for linux, and may be required
by the psABI.
On Thu, 03 Jun 2021 13:55:40 PDT (-0700), Jim Wilson wrote:
These were only enabled for embedded elf originally because that was
the safe option, and linux had no obvious use for them. But now that
we have new extensions coming like V that affect process state and ABIs,
the attributes are expect
On Thu, Jun 03, 2021 at 11:25:49AM +0100, Richard Sandiford wrote:
> We shouldn't just add "&&" to all define_insn_and_splits that currently
> lack them.
My previous post shows that this *already* is required.
> IMO it's not reasonable to ask Kewen to do that for all ports. So the
> process I su
On Thu, Jun 03, 2021 at 04:25:44PM -0500, Segher Boessenkool wrote:
> If we could just start all over we could do it perfectly (but see
> second-system syndrome, heh). But we cannot. IMO we should especially
> avoid everything that uses new semantics for old syntax.
Agreed, that would be a night
On Thu, Jun 03, 2021 at 11:11:53AM -0600, Jeff Law wrote:
> On 6/3/2021 2:00 AM, Segher Boessenkool wrote:
> >The whole point of requiring the split condition to start with && is so
> >it will become harder to mess things up (it will make the gen* code a
> >tiny little bit simpler as well). And th
> From: Hans-Peter Nilsson
> CC: "gcc-patches@gcc.gnu.org"
> Date: Thu, 3 Jun 2021 18:12:25 +0200
> I'd
> prefer to have the patch above committed sooner than the
> conclusion of that discussion. (If you don't get to it,
> I'll do it, after a round of testing.)
Done; no regressions.
brgds, H-
On Thu, Jun 3, 2021 at 12:39 AM Uros Bizjak wrote:
>
> On Thu, Jun 3, 2021 at 5:49 AM H.J. Lu wrote:
> >
> > Update move expanders to convert the CONST_WIDE_INT operand to vector
> > broadcast from a byte with AVX2. Add ix86_gen_scratch_sse_rtx to
> > return a scratch SSE register which won't in
At Richard Biener's suggestion, this patch undoes the following patch:
https://gcc.gnu.org/pipermail/gcc-patches/2021-June/571712.html
and moves the stripping of ARRAY_REFS/INDIRECT_REFS out of
extract_base_bit_offset and back into the (two) call sites of the
function. The difference between th
On Thu, Jun 03, 2021 at 05:07:22PM +0200, Jakub Jelinek via Gcc-patches wrote:
> I think best would be just to remove that part of the testcase
> in the loop patch and handle the !$omp with !$acc continuations
> and vice versa in a separate change. That seems to be a preexisting
> bug not really r
On Thu, Jun 03, 2021 at 01:32:54PM -0600, Jeff Law wrote:
> On 6/2/2021 4:43 PM, Segher Boessenkool wrote:
> >We have has const0_rtx etc. since forever, this patch just increases the
> >range (to those values that have had guaranteed unique RTXes since
> >decades as well).
> Yea, but often what you
On Wed, 2 Jun 2021, Gerald Pfeifer wrote:
> On Tue, 1 Jun 2021, Segher Boessenkool wrote:
> > We haven't had Sender: for a while now.
>
> "a while now" was about four(?) hours when you sent that yesterday. :-)
>
> I know since I still had been using that and was looking for all my
> missing gcc-re
>-Original Message-
>From: Jakub Jelinek
>Sent: Thursday, June 3, 2021 9:49 PM
>To: Liu, Hongtao
>Cc: gcc-patches@gcc.gnu.org
>Subject: Re: [PATCH] [i386] Fix ICE of insn does not satisfy its constraints.
>
>On Thu, Jun 03, 2021 at 05:07:26PM +0800, liuhongt via Gcc-patches wrote:
>> @@
On Fri, Jun 4, 2021 at 5:20 AM Palmer Dabbelt wrote:
>
> On Thu, 03 Jun 2021 13:55:40 PDT (-0700), Jim Wilson wrote:
> > These were only enabled for embedded elf originally because that was
> > the safe option, and linux had no obvious use for them. But now that
> > we have new extensions coming
On 2021/6/4 04:31, Segher Boessenkool wrote:
> On Thu, Jun 03, 2021 at 02:49:15PM +0800, Xionghu Luo wrote:
>> If remove the rotate in simplify-rtx like below:
>>
>> +++ b/gcc/simplify-rtx.c
>> @@ -3830,10 +3830,16 @@ simplify_context::simplify_binary_operation_1
>> (rtx_code code,
>> cas
Hi,
On 2021/6/3 21:09, Bill Schmidt wrote:
> On 6/2/21 7:46 PM, Xionghu Luo wrote:
>> Hi,
>>
>> On 2021/6/3 06:20, Segher Boessenkool wrote:
>>> On Wed, Jun 02, 2021 at 03:19:32AM -0500, Xionghu Luo wrote:
On P8LE, extra rot64+rot64 load or store instructions are generated
in float128 t
On 2021/6/4 04:16, Segher Boessenkool wrote:
> Hi!
>
> On Thu, Jun 03, 2021 at 08:46:46AM +0800, Xionghu Luo wrote:
>> On 2021/6/3 06:20, Segher Boessenkool wrote:
>>> On Wed, Jun 02, 2021 at 03:19:32AM -0500, Xionghu Luo wrote:
On P8LE, extra rot64+rot64 load or store instructions are gen
>-Original Message-
>From: Segher Boessenkool
>Sent: Friday, June 4, 2021 4:00 AM
>To: Liu, Hongtao
>Cc: Richard Biener ; GCC Patches patc...@gcc.gnu.org>
>Subject: Re: [PATCH] Canonicalize (vec_duplicate (not A)) to (not
>(vec_duplicate A)).
>
>On Thu, Jun 03, 2021 at 11:03:43AM +
Ping,
This is a splitted middle-end patch as a follow up of
https://gcc.gnu.org/pipermail/gcc-patches/2021-June/571544.html
On Thu, Jun 3, 2021 at 2:54 PM liuhongt via Gcc-patches
wrote:
>
> Use "used" flag for CALL_INSN to indicate it's a fake call. If it's a
> fake call, it won't have its own f
Ping
This is a splitted backend patch as a follow up of
https://gcc.gnu.org/pipermail/gcc-patches/2021-June/571545.html
On Thu, Jun 3, 2021 at 2:55 PM liuhongt via Gcc-patches
wrote:
>
> When __builtin_ia32_vzeroupper is called explicitly, the corresponding
> vzeroupper pattern does not carry an
Hi Segher,
on 2021/6/3 下午5:18, Segher Boessenkool wrote:
> On Thu, Jun 03, 2021 at 03:00:44AM -0500, Segher Boessenkool wrote:
>> On Thu, Jun 03, 2021 at 01:22:38PM +0800, Kewen.Lin wrote:
>> The whole point of requiring the split condition to start with && is so
>> it will become harder to mess t
on 2021/6/4 上午12:12, Hans-Peter Nilsson wrote:
>> From: Kewen.Lin
>> Date: Thu, 3 Jun 2021 07:45:57 +0200
>
>> on 2021/6/2 Hans-Peter Nilsson wrote:
From: Kewen Lin
Date: Wed, 2 Jun 2021 07:04:54 +0200
>>>
gcc/ChangeLog:
* config/cris/cris.md (*addi_reload): Fix empty
on 2021/6/3 下午4:05, Richard Sandiford wrote:
> "Kewen.Lin" writes:
>> Hi Richi/Richard/Jeff/Segher,
>>
>> Thanks for the comments!
>>
>> on 2021/6/3 锟斤拷锟斤拷7:52, Segher Boessenkool wrote:
>>> On Wed, Jun 02, 2021 at 06:32:13PM +0100, Richard Sandiford wrote:
Richard Biener writes:
> So wh
Here, when instantiating the dependent alias template
duration::__is_harmonic with args={{T,U},{int}}, we find ourselves
substituting the function decl _S_gcd. Since we have more arg levels
than _S_gcd has parm levels, an old special case in tsubst_function_decl
causes us to unwantedly reduce args
On Tue, Jun 1, 2021 at 6:17 PM Marc Glisse wrote:
>
> On Tue, 1 Jun 2021, Hongtao Liu via Gcc-patches wrote:
>
> > Hi:
> > This patch is about to simplify (view_convert:type ~a) < 0 to
> > (view_convert:type a) >= 0 when type is signed integer. Similar for
> > (view_convert:type ~a) >= 0.
> > Bo
ping
On Mon, May 24, 2021 at 12:56 PM Hongtao Liu wrote:
>
> Hi:
> This patch is about to Fold __builtin_ia32_pblendvb128 (a, b, c) as
> VEC_COND_EXPR (c < 0, b, a), similar for float version but with
> mask operand VIEW_CONVERT_EXPR to same sized integer vectype.
>
> After folding, blendv re
On Fri, Jun 4, 2021 at 12:39 AM H.J. Lu wrote:
>
> On Thu, Jun 3, 2021 at 12:39 AM Uros Bizjak wrote:
> >
> > On Thu, Jun 3, 2021 at 5:49 AM H.J. Lu wrote:
> > >
> > > Update move expanders to convert the CONST_WIDE_INT operand to vector
> > > broadcast from a byte with AVX2. Add ix86_gen_scrat
On Thu, Jun 3, 2021 at 8:54 AM liuhongt wrote:
>
> When __builtin_ia32_vzeroupper is called explicitly, the corresponding
> vzeroupper pattern does not carry any CLOBBERS or SETs before LRA,
> which leads to incorrect optimization in pass_reload. In order to
> solve this problem, this patch refine
On Fri, Jun 4, 2021 at 2:27 PM Uros Bizjak via Gcc-patches
wrote:
>
> On Thu, Jun 3, 2021 at 8:54 AM liuhongt wrote:
> >
> > When __builtin_ia32_vzeroupper is called explicitly, the corresponding
> > vzeroupper pattern does not carry any CLOBBERS or SETs before LRA,
> > which leads to incorrect o
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