On 07/11/17 19:26 +0200, Andris Pavenis wrote:
src/filesystem/ops-common.c uses S_ISSOCK unconditionally without checking that
it is available
As result compile fails for DJGPP when S_ISREG is available but
S_ISSOCK is not. Included patch add configure check for S_ISSOCK
Andris
ChangeLog en
On 11/07/2017 06:15 PM, Andreas Schwab wrote:
This breaks g++.dg/torture/pr64669.C with -O3 on ia64:
$ gcc/xg++ -Bgcc/ ../../gcc/gcc/testsuite/g++.dg/torture/pr64669.C -nostdinc++
-Iia64-suse-linux/libstdc++-v3/include/ia64-suse-linux
-Iia64-suse-linux/libstdc++-v3/include -I../libstdc++-v3/li
On 11/07/2017 08:28 PM, Jonathan Wakely wrote:
On 07/11/17 19:26 +0200, Andris Pavenis wrote:
src/filesystem/ops-common.c uses S_ISSOCK unconditionally without checking that
it is available
As result compile fails for DJGPP when S_ISREG is available but S_ISSOCK is not. Included patch
add con
Hello!
New register allocator alternative decorations allows us to not
penalize alternatives *unless* reload is required. The '$' is
described as:
'$'
This constraint is analogous to '!' but it disparages severely the
alternative only if the operand with the '$' needs a reload.
and fit
On 07/11/17 21:00 +0200, Andris Pavenis wrote:
On 11/07/2017 08:28 PM, Jonathan Wakely wrote:
On 07/11/17 19:26 +0200, Andris Pavenis wrote:
src/filesystem/ops-common.c uses S_ISSOCK unconditionally without checking that
it is available
As result compile fails for DJGPP when S_ISREG is availa
Hello Julia!
On 03 Nov 17:42, Koval, Julia wrote:
> Here is the solution I propose:
>
> gcc/
> * common/config/i386/i386-common.c
> (OPTION_MASK_ISA_GENERAL_REGS_ONLY_UNSET): Remove MPX from flag.
> (ix86_handle_option): Move MPX to isa_flags2 and GFNI to isa_flags.
> * con
On November 7, 2017 7:21:17 PM GMT+01:00, Jason Merrill
wrote:
>On Tue, Nov 7, 2017 at 3:14 AM, Richard Biener
>wrote:
>> On Mon, 6 Nov 2017, Jason Merrill wrote:
>>
>>> On Mon, Nov 6, 2017 at 10:37 AM, Marek Polacek
>wrote:
>>> > On Fri, Nov 03, 2017 at 12:19:05PM -0400, Jason Merrill wrote:
>
On Tue, Nov 07, 2017 at 08:26:15PM +0200, Janne Blomqvist wrote:
> Earlier GFortran used to redefine boolean_type_node, which in the rest
> of the compiler means the C/C++ _Bool/bool type, to the Fortran
> default logical type. When this redefinition was removed, a few
> issues surfaced. Namely,
>
On Tue, Nov 7, 2017 at 10:06 PM, Steve Kargl
wrote:
> On Tue, Nov 07, 2017 at 08:26:15PM +0200, Janne Blomqvist wrote:
>> Earlier GFortran used to redefine boolean_type_node, which in the rest
>> of the compiler means the C/C++ _Bool/bool type, to the Fortran
>> default logical type. When this re
Sorry, it was the wrong patch. Here is the right one.
François
On 06/11/2017 22:17, François Dumont wrote:
Hi
I just committed this as trivial to avoid test to be considered as
unsupported.
Looks like gcc made improvements in optimizations to have this test
now unsuported.
Tested under
* Claudiu Zissulescu [2017-11-02 13:00:09
+0100]:
> This is patch which solves the ARC issues with exception handling support.
>
> Ok to apply?
Mostly OK, my only comment is about the comments! There's a couple of
places where the comments are phrased in terms of "this commit" and
"see change
Hi!
Apparently for methods convert_default_arg index should be counted from
after the this argument rather than including that; the new pt.c code
now ICEs if we pass a wrong index.
Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux,
committed to trunk.
2017-11-07 Jakub Jelinek
So this is the first step in pulling apart tree-vrp.c. As outlined in
an earlier message the goal of this patch is just to get the vr_values
class introduced. I've tried (and mostly succeeded) in avoiding doing
significant cleanups/rewrites at this point to make reviewing this step
easier.
The v
On Tue, Nov 7, 2017 at 2:40 PM, Richard Biener wrote:
> On November 7, 2017 7:21:17 PM GMT+01:00, Jason Merrill
> wrote:
>>On Tue, Nov 7, 2017 at 3:14 AM, Richard Biener
>>wrote:
>>> On Mon, 6 Nov 2017, Jason Merrill wrote:
>>>
On Mon, Nov 6, 2017 at 10:37 AM, Marek Polacek
>>wrote:
On Tue, Nov 07, 2017 at 10:38:43PM +0200, Janne Blomqvist wrote:
> On Tue, Nov 7, 2017 at 10:06 PM, Steve Kargl
> wrote:
> > On Tue, Nov 07, 2017 at 08:26:15PM +0200, Janne Blomqvist wrote:
> >> +
> >> + logical_type_node = gfc_get_logical_type (4);
> >
> > Can you add a comment to note that the
Hello world,
attached is a very incomplete patch for implementing
maxloc for character variables, which shows some detail
of the implementation. The very simple test program
program main
character(len=3), dimension(3) :: a
character(kind=4,len=1), dimension(2,2) :: b
a(1) = '1'
a(2) = '2
On 11/07/2017 10:31 AM, Boris Kolpackov wrote:
2017-11-07 Boris Kolpackov
* Make-lang.in (CP_PLUGIN_HEADERS): Add operators.def since included
in cp-tree.h.
Applied, thanks.
--
Nathan Sidwell
From: Kito Cheng
- This build error was indroduced by "RISC-V: Implement movmemsi"
and "RISC-V: Support -mpreferred-stack-boundary flag"
gcc/ChangeLog
2017-11-07 Kito Cheng
* config/riscv/riscv-protos.h (riscv_slow_unaligned_access_p):
New extern.
(MOVE_RATIO):
On Sat, Nov 4, 2017 at 3:07 AM, Gerald Pfeifer wrote:
> On Fri, 6 Oct 2017, Ian Lance Taylor wrote:
>> Thanks for the report. I committed this patch, which I hope will fix
>> the problem.
>
>> * ztest.c (test_large): Pass unsigned long *, not size_t *, to
>> zlib uncompress function.
>
> Thank yo
Some old Solaris libcs don't like being passed a NULL pointer as the string
parameter corresponding to the %s marker of formatting functions.
Fixed thusly, tested on SPARC/Solaris, applied on the mainline as obvious.
2017-11-07 Eric Botcazou
* gimple-pretty-print.c (dump_profile): R
On 11/07/2017 03:18 AM, Richard Biener wrote:
On Tue, Nov 7, 2017 at 4:23 AM, Martin Sebor wrote:
On 11/06/2017 11:41 AM, Jeff Law wrote:
On 10/29/2017 10:15 AM, Martin Sebor wrote:
Ping -- please see my reply below.
On 10/20/2017 09:57 AM, Richard Biener wrote:
get_addr_base_and_unit_of
The following commit added the FL_LPAE flag to FL_FOR_ARCH7VE, but
neglected to also add it to the armv7ve compatible cores defined in
arm-cores.def.
https://github.com/gcc-mirror/gcc/commit/af2d9b9e58e8be576c53d94f30c48c68146b0c98
The result is that gcc 6.4 now refuses to allow -march=armv7ve
The following commit added the FL_LPAE flag to FL_FOR_ARCH7VE, but
neglected to also add it to the armv7ve compatible cores defined in
arm-cores.def.
https://github.com/gcc-mirror/gcc/commit/af2d9b9e58e8be576c53d94f30c48c68146b0c98
The result is that gcc 6.4 now refuses to allow -march=armv7ve
Hello.
Quite simple patch that ignores IFN_ASAN_CHECK call that is introduced in
gimplifier.
Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.
Ready to be installed?
Martin
gcc/ChangeLog:
2017-11-07 Martin Liska
PR sanitizer/82792
* gimplify.c (expa
Hello.
Assert removal is logical as it's used in iteration and if sbitmap is empty,
iteration
macro will not touch any element of a bitmap.
Ready after it survives regression tests?
Thanks,
Martin
gcc/ChangeLog:
2017-11-08 Martin Liska
PR tree-optimization/82669
* sbitmap.
Hello.
This is simple fix of SI units.
I'm going to install it.
Martin
contrib/ChangeLog:
2017-11-08 Martin Liska
* analyze_brprob.py: Fix abbreviations for SI units.
---
contrib/analyze_brprob.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/contrib/analyze_
Hi!
The upstream libubsan in the name of behaving more similarly between
all the other sanitizers turned the library from a lightweight set of a few
helper routines that print errors if something goes wrong into yet another
library that overrides various functions.
In particular, it now overrides
On Wed, Nov 08, 2017 at 08:07:42AM +0100, Martin Liška wrote:
> Hello.
>
> Quite simple patch that ignores IFN_ASAN_CHECK call that is introduced in
> gimplifier.
> Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.
>
> Ready to be installed?
> Martin
>
> gcc/ChangeLog:
On Nov 07 2017, Jakub Jelinek wrote:
> On Tue, Nov 07, 2017 at 06:27:52PM +0100, Andreas Schwab wrote:
>> * g++.dg/pr50763-3.C (evalPoint): Return a value.
>
> http://gcc.gnu.org/ml/gcc-patches/2017-11/msg00407.html
> (waiting for review)
Sorry, I missed that.
Andreas.
--
Andreas Schwab,
On Mon, 6 Nov 2017, Jason Merrill wrote:
> On Mon, Nov 6, 2017 at 10:37 AM, Marek Polacek wrote:
> > On Fri, Nov 03, 2017 at 12:19:05PM -0400, Jason Merrill wrote:
> >> On Fri, Nov 3, 2017 at 9:55 AM, Marek Polacek wrote:
> >> > + TYPE_EMPTY_P (t) = targetm.calls.empty_record_p (t);
> >>
> >> I
Hi,
this patch removes a semicolon after "do {} while (0)" in
FP_HANDLE_EXCEPTIONS. This allows the macro to be used in if-then-elses
without curly braces.
Bootstrapped and reg-tested on x86_64.
Committed as obvious.
Thanks,
- Tom
[libgcc] Remove semicolon after do {} while (0) in FP_HANDLE
On Mon, Nov 06, 2017 at 11:45:37PM +0100, Uros Bizjak wrote:
> On Mon, Nov 6, 2017 at 10:23 PM, Jakub Jelinek wrote:
> > Hi!
> >
> > Without the following patch we emit kmovb %k1, %eax; testb %al, %al
> > when if just testing the Zero bit we can as well do ktestb %k1, %k1.
> >
> > Bootstrapped/reg
On Tue, 7 Nov 2017, Kumar, Venkataramanan wrote:
The attached patch implements an RTL pass which splits generated FMA
instruction into MUL/ADD sequence.
That seems wrong if the user explicitly asked for FMA in his program, unless
you have a way to recognize which FMA instructions come from use
Hi,
this patch removes a semicolon after "while {} do (0)" in
HANDLE_NARROW_SHIFT_ARITH. This allows the macro to be used in
if-then-elses without curly braces.
Build arm compiler.
Committed as obvious.
Thanks,
- Tom
[arm] Remove semicolon after while {} do (0) in HANDLE_NARROW_SHIFT_ARITH
On Tue, Nov 7, 2017 at 8:41 AM, Jakub Jelinek wrote:
> On Mon, Nov 06, 2017 at 11:27:27PM +0100, Uros Bizjak wrote:
>> On Mon, Nov 6, 2017 at 10:18 PM, Jakub Jelinek wrote:
>> > Hi!
>> >
>> > As this patch shows, we have tons of ix86_binary_operator_ok calls
>> > in sse.md patterns, but I believe
On Tue, Nov 7, 2017 at 9:18 AM, Jakub Jelinek wrote:
> On Mon, Nov 06, 2017 at 11:45:37PM +0100, Uros Bizjak wrote:
>> On Mon, Nov 6, 2017 at 10:23 PM, Jakub Jelinek wrote:
>> > Hi!
>> >
>> > Without the following patch we emit kmovb %k1, %eax; testb %al, %al
>> > when if just testing the Zero bi
Hi,
this patch removes a semicolon after "do {} while (0)" in
REGISTER_CFA_OFFSET_FOR (no ChangeLog yet).
Can you build & test this patch (or approve as trivial)?
Thanks,
- Tom
[libgcc, rs6000] Remove semicolon after do {} while (0) in REGISTER_CFA_OFFSET_FOR
---
libgcc/config/rs6000/aix-un
Hi,
this patch removes a semicolon after "do {} while (0)" in
SUBTARGET_OVERRIDE_OPTIONS (no ChangeLog yet).
Can you build & test this patch (or approve as trivial)?
Thanks,
- Tom
[powerpcspe, rs6000] Remove semicolon after do {} while (0) in SUBTARGET_OVERRIDE_OPTIONS
---
gcc/config/powerp
Hi!
On Tue, Nov 07, 2017 at 09:50:45AM +0100, Tom de Vries wrote:
> this patch removes a semicolon after "do {} while (0)" in
> REGISTER_CFA_OFFSET_FOR (no ChangeLog yet).
>
> Can you build & test this patch (or approve as trivial)?
It's trivial and obvious; go ahead and commit it. Thanks,
S
On Tue, Nov 07, 2017 at 09:55:39AM +0100, Tom de Vries wrote:
> this patch removes a semicolon after "do {} while (0)" in
> SUBTARGET_OVERRIDE_OPTIONS (no ChangeLog yet).
>
> Can you build & test this patch (or approve as trivial)?
The rs6000 parts are okay for trunk (I'll take all blame if it b
On 11/07/2017 09:55 AM, Tom de Vries wrote:
Hi,
this patch removes a semicolon after "do {} while (0)" in
SUBTARGET_OVERRIDE_OPTIONS (no ChangeLog yet).
Can you build & test this patch (or approve as trivial)?
Hi,
Can you build & test the powerpcspe part of this patch (or approve as
triv
On 06/11/17 20:08, Richard Sandiford wrote:
> Some of the shift expanders accepted nonmemory_operands but were only
> able to handle register_operands or CONST_INTs. This is probably
> academic without SVE, since we're not likely to see shifts by other
> types of constant (const_wide_ints, consts,
On Mon, Nov 6, 2017 at 6:01 PM, Jeff Law wrote:
>
>
> So I spent a fair amount of time over the weekend trying to figure out
> how to stage in the vrp cleanups. I don't want to drop a massive
> unreviewable kit on everyone. It's hard on the reviewers and its hard
> on me too -- with stuff moving
On Mon, Nov 6, 2017 at 8:19 PM, Marc Glisse wrote:
> On Mon, 6 Nov 2017, Richard Sandiford wrote:
>
>> fold_binary_loc assumed that if the type of the result wasn't a vector,
>> the operands wouldn't be either. This isn't necessarily true for
>> EQ_EXPR and NE_EXPR of vector masks, which can retu
On 07/11/17 08:19, Tom de Vries wrote:
Hi,
this patch removes a semicolon after "while {} do (0)" in
HANDLE_NARROW_SHIFT_ARITH. This allows the macro to be used in
if-then-elses without curly braces.
Build arm compiler.
Committed as obvious.
Thanks for fixing this Tom.
Kyrill
Thanks,
-
On Tue, Nov 07, 2017 at 09:28:54AM +0100, Uros Bizjak wrote:
> Yes, I am aware that ix86_binary_operator_ok (and corresponding
> expander fixup) is way too complex for SSE patterns, but until AVX,
> this function handled all patterns in an universal way. Please also
> note, that the intention of th
On Mon, Nov 6, 2017 at 9:12 PM, Richard Sandiford
wrote:
> initialize_matrix_A requires the CHREC_RIGHT to be an INTEGER_CST:
>
> switch (TREE_CODE (chrec))
> {
> case POLYNOMIAL_CHREC:
> A[index][0] = mult * int_cst_value (CHREC_RIGHT (chrec));
> return initialize_matrix_A (
On Mon, Nov 6, 2017 at 10:35 PM, Marc Glisse wrote:
> Hello,
>
> those have been on my TODO-list for a long time (found in LLVM IIRC). We
> were not doing any of those transformations, even in GENERIC, so nothing to
> remove from fold-const.c. The idea is that any expression involving only 2
> var
On Tue, Nov 7, 2017 at 10:58 AM, Jakub Jelinek wrote:
> On Tue, Nov 07, 2017 at 09:28:54AM +0100, Uros Bizjak wrote:
>> Yes, I am aware that ix86_binary_operator_ok (and corresponding
>> expander fixup) is way too complex for SSE patterns, but until AVX,
>> this function handled all patterns in an
On 11/06/2017 06:33 PM, Jakub Jelinek wrote:
> On Mon, Nov 06, 2017 at 06:23:11PM +0100, Eric Botcazou wrote:
>>> Thank you for review, done that.
>>
>> This has enabled -Wreturn-type for Ada, what we don't want since the warning
>> is outsmarted by the language, so I have applied this.
>>
>>
>> 2
On Tue, Nov 07, 2017 at 09:40:31AM +0100, Uros Bizjak wrote:
> > -a1 (r93,l0) best MASK_EVEX_REGS, allocno MASK_EVEX_REGS
> > +a1 (r93,l0) best GENERAL_REGS, allocno GENERAL_REGS
> >
> > - a1(r93,l0) costs: AREG:2000,2000 DREG:2000,2000 CREG:2000,2000
> > BREG:2000,2000 SIREG:2000,2000 DI
On Tue, Nov 7, 2017 at 4:23 AM, Martin Sebor wrote:
> On 11/06/2017 11:41 AM, Jeff Law wrote:
>>
>> On 10/29/2017 10:15 AM, Martin Sebor wrote:
>>>
>>> Ping -- please see my reply below.
>>>
>>> On 10/20/2017 09:57 AM, Richard Biener wrote:
get_addr_base_and_unit_offset will retu
On Mon, Nov 6, 2017 at 4:09 PM, Richard Sandiford
wrote:
> Richard Biener writes:
>> On Mon, Oct 23, 2017 at 1:20 PM, Richard Sandiford
>> wrote:
>>> SVE needs a way of broadcasting a scalar to a variable-length vector.
>>> This patch adds VEC_DUPLICATE_CST for when VECTOR_CST would be used for
On Tue, Nov 7, 2017 at 11:10 AM, Jakub Jelinek wrote:
>> > Isn't it sufficient that moves disparage slightly the k alternatives?
>> > Or are you worried about the case where the pseudo would need to be spilled
>> > and LRA would choose to reload it into a %kN register?
>>
>> The later... Perhaps
On Mon, Nov 6, 2017 at 4:21 PM, Richard Sandiford
wrote:
> Richard Biener writes:
>> On Thu, Oct 26, 2017 at 2:23 PM, Richard Biener
>> wrote:
>>> On Mon, Oct 23, 2017 at 1:20 PM, Richard Sandiford
>>> wrote:
Similarly to the VEC_DUPLICATE_{CST,EXPR}, this patch adds two
tree code equ
On Sat, Nov 4, 2017 at 10:58 AM, Marc Glisse wrote:
> Hello,
>
> this copies some more transformations from fold_negate_expr to match.pd.
> Mostly, I wanted to add (negate (pointer_diff @0 @1)), and couldn't find the
> corresponding transformation with minus_expr... We can see about
> generalizing
Hi Tom,
On 07/11/2017 09:07, Tom de Vries wrote:
On 11/07/2017 09:55 AM, Tom de Vries wrote:
Hi,
this patch removes a semicolon after "do {} while (0)" in
SUBTARGET_OVERRIDE_OPTIONS (no ChangeLog yet).
Can you build & test this patch (or approve as trivial)?
Hi,
Can you build & test the
On Fri, Nov 3, 2017 at 1:35 PM, Bin Cheng wrote:
> Hi,
> This is a simple patch exploiting more undefined pointer overflow behavior in
> loop niter analysis. Originally, it only supports POINTER_PLUS_EXPR if the
> offset part is IV. This patch also handles the case if pointer is IV. With
> this
On Fri, Nov 3, 2017 at 1:39 PM, Bin Cheng wrote:
> Hi,
> When fixing PR70754, I thought the issue only happens for ZERO-length chains.
> Well, that's apparently not true with PR82726.
> The whole story is, with chain combination/re-association, new stmts may be
> created/inserted at position not d
On Tue, Nov 07, 2017 at 11:21:15AM +0100, Uros Bizjak wrote:
> On Tue, Nov 7, 2017 at 11:10 AM, Jakub Jelinek wrote:
>
> >> > Isn't it sufficient that moves disparage slightly the k alternatives?
> >> > Or are you worried about the case where the pseudo would need to be
> >> > spilled
> >> > and
Hello.
This is patch that does not print unexecuted blocks for Ada language.
Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.
And Eric reported that he tested that.
Ready to be installed?
Martin
>From 127e6e644f0a8014e429f51bee607ad9372180d0 Mon Sep 17 00:00:00 2001
From
Hello.
This is slightly updated version from the previous. Various small issues were
fixed
and I update documentation in order to reflect the changes.
Ready to be installed?
Thanks,
Martin
>From 5af7859e0d58d460f37c0b607adbf3c9ca927025 Mon Sep 17 00:00:00 2001
From: marxin
Date: Thu, 26 Oct 201
On Tue, Nov 7, 2017 at 11:47 AM, Jakub Jelinek wrote:
> On Tue, Nov 07, 2017 at 11:21:15AM +0100, Uros Bizjak wrote:
>> On Tue, Nov 7, 2017 at 11:10 AM, Jakub Jelinek wrote:
>>
>> >> > Isn't it sufficient that moves disparage slightly the k alternatives?
>> >> > Or are you worried about the case
On Fri, Nov 3, 2017 at 1:40 PM, Bin Cheng wrote:
> Hi,
> As described in message of previous patch:
>
> This patch set fixes both PRs in the opposite way: Instead of find dominance
> insertion position for root reference, we resort zero-distance references of
> combined chain by their position inf
On Fri, Nov 3, 2017 at 5:26 PM, Richard Sandiford
wrote:
> This patch allows us to recognise:
>
> ... = bool1 != bool2 ? x : y
>
> as equivalent to:
>
> bool tmp = bool1 ^ bool2;
> ... = tmp ? x : y
>
> For the latter we were already able to find the natural number
> of vector units fo
We currently generate (sometimes pretty long) sequences of integer
insns to implement the various cstore patterns. If the CPU has a fast
isel, we can use that at the same latency as of just two integer insns
(you also get a load immediate of 1, and sometimes one of 0 as well,
but those are not in
On Fri, Nov 3, 2017 at 5:32 PM, Richard Sandiford
wrote:
> A general TARGET_MEM_REF is:
>
> BASE + STEP * INDEX + INDEX2 + OFFSET
>
> After classifying the address in this way, the code that builds
> TARGET_MEM_REFs tries to simplify the address until it's valid
> for the current target and fo
> On Tue, 7 Nov 2017, Kumar, Venkataramanan wrote:
>
> >>>The attached patch implements an RTL pass which splits generated FMA
> >>>instruction into MUL/ADD sequence.
> >>
> >>That seems wrong if the user explicitly asked for FMA in his program, unless
> >>you have a way to recognize which FMA ins
On Tue, Nov 7, 2017 at 10:44 AM, Richard Biener
wrote:
> On Fri, Nov 3, 2017 at 1:35 PM, Bin Cheng wrote:
>> Hi,
>> This is a simple patch exploiting more undefined pointer overflow behavior in
>> loop niter analysis. Originally, it only supports POINTER_PLUS_EXPR if the
>> offset part is IV. T
On Tue, Nov 7, 2017 at 1:17 PM, Bin.Cheng wrote:
> On Tue, Nov 7, 2017 at 10:44 AM, Richard Biener
> wrote:
>> On Fri, Nov 3, 2017 at 1:35 PM, Bin Cheng wrote:
>>> Hi,
>>> This is a simple patch exploiting more undefined pointer overflow behavior
>>> in
>>> loop niter analysis. Originally, it
Sudi Das wrote:
> Thanks, I have made the changes to the patch.
> Also can someone please apply it for me. I do not have commit access.
>
> 2017-10-10 Sudakshina Das
>
> PR middle-end/80131
> * match.pd: Simplify 1 << (C - x) where C = precision (x) - 1.
>
> 2017-10-10 Sudakshina
On Tue, Nov 7, 2017 at 1:14 PM, Jan Hubicka wrote:
>> On Tue, 7 Nov 2017, Kumar, Venkataramanan wrote:
>>
>> >>>The attached patch implements an RTL pass which splits generated FMA
>> >>>instruction into MUL/ADD sequence.
>> >>
>> >>That seems wrong if the user explicitly asked for FMA in his prog
On Tue, Nov 7, 2017 at 6:36 AM, Kumar, Venkataramanan
wrote:
> Hi,
>
> The attached patch implements an RTL pass which splits generated FMA
> instruction into MUL/ADD sequence.
> The pass is enabled for Zen and done when we find it is profitable to split
> the FMA.
>
> On Zen, we found that for
On Tue, Nov 7, 2017 at 12:23 PM, Richard Biener
wrote:
> On Tue, Nov 7, 2017 at 1:17 PM, Bin.Cheng wrote:
>> On Tue, Nov 7, 2017 at 10:44 AM, Richard Biener
>> wrote:
>>> On Fri, Nov 3, 2017 at 1:35 PM, Bin Cheng wrote:
Hi,
This is a simple patch exploiting more undefined pointer over
> >
> > We have mutiple existing transformations that optimize SSE builtins into
> > different
> > instructions when doing so is win (we run full RTL optimization queue on
> > them and
> > do usual instruction combining, simplification and splitting). So i would
> > say that
> > we are OK changi
Recent commit to match.pd broke the build.
Fixed as follows, committed as obvious after build went past error.
Richard.
2017-11-07 Richard Biener
* match.pd: Fix build.
Index: gcc/match.pd
===
--- gcc/match.pd(
On Tue, Nov 7, 2017 at 2:14 AM, Jakub Jelinek wrote:
> On Mon, Nov 06, 2017 at 06:39:20PM -0800, Palmer Dabbelt wrote:
>> Jim has recently started working at SiFive, where he'll be contributing
>> to our GCC port. Andrew, Kito and I would like him to be a mainatiner.
>> My understand is that this
Peter Bergner writes:
> On 11/6/17 4:52 PM, Segher Boessenkool wrote:
>> Hi!
>>
>> On Mon, Nov 06, 2017 at 11:41:39AM -0600, Peter Bergner wrote:
>>> There is a new HWCAP2 bit added to the AUXV here:
>>>
>>> http://patchwork.ozlabs.org/patch/824764/
>>>
>>> This patch adds __builtin_cpu_suppor
Hi Wilco
On 7 November 2017 at 13:28, Wilco Dijkstra wrote:
> Sudi Das wrote:
>
>> Thanks, I have made the changes to the patch.
>> Also can someone please apply it for me. I do not have commit access.
>>
>> 2017-10-10 Sudakshina Das
>>
>>PR middle-end/80131
>>* match.pd: Simpl
Christophe Lyon wrote:
> This causes my builds (all arm and aarch64 targets) to fail:
Richard Biener already committed a fix in r254498 (thanks).
It seems constants in match.pd now need wi::to_wide.
Wilco
On 07/04/2017 03:05 AM, Tom de Vries wrote:
> On 07/03/2017 04:24 PM, Tom de Vries wrote:
>> On 07/03/2017 04:08 PM, Thomas Schwinge wrote:
>>> Hi!
>>>
>>> On Mon, 26 Jun 2017 17:29:11 +0200, Jakub Jelinek
>>> wrote:
On Mon, Jun 26, 2017 at 03:26:57PM +, Joseph Myers wrote:
> On Mon,
On 11/07/2017 05:53 AM, Martin Liška wrote:
Hello.
This is slightly updated version from the previous. Various small issues were
fixed
and I update documentation in order to reflect the changes.
+ gcov_write_unsigned (DECL_ARTIFICIAL (current_function_decl));
gcov_write_filename (xloc.fi
On Tue, Nov 07, 2017 at 06:48:25AM -0800, Cesar Philippidis wrote:
> > Changes in the patch series:
> > - removed OPENACC_ from environment variable names
> > - made temp files use gomp-nvptx prefix.
> > - fixed build error due to missing _GNU_SOURCE in libgomp-nvptx.c.
> > - merged the three GOMP_
Joseph Myers wrote:
On Mon, 30 Oct 2017, Wilco Dijkstra wrote:
> The semantics of __*_finite definitely include finite-math-only, as they
> aren't all just disabling the wrappers (e.g. sysdeps/i386/i686/fpu/e_log.S
> has __log_finite separate from __ieee754_log).
I only see a few cases where th
Hi,
cp/cp-tree.h now includes operators.def which means it has to be installed
as part of the plugin headers. The below patch addresses this (copyright
assignment is on file).
Thanks,
Boris
gcc/cp/ChangeLog:
2017-11-07 Boris Kolpackov
* Make-lang.in (CP_PLUGIN_HEADERS): Add operators
Hi,
On Tue, 7 Nov 2017, Richard Biener wrote:
> > With FMA however the situation is different becuase there are rounding
> > differences. Why we can convert multiplicatoin+add into FMA without
> > -ffast-math at first place?
>
> We do with -ffp-contract=fast which is the default for C.
But no
I decided to split my previous patch "Enable building libitm with Intel CET "
into two different patches. The first patch will add a new field to sjlj.S and
target.h files. The second one will add Intel CET support on the top of the
first one. In this case the further changes for adding Intel CET
Enable building libitm with Intel CET. The patch is based on previous patch
[PATCH 21/22] Add extra field to gtm_jmpbuf on x86 only.
Ok for trunk?
Igor
0022-Enable-building-libitm-with-Intel-CET.PATCH
Description: 0022-Enable-building-libitm-with-Intel-CET.PATCH
On 11/07/2017 02:52 AM, Richard Biener wrote:
> On Mon, Nov 6, 2017 at 6:01 PM, Jeff Law wrote:
>>
>>
>> So I spent a fair amount of time over the weekend trying to figure out
>> how to stage in the vrp cleanups. I don't want to drop a massive
>> unreviewable kit on everyone. It's hard on the re
Committed.
On Mon, 06 Nov 2017 11:11:24 PST (-0800), Palmer Dabbelt wrote:
> From: Michael Clark
>
> Use no suffix at all in the musl dynamic linker name for hard
> float ABI. Use -sf and -sp suffixes in musl dynamic linker name
> for soft float and single precision ABIs. The following table
> ou
On 11/7/17 7:12 AM, Tulio Magno Quites Machado Filho wrote:
> That's the same string adopted in glibc. [1]
> PPC_FEATURE2_HTM_NO_SUSPEND is also user-visible in glibc as a macro and is
> identical too.
>
> Notice this has not been merged into Linus Torvalds' tree yet and the glibc
> patch is also
On Fri, Aug 04, 2017 at 01:41:22PM +0100, Wilco Dijkstra wrote:
> To implement -fomit-leaf-frame-pointer, there are 2 places where we need
> to check whether we have to use a frame chain (since register allocation
> may allocate LR in a leaf function that omits the frame pointer, but if
> LR is spi
Committed.
On Mon, 06 Nov 2017 17:31:05 PST (-0800), Palmer Dabbelt wrote:
> From: Andrew Waterman
>
> Without this we aren't getting proper memcpy inlining on RISC-V systems,
> which is particularly disastrous for Dhrystone performance on RV32IM
> systems.
>
> gcc/ChangeLog
>
> 2017-11-06 Andre
On Tue, Aug 15, 2017 at 05:25:06PM +0100, Wilco Dijkstra wrote:
>
> ping
>
>
> From: Wilco Dijkstra
> Sent: 07 August 2017 15:13
> To: GCC Patches; James Greenhalgh
> Cc: nd; Richard Earnshaw
> Subject: [PATCH][AArch64] Simplify aarch64_can_eliminate
>
> Simplify aarch64_can_eliminate - if
This breaks g++.dg/torture/pr64669.C with -O3 on ia64:
$ gcc/xg++ -Bgcc/ ../../gcc/gcc/testsuite/g++.dg/torture/pr64669.C -nostdinc++
-Iia64-suse-linux/libstdc++-v3/include/ia64-suse-linux
-Iia64-suse-linux/libstdc++-v3/include -I../libstdc++-v3/libsupc++
-I../libstdc++-v3/include/backward -I..
src/filesystem/ops-common.c uses S_ISSOCK unconditionally without checking that
it is available
As result compile fails for DJGPP when S_ISREG is available but S_ISSOCK is not. Included patch add
configure check for S_ISSOCK
Andris
ChangeLog entry:
2017-11-07 Andris Pavenis
* acinclud
* g++.dg/pr50763-3.C (evalPoint): Return a value.
diff --git a/gcc/testsuite/g++.dg/pr50763-3.C b/gcc/testsuite/g++.dg/pr50763-3.C
index b66be87b1b..33aba30406 100644
--- a/gcc/testsuite/g++.dg/pr50763-3.C
+++ b/gcc/testsuite/g++.dg/pr50763-3.C
@@ -53,5 +53,5 @@ long sExt::evalPoint(const
[One more time, but without rejected HTML mail, because apparently this
is my first post to gcc-patches *ever* ;-)].
Howdy!
While poking around in the backwards threader I noticed that we bail if
we have already seen a starting BB.
/* Do not jump-thread twice from the same block. */
On Tue, Nov 07, 2017 at 06:27:52PM +0100, Andreas Schwab wrote:
> * g++.dg/pr50763-3.C (evalPoint): Return a value.
http://gcc.gnu.org/ml/gcc-patches/2017-11/msg00407.html
(waiting for review)
> diff --git a/gcc/testsuite/g++.dg/pr50763-3.C
> b/gcc/testsuite/g++.dg/pr50763-3.C
> index b66b
As discussed in the audit trail, testing TYPE_USER_ALIGN to find out whether
there is an "aligned" attribute on the type is not robust since the layout
machinery will clear it after internal alignment promotion, so the attached
patchlet replaces it with an explicit lookup (that's as cheap in alm
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