On Thu, Nov 20, 2014 at 5:25 PM, Evgeny Stupachenko wrote:
> Bootstrap / make check passed with updated patch.
>
> Is it still ok?
>
> It looks like we don't need "expand_vec_perm_vpshufb2_vpermq_even_odd"
> any more with the patch.
> However the clean up will be in the separate patch after approp
The following backports a fix I applied to match.pd whilst merging
from match-and-simplify to the original tree-ssa-forwprop.c code
on the 4.9 branch.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied.
Richard.
2014-11-21 Richard Biener
PR tree-optimization/61750
On Thu, Nov 20, 2014 at 11:30:12PM +0100, Mark Wielaard wrote:
> @@ -19592,13 +19597,28 @@ gen_compile_unit_die (const char *filename)
>
>language = DW_LANG_C;
>if (strncmp (language_string, "GNU C++", 7) == 0)
> -language = DW_LANG_C_plus_plus;
> +{
> + language = DW_LANG_C_
On Thu, Nov 20, 2014 at 05:50:33PM -0600, James Norris wrote:
> >>+ case 'h':
> >>+ if (!strcmp ("host", p))
> >>+ result = PRAGMA_OMP_CLAUSE_SELF;
> >>+ break;
> >Shouldn't this be PRAGMA_OMP_CLAUSE_HOST (PRAGMA_OACC_CLAUSE_HOST)
> >instead? It is _HOST in the C++ patch, are there
On Thu, Nov 20, 2014 at 05:33:57PM -0600, James Norris wrote:
> >>+ t = OMP_CLAUSE_ASYNC_EXPR (c);
> >>+ if (t == error_mark_node)
> >>+ remove = true;
> >>+ else if (!type_dependent_expression_p (t)
> >>+ && !INTEGRAL_TYPE_P (TREE_TYPE (t)))
> >>+ {
> >>+
On 20/11/14 20:55, Marek Polacek wrote:
On Thu, Nov 20, 2014 at 05:27:35PM +0100, Richard Biener wrote:
+ if (exit_warned && problem_stmts != vNULL)
+{
!problem_stmts.empty ()
/home/marek/src/gcc/gcc/tree-ssa-loop-niter.c: In function ‘void
maybe_lower_iteration_bound(loop*)’:
/
Hi,
2014-11-20 Alex Velenko
*MAINTAINERS (write-after-approval): Add myself.
diff --git a/MAINTAINERS b/MAINTAINERS
index 11a28ef..eada4e9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -566,6 +566,7 @@ David Ung
Neil Vachharajani
On 20 November 2014 16:27, Alex Velenko wrote:
>
> 2014-11-20 Alex Velenko
>
> *MAINTAINERS (write-after-approval): Add myself.
>
Your patch looks fine, commit it. /Marcus
Hi Guys,
I am applying the patch below to fix the RL78 backend so that it will
preserve the ES register if an interrupt handler uses it. The ES
register can be altered if a __far variable is addressed inside the
handler.
Tested without any regressions on an rl78-elf toolchain.
Cheers
PING.
"200" currently looks optimal for x86.
Let's commit the following:
2014-11-21 Evgeny Stupachenko
* config/i386/i386.c (ix86_option_override_internal): Increase
PARAM_MAX_COMPLETELY_PEELED_INSNS.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 6337aa5..5
On 11/20/2014 10:13 PM, Jan Hubicka wrote:
Hello.
As I reimplemented fibheap to C++ template, Honza told me that replace_key
method actually
supports just decrement operation. Old implementation suppress any feedback if
we try to increase key:
fibheap.c:
...
/* If we wanted to, we could ac
On Fri, Nov 21, 2014 at 11:46 AM, Evgeny Stupachenko wrote:
> PING.
> "200" currently looks optimal for x86.
> Let's commit the following:
>
> 2014-11-21 Evgeny Stupachenko
> * config/i386/i386.c (ix86_option_override_internal): Increase
> PARAM_MAX_COMPLETELY_PEELED_INSNS.
OK.
Jakub Jelinek writes:
> The following untested patch fixes that (tested on small-addr-1.c with
> a cross-compiler), I don't have ia64 hw nor spare cycles to test this
> though, so I'm just offering the patch as is if anyone wants to test it.
> Perhaps better testsuite coverage wouldn't hurt (test
Hi,
This patch is to add myself into section of
MAINTAINERS file.
Is it Okay to commit?
Regards,
Renlin Li
ChangeLog:
2014-11-21 Renlin Li
* MAINTAINERS (Write After Approval): Add myself.diff --git a/MAINTAINERS b/MAINTAINERS
index 56e68c5..96a7497 100644
--- a/MAINTAINERS
+++ b/
On 11/14/2014 11:48 AM, Richard Biener wrote:
On Thu, Nov 13, 2014 at 1:35 PM, mliska wrote:
gcc/ChangeLog:
2014-11-13 Martin Liska
* predict.c (propagate_freq): More elegant sreal API is used.
(estimate_bb_frequencies): New static constants defined by sreal
repl
On 20 Nov 09:43, Uros Bizjak wrote:
> On Wed, Nov 19, 2014 at 6:32 PM, Ilya Tocar wrote:
> > Hi,
> >
> > New revision of Intel ISA reference [1] has new instructions:
> > Clwb, pcommit and new flavors of AVX512. Patch bellow adds them.
> > I understand that stage 1 is closed, however those changes
When adjusting the value range of an induction variable using SCEV, VRP
calls scev_probably_wraps_p() with use_overflow_semantics=true. This
parameter set to true makes scev_probably_wraps_p() assume that signed
induction variables never wrap, so for these variables it always returns
false (when s
Ping again.
Thanks,
Kyrill
On 13/11/14 14:45, Kyrill Tkachov wrote:
Ping.
Kyrill
On 04/11/14 10:56, Kyrill Tkachov wrote:
Phew,
This one slipped through the cracks. Ping?
https://gcc.gnu.org/ml/gcc-patches/2014-09/msg01981.html
Thanks,
Kyrill
On 23/09/14 16:25, Kyrill Tkachov wrote:
On 2
On Thu, Nov 20, 2014 at 8:48 PM, Kai Tietz wrote:
> Hello,
>
> this issue fixes a type-overflow issue caused by trying to cast a UHWI
> via tree_to_shwi.
> As soon as value gets larger then SHWI_MAX, we get an error for it.
> So we need to cast it
> via tree_to_uhwi, and then casting it to the sig
On 20 Nov 09:43, Uros Bizjak wrote:
> On Wed, Nov 19, 2014 at 6:32 PM, Ilya Tocar wrote:
> > Hi,
> >
> > New revision of Intel ISA reference [1] has new instructions:
> > Clwb, pcommit and new flavors of AVX512. Patch bellow adds them.
> > I understand that stage 1 is closed, however those changes
On Fri, Nov 21, 2014 at 2:51 AM, Ulrich Weigand wrote:
> Richard Biener wrote:
>
>> This probably caused bootstrap on s390x-linux to fail as in PR63952
>> (last checked with rev. 217714).
>
> It seems we have both a back-end bug and a middle-end bug here.
>
> First of all, this code in optabs.c:pr
On 21/11/14 11:16, Renlin Li wrote:
> Hi,
>
> This patch is to add myself into section of
> MAINTAINERS file.
>
> Is it Okay to commit?
>
> Regards,
> Renlin Li
>
>
> ChangeLog:
>
> 2014-11-21 Renlin Li
>
> * MAINTAINERS (Write After Approval): Add myself.
>
>
> tmp.patch
>
>
>
On 20 Nov 09:43, Uros Bizjak wrote:
> On Wed, Nov 19, 2014 at 6:32 PM, Ilya Tocar wrote:
> > Hi,
> >
> > New revision of Intel ISA reference [1] has new instructions:
> > Clwb, pcommit and new flavors of AVX512. Patch bellow adds them.
> > I understand that stage 1 is closed, however those changes
On Fri, Nov 21, 2014 at 8:56 AM, Jakub Jelinek wrote:
> On Thu, Nov 20, 2014 at 11:30:11PM +0100, Mark Wielaard wrote:
>> --- a/gcc/config/avr/avr-c.c
>> +++ b/gcc/config/avr/avr-c.c
>> @@ -386,7 +386,8 @@ avr_cpu_cpp_builtins (struct cpp_reader *pfile)
>> (as mentioned in ISO/IEC DTR 18037;
On 20 Nov 09:43, Uros Bizjak wrote:
> On Wed, Nov 19, 2014 at 6:32 PM, Ilya Tocar wrote:
> > Hi,
> >
> > New revision of Intel ISA reference [1] has new instructions:
> > Clwb, pcommit and new flavors of AVX512. Patch bellow adds them.
> > I understand that stage 1 is closed, however those changes
Hi,
Please note that currently the test:
int a[N];
short b[N*2];
for (int i = 0; i < N; ++i)
a[i] = b[i*2];
Is compiled to (with -march=corei7 -O2 -ftree-vectorize):
movdqa b(%rax), %xmm0
movdqa b-16(%rax), %xmm2
pand%xmm1, %xmm0
pand%xmm1, %xmm2
On Fri, Nov 21, 2014 at 12:01 PM, Andreas Schwab wrote:
> Jakub Jelinek writes:
>
>> The following untested patch fixes that (tested on small-addr-1.c with
>> a cross-compiler), I don't have ia64 hw nor spare cycles to test this
>> though, so I'm just offering the patch as is if anyone wants to t
On 11/20/2014 05:41 PM, Richard Biener wrote:
On Thu, Nov 20, 2014 at 5:30 PM, Martin Liška wrote:
Hello.
Following patch fixes ICE in IPA ICF. Problem was that number of non-debug
statements in a BB can
change (for instance by IPA split), so that the number is recomputed.
Huh, so can it get
On Fri, Nov 21, 2014 at 12:21 PM, Martin Liška wrote:
> On 11/14/2014 11:48 AM, Richard Biener wrote:
>>
>> On Thu, Nov 13, 2014 at 1:35 PM, mliska wrote:
>>>
>>> gcc/ChangeLog:
>>>
>>> 2014-11-13 Martin Liska
>>>
>>> * predict.c (propagate_freq): More elegant sreal API is used.
>>>
On 2014.11.21 at 11:42 +, Richard Earnshaw wrote:
> On 21/11/14 11:16, Renlin Li wrote:
> > Hi,
> >
> > This patch is to add myself into section of
> > MAINTAINERS file.
> >
> > Is it Okay to commit?
>
> OK
There is no need to ask for permission in this case:
http://gcc.gnu.org/svnwrite.h
On 20/11/2014 18:13, "Marcus Shawcroft" wrote:
>On 14 November 2014 16:48, Alan Hayward wrote:
>>This is a new version of my BE patch from a few weeks ago.
>>This is part 2 and covers all the aarch64 changes.
>>
>>When combined with the first patch, It fixes up movoi/ci/xi for Big
>>Endian, so
On Fri, Nov 21, 2014 at 12:45 PM, Ilya Tocar wrote:
> On 20 Nov 09:43, Uros Bizjak wrote:
>> On Wed, Nov 19, 2014 at 6:32 PM, Ilya Tocar wrote:
>> > Hi,
>> >
>> > New revision of Intel ISA reference [1] has new instructions:
>> > Clwb, pcommit and new flavors of AVX512. Patch bellow adds them.
>>
On Fri, Nov 21, 2014 at 12:29 PM, Patrick Palka wrote:
> When adjusting the value range of an induction variable using SCEV, VRP
> calls scev_probably_wraps_p() with use_overflow_semantics=true. This
> parameter set to true makes scev_probably_wraps_p() assume that signed
> induction variables ne
On Thu, Nov 13, 2014 at 12:16 PM, Jakub Jelinek wrote:
> On Wed, Nov 12, 2014 at 05:35:48PM -0800, Konstantin Serebryany wrote:
>> Here is one more merge of libsanitizer (last one was in Sept).
>>
>> Tested on x86_64 Ubuntu 14.04 like this:
>> rm -rf */{*/,}libsanitizer && make -j 50
>> make -j 40
On Fri, Nov 21, 2014 at 12:50 PM, Ilya Tocar wrote:
> On 20 Nov 09:43, Uros Bizjak wrote:
>> On Wed, Nov 19, 2014 at 6:32 PM, Ilya Tocar wrote:
>> > Hi,
>> >
>> > New revision of Intel ISA reference [1] has new instructions:
>> > Clwb, pcommit and new flavors of AVX512. Patch bellow adds them.
>>
On Fri, Nov 21, 2014 at 12:52 PM, Martin Liška wrote:
> On 11/20/2014 05:41 PM, Richard Biener wrote:
>>
>> On Thu, Nov 20, 2014 at 5:30 PM, Martin Liška wrote:
>>>
>>> Hello.
>>>
>>> Following patch fixes ICE in IPA ICF. Problem was that number of
>>> non-debug
>>> statements in a BB can
>>> cha
On Fri, Nov 21, 2014 at 12:38 PM, Ilya Tocar wrote:
> On 20 Nov 09:43, Uros Bizjak wrote:
>> On Wed, Nov 19, 2014 at 6:32 PM, Ilya Tocar wrote:
>> > Hi,
>> >
>> > New revision of Intel ISA reference [1] has new instructions:
>> > Clwb, pcommit and new flavors of AVX512. Patch bellow adds them.
>>
On Fri, Nov 21, 2014 at 12:21 PM, Ilya Tocar wrote:
> On 20 Nov 09:43, Uros Bizjak wrote:
>> On Wed, Nov 19, 2014 at 6:32 PM, Ilya Tocar wrote:
>> > Hi,
>> >
>> > New revision of Intel ISA reference [1] has new instructions:
>> > Clwb, pcommit and new flavors of AVX512. Patch bellow adds them.
>>
Hi,
I spotted in an assembly dump, that the the SHLL, SHLL2, SADDL, and SSUBL
instructions appear out of line, as they are missing a tab between their
mnemonic and their operands.
I've committed (revision 217917) the attached as the obvious fix to this.
Tested with a build-test and a run of aarc
Hi,
this patch adds a fgcse-sm test with a scan-rtl-dump directive.
The other fgcse-sm tests:
...
./gcc/testsuite/gcc.dg/pr45352-3.c
./gcc/testsuite/gcc.dg/torture/pr24257.c
./gcc/testsuite/gcc.target/i386/movsi-sm-1.c
./gcc/testsuite/g++.dg/opt/pr36185.C
...
do not check whether fgcse-sm actual
On Fri, 2014-11-21 at 12:48 +0100, Richard Biener wrote:
> On Fri, Nov 21, 2014 at 8:56 AM, Jakub Jelinek wrote:
> > On Thu, Nov 20, 2014 at 11:30:11PM +0100, Mark Wielaard wrote:
> >> --- a/gcc/config/avr/avr-c.c
> >> +++ b/gcc/config/avr/avr-c.c
> >> @@ -386,7 +386,8 @@ avr_cpu_cpp_builtins (str
On Fri, Nov 21, 2014 at 02:01:55PM +0100, Mark Wielaard wrote:
> gcc/c-family/ChangeLog
>
> PR debug/38757
> * c-opts.c (set_std_c89): Set lang_hooks.name.
> (set_std_c99): Likewise.
> (set_std_c11): Likewise.
> (set_std_cxx98): Likewise.
> (set_std_cxx1
On 21 November 2014 12:11, Alan Hayward wrote:
> 2014-11-21 Alan Hayward
>
> PR 57233
> PR 59810
> * config/aarch64/aarch64.c
> (aarch64_classify_address): Allow extra addressing modes for BE.
> (aarch64_print_operand): New operand for printing a q regis
Hi,
As requested by Ramana when he OKed the initial change, the attched patch
documents the changes I made to --with-cpu and --with-tune in this patch:
https://gcc.gnu.org/ml/gcc-patches/2014-05/msg02618.html
in the changes for GCC 5.0.
OK?
Thanks,
James
---
? .git
? foo.patch
? htdocs/.#ind
On Fri, Nov 21, 2014 at 7:18 AM, Richard Biener
wrote:
> On Fri, Nov 21, 2014 at 12:29 PM, Patrick Palka wrote:
>> When adjusting the value range of an induction variable using SCEV, VRP
>> calls scev_probably_wraps_p() with use_overflow_semantics=true. This
>> parameter set to true makes scev_p
During the flattening of optabs.h, I updated all the config/* files
which were affected. I've been getting spurious failures with
config-list.mk where my changes would "disappear" and tracked down why.
I was blissfully unaware that the tilepro ports mul-tables.c file is
actually generated fr
(I'm not sure if I need approval from someone else for MIPS
specific top level 'configure' changes. I'm cautiously assuming
I do for now.)
Since adding o32 FFPXX support, the MIPS backend uses the .module
directive to emit a .module [no]oddspreg when .module support is
detected in binutils. The
Hi!
I've committed this as obvious.
2014-11-21 Jakub Jelinek
PR sanitizer/64013
* sanitizer_common/sanitizer_linux.cc (FileExists): Cherry pick
upstream r222532.
--- libsanitizer/sanitizer_common/sanitizer_linux.cc(revision 222531)
+++ libsanitizer/sanitizer_commo
On 14/11/2014 16:48, "Alan Hayward" wrote:
>This is a new version of my BE patch from a few weeks ago.
>This is part 1 and covers rtlanal.c. The second part will be aarch64
>specific.
>
>When combined with the second patch, It fixes up movoi/ci/xi for Big
>Endian, so that we end up with the lab
This patch picks up work that was in my working tree already and fixes
it up. When targets choose to not emitting piecewise aggregate inits
during gimplification or when that is disabled for other reasons
(like being too large) then even FRE with all its tricks cannot
constant fold from them. Th
On Thu, Nov 20, 2014 at 7:11 PM, Martin Jambor wrote:
> Hi,
>
> On Mon, Nov 03, 2014 at 10:46:49PM +0100, Marc Glisse wrote:
>> On Mon, 3 Nov 2014, Marc Glisse wrote:
>>
>> >On Mon, 3 Nov 2014, Martin Jambor wrote:
>> >
>> >>I just applied your patch on top of trunk revision 217032 on my
>> >
>> >
On 11/21/2014 01:03 PM, Richard Biener wrote:
On Fri, Nov 21, 2014 at 12:21 PM, Martin Liška wrote:
On 11/14/2014 11:48 AM, Richard Biener wrote:
On Thu, Nov 13, 2014 at 1:35 PM, mliska wrote:
gcc/ChangeLog:
2014-11-13 Martin Liska
* predict.c (propagate_freq): More elegant
On Fri, Nov 21, 2014 at 3:39 PM, Martin Liška wrote:
> Hello.
>
> Ok, this is simplified, one can use sreal a = 12345 and it works ;)
>
>> that's a new API, right? There is no max () and I think that using
>> LONG_MIN here is asking for trouble (host dependence). The
>> comment in the file say
On 11/21/2014 04:02 PM, Richard Biener wrote:
On Fri, Nov 21, 2014 at 3:39 PM, Martin Liška wrote:
Hello.
Ok, this is simplified, one can use sreal a = 12345 and it works ;)
that's a new API, right? There is no max () and I think that using
LONG_MIN here is asking for trouble (host depend
On 19 Nov 21:11, Ilya Enkovich wrote:
> 2014-11-19 20:55 GMT+03:00 Jeff Law :
> > On 11/19/14 07:15, Ilya Enkovich wrote:
> >
> >> --
> >> 2014-11-19 Ilya Enkovich
> >>
> >> * Makefile.def: Add libmpx.
> >> * configure.ac: Add libmpx.
> >> * Makefile.in: Regenerate.
> >>
On 18 Nov 14:15, Jeff Law wrote:
> On 11/18/14 09:48, Ilya Enkovich wrote:
> >On 15 Nov 00:10, Jeff Law wrote:
> >>On 11/14/14 10:26, Ilya Enkovich wrote:
> >>>Hi,
> >>>
> >>>This patch introduces a simple library with several wrappers to be used
> >>>with MPX and Pointer Bounds Checker. Wrappers
On 17 November 2014 17:35, Kyrill Tkachov wrote:
> 2014-11-17 Kyrylo Tkachov
>
> * config/aarch64/arm_neon.h (vsqrt_f64): New intrinsic.
>
> 2014-11-17 Kyrylo Tkachov
>
> * gcc.target/aarch64/simd/vsqrt_f64_1.c
OK /Marcus
On 17 November 2014 11:42, Kyrill Tkachov wrote:
> Makes sense. Here are the changes for the 4.9 and 4.8 changes.html pages.
>
> Ok?
This looks ok to me, I'd suggest changing...
+ Starting with GCC 4.8.4 a workaround for the ARM Cortex-A53
to
+ As of GCC 4.8.4
OK with that change.
/
On 14 November 2014 15:46, Alan Lawrence wrote:
>> gcc/ChangeLog:
>>
>> * config/aarch64/aarch64-simd.md (vec_shr): New.
>>
>> gcc/testsuite/ChangeLog:
>>
>> * lib/target-supports.exp
>> (check_effective_target_whole_vector_shift): Add aarch64{,_be}.
OK /Marcus
On 17 November 2014 16:56, Alan Lawrence wrote:
> This is a pure tidyup, no new functionality. Changes are
> (1) Use op[0] to store the result operand, rather than a separate variable,
> thus combining the two large switch statements into one;
> (2) The 'arg' and 'mode' arrays were (almost-)only e
On 14 November 2014 16:38, Jiong Wang wrote:
>
> gcc/
> * config/aarch64/iterators.md (VS): New mode iterator.
> (vsi2qi): New mode attribute.
> (VSI2QI): Likewise.
> * config/aarch64/aarch64-simd-builtins.def: New entry for ctz.
> * config/aarch64/aarch64-simd.md (ctz2): New pattern for
On 18 November 2014 12:20, Kyrill Tkachov wrote:
>
> On 18/11/14 10:33, Kyrill Tkachov wrote:
>>
>> diff --git a/gcc/config/arm/aarch-common-protos.h
>> b/gcc/config/arm/aarch-common-protos.h
>> index 264bf01..ad7ec43c 100644
>> --- a/gcc/config/arm/aarch-common-protos.h
>> +++ b/gcc/config/arm/aa
On 18 November 2014 10:33, Kyrill Tkachov wrote:
> 2014-11-18 Kyrylo Tkachov
>
> * config/aarch64/aarch64.c: Include tm-constrs.h
> (AARCH64_FUSE_ADRP_ADD): Define.
> (cortexa57_tunings): Add AARCH64_FUSE_ADRP_ADD to fuseable_ops.
> (cortexa53_tunings): Likewise.
> (aarch_m
On 18 November 2014 10:33, Kyrill Tkachov wrote:
> 2014-11-18 Kyrylo Tkachov
>
> * config/aarch64/aarch64.c (AARCH64_FUSE_MOVK_MOVK): Define.
> (cortexa53_tunings): Specify AARCH64_FUSE_MOVK_MOVK in fuseable_ops.
> (cortexa57_tunings): Likewise.
> (aarch_macro_fusion_pair_p): H
On 18 November 2014 10:33, Kyrill Tkachov wrote:
> 2014-11-18 Kyrylo Tkachov
>
> * config/aarch64/aarch64.c (AARCH64_FUSE_ADRP_LDR): Define.
> (cortexa53_tunings): Specify AARCH64_FUSE_ADRP_LDR in fuseable_ops.
> (aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_ADRP_LDR.
OK /Marcu
On 11/20/14 09:40, Jakub Jelinek wrote:
On Thu, Nov 20, 2014 at 07:36:03PM +0300, Ilya Enkovich wrote:
Hi,
MPX runtime checks some feature bits in order to check MPX is fully
supported. Runtime does it by cpuid calls but there is a
__builtin_cpu_supports which may be used for that. Unfortunat
I noticed that C++14 [basic.types] says that "a type is a literal type
if it is: void, [...]". Yet our literal_type_p doesn't consider void
type as a literal type. The following is an attempt to fix that along
with a testcase. It seems that void was only added in C++14, so check
for cxx14 as wel
Aehm Kirill,
excuse me please, but if I do
autogen Makefile.def
I get this from svn diff
Index: Makefile.in
===
--- Makefile.in (revision 217890)
+++ Makefile.in (working copy)
@@ -35238,9 +35238,6 @@
$(SHELL) $(srcdir)
This patch by Lynn A. Boger changes libgo to use ppc64le for
little-endian 64-bit PowerPC. Bootstrapped and ran testsuite on
x86_64-unknown-linux-gnu. Committed to mainline.
Ian
diff -r 96de84075614 libgo/configure.ac
--- a/libgo/configure.acTue Nov 18 09:28:24 2014 -0800
+++ b/libgo/con
On Wed, Nov 19, 2014 at 12:55 PM, Lynn A. Boger
wrote:
> Updated patch:
Thanks. Committed.
Ian
> On 11/19/2014 09:01 AM, Lynn A. Boger wrote:
>>
>> Hi,
>>
>> This change goes along with the change to the GOARCH setting in gccgo for
>> ppc64le which will be done in gofrontend. The description
The following patch-series adds optimized support for the APM X-Gene 1
by providing a cost-model and pipeline-model. The pipeline-model has a
few long reservation-chains, but looking at the stats for the generated
NDA shows that it's well below other AArch64 cores (e.g. Cortex-A53) in
overall size
To keep this change separately buildable from the pipeline model,
this patch directs the APM XGene-1 to use the generic scheduling
model.
---
gcc/ChangeLog| 8 +++
gcc/config/aarch64/aarch64-cores.def | 1 +
gcc/config/aarch64/aarch64-tune.md | 2 +-
gcc/config/aarc
---
gcc/ChangeLog | 6 +
gcc/config/aarch64/aarch64.md | 3 +-
gcc/config/arm/xgene1.md | 532 ++
3 files changed, 540 insertions(+), 1 deletion(-)
create mode 100644 gcc/config/arm/xgene1.md
diff --git a/gcc/ChangeLog b/gcc/Change
Hi,
On 21 Nov 19:19, Bernd Edlinger wrote:
> so, did you really regenerate Makefile.in in that patch, or am I missing
> something ?
You're right. This patch was rebased so many times, that we may forget to
regenerate it before committing.
Do you plan to submit any patch for Makefile.in?
Or sho
I've been trying to sort out how to proceed with the gimple_type work,
and the first step always come back to figuring out all the places types
are used. This has turned out to be non-trivial and is difficult to do
in an iterative way. I believe I've found a reasonable way to proceed.
Over th
Hi Ilya,
On Fri, 21 Nov 2014 21:44:40, Ilya Verbin wrote:
>
> Hi,
>
> On 21 Nov 19:19, Bernd Edlinger wrote:
>> so, did you really regenerate Makefile.in in that patch, or am I missing
>> something ?
>
> You're right. This patch was rebased so many times, that we may forget to
> regenerate it bef
Hi,
PR 63814 is caused by cgraph_edge_brings_value_p misidentifying an
edge to an expanded artificial thunk as an edge to the original node,
which then leads to crazy double-cloning and doubling the thunks along
the call.
This patch fixes the bug by strengthening the predicate so that it
knows wh
> -Original Message-
> From: Rozycki, Maciej
> Sent: Wednesday, November 19, 2014 8:05 AM
> To: gcc-patches@gcc.gnu.org
> Cc: Moore, Catherine; Eric Christopher; Matthew Fortune
> Subject: [PATCH] MIPS16/GCC: Optimise `__call_stub_fp_' call/return stubs
>
>
> 2014-11-19 Maciej W. Rozyc
2014-11-21 20:45 GMT+03:00 Jeff Law :
> On 11/20/14 09:40, Jakub Jelinek wrote:
>>
>> On Thu, Nov 20, 2014 at 07:36:03PM +0300, Ilya Enkovich wrote:
>>>
>>> Hi,
>>>
>>> MPX runtime checks some feature bits in order to check MPX is fully
>>> supported. Runtime does it by cpuid calls but there is a
Hi!
As discussed on IRC and in the PR, these internal calls are quite
unique for VRP in that they return _Complex integer result,
which VRP doesn't track, but then extract using REALPART_EXPR/IMAGPART_EXPR
the two results from that _Complex int and to generate good code
it is desirable to get prop
Hi!
Apparently, emit_cmp_and_jump_insns can silently generate wrong code
for wider modes on some targets, so this patch changes all those calls in
internal-fn.c to do_compare_rtx_and_jump, which is a wrapper around
emit_cmp_and_jump_insns that should handle the wider mode comparison
expansion. Un
Hi Jakub!
> On Fri, 21 Nov 2014 21:44:40, Ilya Verbin wrote:
> > You're right. This patch was rebased so many times, that we may forget to
> > regenerate it before committing.
Build with liboffloadmic passed. OK for trunk?
-- Ilya
* Makefile.in: Regenerate.
diff --git a/Makefile.i
Hi,
when debugging PR 63814 I noticed that when cgraph_node::create_clone
was using redirect_edge_duplicating_thunks to redirect two edges to a
thunk of a clone, two thunks were created, one for each edge. The
reason is that even though duplicate_thunk_for_node attempts to locate
an already creat
On Fri, Nov 21, 2014 at 10:14:21PM +0300, Ilya Verbin wrote:
> > On Fri, 21 Nov 2014 21:44:40, Ilya Verbin wrote:
> > > You're right. This patch was rebased so many times, that we may forget to
> > > regenerate it before committing.
>
> Build with liboffloadmic passed. OK for trunk?
>
> -- Ily
> >Can you verify that the implementation is correct? I tend to remember that I
> >introduced the
> >lazy incerementation to inliner both for perofrmance and correctness
> >reasons. I used to get
> >odd orders when keys was increased.
> >
> >Honza
>
> Hello.
>
> What kind of correctness do you
On Fri, Nov 21, 2014 at 1:48 PM, Andrew MacLeod wrote:
> 1 - introduce a TYPE_REF tree node, which is effectively just a 'typed' tree
> node, and the TREE_TYPE() field of a TYPE_REF node would point to the type
> node. Any routines which utilize a TYPE node in a tree list would have to
> be modi
Hi,
the testcase of PR 63551 passes a union between a signed and an
unsigned integer between two functions as a parameter. The caller
initializes to an unsigned integer with the highest order bit set, the
callee loads the data through the signed field and compares with zero.
evaluate_conditions_f
On November 21, 2014 8:45:09 PM CET, Diego Novillo wrote:
>On Fri, Nov 21, 2014 at 1:48 PM, Andrew MacLeod
>wrote:
>
>> 1 - introduce a TYPE_REF tree node, which is effectively just a
>'typed' tree
>> node, and the TREE_TYPE() field of a TYPE_REF node would point to the
>type
>> node. Any routin
On 11/21/2014 02:45 PM, Diego Novillo wrote:
On Fri, Nov 21, 2014 at 1:48 PM, Andrew MacLeod wrote:
1 - introduce a TYPE_REF tree node, which is effectively just a 'typed' tree
node, and the TREE_TYPE() field of a TYPE_REF node would point to the type
node. Any routines which utilize a TYPE n
On Fri, Nov 21, 2014 at 09:07:50PM +0100, Martin Jambor wrote:
> Hi,
>
> the testcase of PR 63551 passes a union between a signed and an
> unsigned integer between two functions as a parameter. The caller
> initializes to an unsigned integer with the highest order bit set, the
> callee loads the
On November 21, 2014 9:07:50 PM CET, Martin Jambor wrote:
>Hi,
>
>the testcase of PR 63551 passes a union between a signed and an
>unsigned integer between two functions as a parameter. The caller
>initializes to an unsigned integer with the highest order bit set, the
>callee loads the data throu
Hi,
'#pragma omp critical (name)' can be placed in the function, marked
with '#pragma omp declare target', in this case the corresponding node
should be marked as offloadable too.
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
-- Ilya
gcc/
* omp-low.c (lower_omp_
On November 21, 2014 8:04:39 PM CET, Jakub Jelinek wrote:
>Hi!
>
>As discussed on IRC and in the PR, these internal calls are quite
>unique for VRP in that they return _Complex integer result,
>which VRP doesn't track, but then extract using
>REALPART_EXPR/IMAGPART_EXPR
>the two results from that
On 11/21/2014 03:13 PM, Richard Biener wrote:
On November 21, 2014 8:45:09 PM CET, Diego Novillo wrote:
On Fri, Nov 21, 2014 at 1:48 PM, Andrew MacLeod
wrote:
1 - introduce a TYPE_REF tree node, which is effectively just a
'typed' tree
node, and the TREE_TYPE() field of a TYPE_REF node wou
On November 21, 2014 8:08:37 PM CET, Jakub Jelinek wrote:
>Hi!
>
>Apparently, emit_cmp_and_jump_insns can silently generate wrong code
>for wider modes on some targets, so this patch changes all those calls
>in
>internal-fn.c to do_compare_rtx_and_jump, which is a wrapper around
>emit_cmp_and_jump
On Fri, Nov 21, 2014 at 11:19:26PM +0300, Ilya Verbin wrote:
> Hi,
>
> '#pragma omp critical (name)' can be placed in the function, marked
> with '#pragma omp declare target', in this case the corresponding node
> should be marked as offloadable too.
> Bootstrapped/regtested on x86_64-linux and i6
On Fri, Nov 21, 2014 at 09:28:45AM +0100, Jakub Jelinek wrote:
> I think best would be to tweak
> if (value < 2 || value > 4)
> error_at (loc, "dwarf version %d is not supported", value);
> else
> opts->x_dwarf_version = value;
> so that we accept value 5 too, and for no
On November 21, 2014 9:22:08 PM CET, Andrew MacLeod wrote:
>On 11/21/2014 03:13 PM, Richard Biener wrote:
>> On November 21, 2014 8:45:09 PM CET, Diego Novillo
> wrote:
>>> On Fri, Nov 21, 2014 at 1:48 PM, Andrew MacLeod
>
>>> wrote:
>>>
1 - introduce a TYPE_REF tree node, which is effectivel
According to the next code, 'pretty_name' may need additional bytes more
than 16 (may have unlimited length for array type). There is an easy way
to fix it: use 'pretty_print' for 'pretty_name'.
Let the code meet 2 white spaces alignment coding styles (originally,
some of code is 1 white sapce ali
> On 21 Nov 2014, at 23:36, Jakub Jelinek wrote:
>
>> On Fri, Nov 21, 2014 at 11:19:26PM +0300, Ilya Verbin wrote:
>> Hi,
>>
>> '#pragma omp critical (name)' can be placed in the function, marked
>> with '#pragma omp declare target', in this case the corresponding node
>> should be marked as off
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