On 21 November 2014 12:11, Alan Hayward <alan.hayw...@arm.com> wrote:
> 2014-11-21 Alan Hayward <alan.hayw...@arm.com> > > PR 57233 > PR 59810 > * config/aarch64/aarch64.c > (aarch64_classify_address): Allow extra addressing modes for BE. > (aarch64_print_operand): New operand for printing a q register+1. > (aarch64_simd_emit_reg_reg_move): Define. > (aarch64_simd_disambiguate_copy): Remove. > * config/aarch64/aarch64-protos.h > (aarch64_simd_emit_reg_reg_move): Define. > (aarch64_simd_disambiguate_copy): Remove. > * config/aarch64/aarch64-simd.md > (define_split): Use aarch64_simd_emit_reg_reg_move. > (define_expand "mov<mode>"): Less restrictive predicates. > (define_insn "*aarch64_mov<mode>"): Simplify and only allow for LE. > (define_insn "*aarch64_be_movoi"): Define. > (define_insn "*aarch64_be_movci"): Define. > (define_insn "*aarch64_be_movxi"): Define. > (define_split): OI mov. Use aarch64_simd_emit_reg_reg_move. > (define_split): CI mov. Use aarch64_simd_emit_reg_reg_move. > (define_split): XI mov. Use aarch64_simd_emit_reg_reg_move. I don;t think we should claim to resolve 57233 here. The solution to 57233 from Marc just happened to expose the BE issues in aarch64. Otherwise OK. /Marcus