New German PO file for 'gcc' (version 15.2.0)

Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the German team of translators. The file is available at: https://translationproject.org/latest/gcc/de.po (This file, 'gcc-15.2.0.de.po', has jus

[PATCH 1/5] asm-hard-reg-1.c: Adjust scan for x86 with ia32, x32 and lp64

Since i?86 and x86_64 GCC can generate codes for ia32, x32 and lp64, adjust asm-hard-reg-1.c scan for x86 with ia32, x32 and lp64. PR testsuite/121205 * gcc.dg/asm-hard-reg-1.c: Adjust scan for x86 with ia32, x32 and lp64. Signed-off-by: H.J. Lu --- gcc/testsuite/gcc.dg/

[PATCH 3/5] asm-hard-reg-4.c: Compile for x86 with -msse2 and scan x86

Since i?86 and x86_64 GCC can generate codes for ia32, x32 and lp64, compile asm-hard-reg-4.c for x86 with -msse2 and scan x86 PR testsuite/121205 * gcc.dg/asm-hard-reg-4.c: Compile with -msse2 for x86 and scan x86. Signed-off-by: H.J. Lu --- gcc/testsuite/gcc.dg/asm-har

[PATCH 4/5] asm-hard-reg-5.c: Compile for x86 !ia32

Since i?86 and x86_64 GCC can generate codes for ia32, x32 and lp64, compile asm-hard-reg-5.c for x86 !ia32. PR testsuite/121205 * gcc.dg/asm-hard-reg-5.c: Compile for x86 !ia32. Signed-off-by: H.J. Lu --- gcc/testsuite/gcc.dg/asm-hard-reg-5.c | 2 +- 1 file changed, 1 insertion

[PATCH 2/5] asm-hard-reg-2.c: Compile for x86 !ia32 and scan x86

Since i?86 and x86_64 GCC can generate codes for ia32, x32 and lp64, compile asm-hard-reg-2.c for x86 !ia32 and scan x86. PR testsuite/121205 * gcc.dg/asm-hard-reg-2.c: Compile for x86 !ia32 and scan x86. Signed-off-by: H.J. Lu --- gcc/testsuite/gcc.dg/asm-hard-reg-2.c | 4 ++--

[PATCH 5/5] asm-hard-reg-6.c: Adjust scan for x86 with ia32, lp64 and x32

Since i?86 and x86_64 GCC can generate codes for ia32, x32 and lp64, adjust asm-hard-reg-6.c scan for x86 with ia32, lp64 and x32. PR testsuite/121205 * gcc.dg/asm-hard-reg-6.c: Adjust scan for x86 with ia32, lp64 and x32. Signed-off-by: H.J. Lu --- gcc/testsuite/gcc.dg/

[COMMITTED, PATCH] asm-hard-reg-2.c: Use long long on z to trigger RA error

Use long long on z to trigger error: 'asm' operand has impossible constraints or there are not enough registers for -m32 on asm statements like: __asm__ __volatile__ ("" : "=A" (z), "={rax}" (y)); PR testsuite/121205 * gcc.target/i386/asm-hard-reg-2.c (z): Use long long for -

New Swedish PO file for 'gcc' (version 15.2.0)

Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the Swedish team of translators. The file is available at: https://translationproject.org/latest/gcc/sv.po (This file, 'gcc-15.2.0.sv.po', has ju

[PATCH 1/4] MIPS: Add basic support for mips allegrex CPU

The MIPS Allegrex CPU is based on MIPS2 with some additional MIPS32r2 instructions and a few novel ones. Support for this CPU was added as of binutils 2.41. gcc/ChangeLog: * config/mips/mips-cpus.def (MIPS_CPU): Added a new CPU. * config/mips/mips-tables.opt: Regenerated table.

[PATCH 3/4] MIPS: Add WSBW instruction to perform bswapsi2

gcc/ChangeLog: * config/mips/mips.h (ISA_HAS_WSBW): Defined a new macro. * config/mips/mips.md (bswapsi2): Add new instruction. (wsbwsi2): Replace with expand to support both wsbw and wsbh. gcc/testsuite/ChangeLog: * gcc.target/mips/bswap-7.c: New test. Signed-of

[PATCH 0/4] Add support for the MIPS Allegrex CPU

Hello gcc developers! These patches add support for the MIPS Allegrex CPU (a device present in the Sony PSP). There's support for this CPU in binutils as of 2.41. This CPU is mostly a MIPS II CPU with some extra instructions and a few quirks. Running the testsuite produces no regressions. I also

[PATCH] diagnostics: Fix -fdump-internal-locations for 64-bit location_t

Hello- This fixes an ICE with -fdump-internal-locations that started with 64-bit location_t support. That option is only really there for debugging, I haven't seen any PR about it. But I would like also to backport it to 15.3 please. bootstrap + regtest all languages on x64-64 Linux looks good. OK

New French PO file for 'gcc' (version 15.2.0)

Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the French team of translators. The file is available at: https://translationproject.org/latest/gcc/fr.po (This file, 'gcc-15.2.0.fr.po', has jus

Re: [PATCH] RISC-V: Fix some generic-vector-ooo pipeline description issues

On 7/28/25 2:40 AM, Anton Blanchard wrote: The crypto type covers scalar (not vector) crypto instructions, and vclz and vctz appear in two places. gcc/ChangeLog: * config/riscv/generic-vector-ooo.md (vec_crypto): Remove crypto, vclz, vctz from insn reservation, rename to vec_

New template for 'gcc' made available

Hello, gentle maintainer. This is a message from the Translation Project robot. (If you have any questions, send them to .) A new POT file for textual domain 'gcc' has been made available to the language teams for translation. It is archived as: https://translationproject.org/POT-files/gcc

[pushed] Darwin: Anchor block internal symbols must not be linker-visible.

Tested on a cross to powerpc-darwin9 and on aarch64-darwin21, pushed to trunk, thanks Iain --- 8< --- When we are using section anchors, there's a requirement that the sequence of the content is an unbroken block. If we allow linker- visible symbols in that block, ld(64) would be able to break i

[pushed] Darwin: Section anchors must be linker-visible.

Tested on a cross to powerpc-darwin9 and on aarch64-darwin21, pushed to trunk, thanks Iain --- 8< --- In principle, these begin (or at least delineate) a region that could be split by the static linker. If the symbols are hidden to newer linkers they produce diagnostics about the temporary symbo

Re: [PATCH] diagnostics: fix build on hosts where unsigned == size_t

On Sat, 2025-08-09 at 00:39 +0100, Sam James wrote: > Sam James writes: > > > David Malcolm writes: > > > > > [...] > > > Test bootstrap on x86_64 in progress.  Is there an easy way to > > > force > > > the bootstrap to use 32-bit? > > > > Try ~/git/gcc/configure --host=i686-pc-linux-gnu > > -

[PATCH] libstdc++: Adjust generate_canonical (P0952, LWG2524) [PR119739]

Changes in V3: * Implement exactly as specified in the WP, for C++26 and up. * Eliminate massive overhead seen in present implementation. Implement P0952R2 "A new specification for std::generate_canonical". It has us start over if the naive generation of a float in 0..1 comes up exactly equal to

[committed] testsuite: Skip class-11_a.H for default_packed targets

The g++.dg/modules/class-11_a.H test expects structs to have a padding. Skip this test for targets which have packed structs by default. This patch fixes the test for pru-unknown-elf from FAIL to UNSUPPORTED. The test still passes on x86_64-linux-gnu. Pushed to trunk as obvious. gcc/testsuite/Ch

[committed] testsuite: Require atomic operations for hardbool-ai.c

The test uses _Atomic int type, so add a filter to ensure the target supports it. This fixes a spurious test failure on pru-unknown-elf, which lacks atomic ops. The test still passes on x86_64-linux-gnu. Pushed to trunk as obvious. gcc/testsuite/ChangeLog: * gcc.dg/torture/hardbool-ai.

Ping: [PATCH v2] testsuite: i386: Fix gcc.target/i386/pr90579.c when PIE is enabled [PR118885]

Ping. On Wed, 2025-07-30 at 04:36 -0700, harish.sadin...@windriver.com wrote: > From: Harish Sadineni > > When gcc build with --enable-deafult-pie the following tests > were getting failed: >  FAIL: gcc.target/i386/pr90579.c scan-assembler vaddsd\tr\\+40 >  FAIL: gcc.target/i386/pr90579.c scan-a