Since i?86 and x86_64 GCC can generate codes for ia32, x32 and lp64, compile asm-hard-reg-5.c for x86 !ia32.
PR testsuite/121205 * gcc.dg/asm-hard-reg-5.c: Compile for x86 !ia32. Signed-off-by: H.J. Lu <hjl.to...@gmail.com> --- gcc/testsuite/gcc.dg/asm-hard-reg-5.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-5.c b/gcc/testsuite/gcc.dg/asm-hard-reg-5.c index a9e25ce1746..ea7907ae2a0 100644 --- a/gcc/testsuite/gcc.dg/asm-hard-reg-5.c +++ b/gcc/testsuite/gcc.dg/asm-hard-reg-5.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target aarch64*-*-* powerpc64*-*-* riscv64-*-* s390*-*-* x86_64-*-* } } */ +/* { dg-do compile { target { { aarch64*-*-* powerpc64*-*-* riscv64-*-* s390*-*-* } || { { i?86-*-* x86_64-*-* } && { ! ia32 } } } } } */ typedef int V __attribute__ ((vector_size (4 * sizeof (int)))); -- 2.50.1