Since i?86 and x86_64 GCC can generate codes for ia32, x32 and lp64,
compile asm-hard-reg-2.c for x86 !ia32 and scan x86.
PR testsuite/121205
* gcc.dg/asm-hard-reg-2.c: Compile for x86 !ia32 and scan x86.
Signed-off-by: H.J. Lu <hjl.to...@gmail.com>
---
gcc/testsuite/gcc.dg/asm-hard-reg-2.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-2.c
b/gcc/testsuite/gcc.dg/asm-hard-reg-2.c
index 7dabf9657cb..5a60f9be4f2 100644
--- a/gcc/testsuite/gcc.dg/asm-hard-reg-2.c
+++ b/gcc/testsuite/gcc.dg/asm-hard-reg-2.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target aarch64*-*-* powerpc64*-*-* riscv64-*-* s390*-*-*
x86_64-*-* } } */
+/* { dg-do compile { target { { aarch64*-*-* powerpc64*-*-* riscv64-*-*
s390*-*-* } || { { i?86-*-* x86_64-*-* } && { ! ia32 } } } } } */
/* { dg-options "-std=c99" } we need long long */
#if defined (__aarch64__)
@@ -15,7 +15,7 @@
/* { dg-final { scan-assembler-times "foo\t%r4" 2 { target { s390*-*-* } } } }
*/
#elif defined (__x86_64__)
# define GPR "{rcx}"
-/* { dg-final { scan-assembler-times "foo\t%rcx" 2 { target { x86_64-*-* } } }
} */
+/* { dg-final { scan-assembler-times "foo\t%rcx" 2 { target { i?86-*-*
x86_64-*-* } } } } */
#endif
long long
--
2.50.1
