On 7/11/25 10:36 PM, Tobias Burnus wrote:
Now, finally pushed as r16-2213-g451b6dbf475959.
Tobias
On June 27, 2025, Tobias Burnus wrote:
Background: In real-world code, one can find:
!$ACC DECLARE COPYIN(c1es, c2es, ...)
as here for the ICON weather model. This clearly implies that other
co
On Thu, Jul 3, 2025 at 3:14 PM H.J. Lu wrote:
>
> On Thu, Jul 3, 2025 at 2:39 PM Uros Bizjak wrote:
> >
> > On Thu, Jul 3, 2025 at 6:32 AM H.J. Lu wrote:
> > >
> > > *tls_local_dynamic_64_ uses RDI as the __tls_get_addr argument.
> > > Add RDI clobber to tls_local_dynamic_64 patterns to show it.
On Wed, Jul 2, 2025 at 11:37 PM Uros Bizjak wrote:
>
> On Wed, Jul 2, 2025 at 2:43 PM H.J. Lu wrote:
> >
> > *tls_global_dynamic_64_ uses RDI as the __tls_get_addr argument.
> > Add RDI clobber to tls_global_dynamic_64 patterns to show it.
> >
> > PR target/120908
> > * config/i386/i386.cc (legit
"H.J. Lu" writes:
> On Sat, Jul 12, 2025 at 6:58 AM Siddhesh Poyarekar
> wrote:
>>
>> On 2025-07-11 15:28, Uros Bizjak wrote:
>> >> Why not just switch over unconditionally? __fentry__ seems like a
>> >> better alternative to mcount overall and it has been around long enough
>> >> that even ol
On Sat, Jul 12, 2025 at 6:58 AM Siddhesh Poyarekar wrote:
>
> On 2025-07-11 15:28, Uros Bizjak wrote:
> >> Why not just switch over unconditionally? __fentry__ seems like a
> >> better alternative to mcount overall and it has been around long enough
> >> that even older deployments should be rela
Follow-up: We have managed to determine that we are have managed, under
some circumstances, to create GENERIC nodes whose location_t components
have a line number of -1.
Evidence suggests that your new code is sensitive to that in ways that the
code it replaced was not.
It's obviously our job no
Please be aware that something introduced in
385d9937f0e - Rewrite assign_discriminators
has since caused a "make cobol-check" failure. The backtrace generated
during the attempt to compile
cobol.dg/group1/simple-classes.cob
looks like this
cobol1: internal compiler error: in get_or_insert,
Hi!
As always, thank you :-)
On Fri, Jul 11, 2025 at 02:43:12PM -0400, Vladimir Makarov wrote:
> gcc/ChangeLog:
>
> * lra-constraints.cc (process_address_1): When changing base reg
> on a reg of the base class, fall back to reload of whole inner
> address.
>
MMX allows only direct moves from zero, so correct V_32:mode and v2qi
move patterns to allow only nonimm_or_0_operand as their input operand.
gcc/ChangeLog:
* config/i386/mmx.md (mov):
Use nonimm_or_0_operand predicate for operand 1.
(*mov_internal): Ditto.
(movv2qi): Ditto.
(
Hi!
On Sat, Jul 12, 2025 at 09:47:53PM +0800, Xi Ruoyao wrote:
> On Fri, 2025-07-11 at 14:01 -0500, Peter Bergner wrote:
> > On 7/11/25 10:22 AM, Vladimir Makarov wrote:
> > > On 7/8/25 9:43 PM, Xi Ruoyao wrote:
> > > >
> > > > IIUC "recog does not look at constraints until reload" has been a
> >
On Fri, 2025-07-11 at 14:01 -0500, Peter Bergner wrote:
> On 7/11/25 10:22 AM, Vladimir Makarov wrote:
> > On 7/8/25 9:43 PM, Xi Ruoyao wrote:
> > >
> > > IIUC "recog does not look at constraints until reload" has been a
> > > well-established rule in GCC for years and I don't have enough skill to
>
> This caused:
>
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121045
I see, -compare-debug actually compares discriminators in dump of final
pass. Discriminators do not need to be the same if they are unused
and they are consumed only by dwaf2out and by auto-profile, so I think
compare-debu
On Sat, Jul 12, 2025 at 1:41 PM H.J. Lu wrote:
>
> On Sat, Jul 12, 2025 at 5:58 PM Uros Bizjak wrote:
> >
> > On Sat, Jul 12, 2025 at 11:52 AM H.J. Lu wrote:
> > >
> > > On Sat, Jul 12, 2025 at 5:03 PM Uros Bizjak wrote:
> > > >
> > > > On Fri, Jul 11, 2025 at 6:05 AM H.J. Lu wrote:
> > > > >
On Sat, Jul 12, 2025 at 5:58 PM Uros Bizjak wrote:
>
> On Sat, Jul 12, 2025 at 11:52 AM H.J. Lu wrote:
> >
> > On Sat, Jul 12, 2025 at 5:03 PM Uros Bizjak wrote:
> > >
> > > On Fri, Jul 11, 2025 at 6:05 AM H.J. Lu wrote:
> > > >
> > > > commit 77473a27bae04da99d6979d43e7bd0a8106f4557
> > > > Au
On Sat, Jul 12, 2025 at 11:52 AM H.J. Lu wrote:
>
> On Sat, Jul 12, 2025 at 5:03 PM Uros Bizjak wrote:
> >
> > On Fri, Jul 11, 2025 at 6:05 AM H.J. Lu wrote:
> > >
> > > commit 77473a27bae04da99d6979d43e7bd0a8106f4557
> > > Author: H.J. Lu
> > > Date: Thu Jun 26 06:08:51 2025 +0800
> > >
> >
On Sat, Jul 12, 2025 at 5:03 PM Uros Bizjak wrote:
>
> On Fri, Jul 11, 2025 at 6:05 AM H.J. Lu wrote:
> >
> > commit 77473a27bae04da99d6979d43e7bd0a8106f4557
> > Author: H.J. Lu
> > Date: Thu Jun 26 06:08:51 2025 +0800
> >
> > x86: Also handle all 1s float vector constant
> >
> > replaces
On Fri, Jul 11, 2025 at 6:05 AM H.J. Lu wrote:
>
> commit 77473a27bae04da99d6979d43e7bd0a8106f4557
> Author: H.J. Lu
> Date: Thu Jun 26 06:08:51 2025 +0800
>
> x86: Also handle all 1s float vector constant
>
> replaces
>
> (insn 29 28 30 5 (set (reg:V2SF 107)
> (mem/u/c:V2SF (symbol
From: Pan Li
Add the run and asm testcase for rv32 SAT_MUL, widen mul from
uint8_t, uint16_t, uint32_t to uint64_t.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/sat/sat_u_mul-1-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-1-u32-from-u64.c: New test.
* gcc.ta
From: Pan Li
The widen mul will have source type from N-bits to
dest type 2N-bits. The previous check only focus on
the HOST_WIDE_INT but not working for QI => HI, HI => SI
and SI to DImode. Thus, refine the widen mul precision
check as dest has twice bits of input.
gcc/ChangeLog:
* m
From: Pan Li
The widen mul will have source type from N-bits to
dest type 2N-bits. The previous check only focus on
the HOST_WIDE_INT but not working for QI => HI, HI => SI
and SI => DI. Thus, refine the widen mul precision
check, aka dest has twice bits of input.
The below test suites are pas
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