On Fri, 2025-07-11 at 14:01 -0500, Peter Bergner wrote:
> On 7/11/25 10:22 AM, Vladimir Makarov wrote:
> > On 7/8/25 9:43 PM, Xi Ruoyao wrote:
> > > 
> > > IIUC "recog does not look at constraints until reload" has been a
> > > well-established rule in GCC for years and I don't have enough skill to
> > > challange it.  So reallow reloading user hard registers (but still
> > > disallow doing so for asm) to fix the ICE.
> 
> I agree we should allow spilling of user defined hardregs outside of inline
> asms if needed.  That said, I hesitate in spilling of hardregs (user defined
> or not) in any other scenarios.

> > > However before reload, recog completely ignores the constraints of
> > > insns, so the RTL passes may produce insns where some user hard
> > > registers violate an earlyclobber.  Then we'll get an ICE without
> > > reloading them, like what we are recently encountering in LoongArch test
> > > suite.
> 
> I wonder if the correct "fix" is to actually not generate the problematical
> rtl insn in the first place?  Maybe recog() before lra should check for
> issues with early clobbers and constraints when there are hard registers
> involved?

Or maybe it's easier to make the only valid use of user-defined hard
registers moves before reload.  I.e.

  register int r4 asm("r4");
  register int r5 asm("r5");
  r4 += r5;

perhaps should become something like

  (set (reg:SI 1000) (reg:SI 4))
  (set (reg:SI 1001) (reg:SI 5))
  (set (reg:SI 1002) (plus:SI (reg:SI 1001) (reg:SI 1002)))
  (set (reg:SI 4) (reg:SI 1002))

and it'll only be folded into a simple

  (set (reg:SI 4) (plus (reg:SI 4) (reg:SI 5)))

at reload, if the add instruction constraint allows this (IIRC Segher
said reload is capable to do it).

But I don't have enough skill to implement this :(.

> 
> >> -                  /* Operands don't match.  If the operands are
> >> -                     different user defined explicit hard
> >> +                  /* Operands don't match.  For asm if the
> operands
> >> +                     are different user defined explicit hard
> >>                       registers, then we cannot make them match
> >>                       when one is early clobber operand.  */
> 
> I know this existed before your patch, but:
> 
> s/when one is early clobber operand/when one is an early clobber
> operand/

Already pushed before I saw this :(.  I'll push a separate patch if
nothing forces a revert of my patch in a week, as Vlad said.

-- 
Xi Ruoyao <xry...@xry111.site>

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