Hi!
On Sat, Jul 12, 2025 at 09:47:53PM +0800, Xi Ruoyao wrote:
> On Fri, 2025-07-11 at 14:01 -0500, Peter Bergner wrote:
> > On 7/11/25 10:22 AM, Vladimir Makarov wrote:
> > > On 7/8/25 9:43 PM, Xi Ruoyao wrote:
> > > >
> > > > IIUC "recog does not look at constraints until reload" has been a
> > > > well-established rule in GCC for years and I don't have enough skill to
> > > > challange it. So reallow reloading user hard registers (but still
> > > > disallow doing so for asm) to fix the ICE.
This is not true, recog does look at everything always. It might be
that inplementation things make it overlook some things though! That's
what PRs are for.
> > I agree we should allow spilling of user defined hardregs outside of inline
> > asms if needed. That said, I hesitate in spilling of hardregs (user defined
> > or not) in any other scenarios.
It cannot work at all, yeah, so let's not do that.
> > > > However before reload, recog completely ignores the constraints of
> > > > insns, so the RTL passes may produce insns where some user hard
> > > > registers violate an earlyclobber. Then we'll get an ICE without
> > > > reloading them, like what we are recently encountering in LoongArch test
> > > > suite.
> >
> > I wonder if the correct "fix" is to actually not generate the problematical
> > rtl insn in the first place? Maybe recog() before lra should check for
> > issues with early clobbers and constraints when there are hard registers
> > involved?
>
> Or maybe it's easier to make the only valid use of user-defined hard
> registers moves before reload. I.e.
>
> register int r4 asm("r4");
> register int r5 asm("r5");
> r4 += r5;
As Vlad says, yes. We already try to do that!
Hard regs should only be allowed in simple register moves, before
reload. And it should be pretty easy to write RTL checking for that!
RTL checking is often hard to do, there is not enough context available
often, but here it should work fine :-) (Or, maybe we can do some much
stronger kind of RTL checking, run from emit_insn perhaps!)
Segher
