At least my introduction of a new --param made raising the LTO IL
minor necessary, so do it now, also in preparation for GCC 15.2.
Will push shortly.
* lto-streamer.h (LTO_minor_version): Bump to 1.
---
gcc/lto-streamer.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Wed, 25 Jun 2025, Richard Biener wrote:
> On Wed, 25 Jun 2025, Robin Dapp wrote:
>
> > Hi,
> >
> > this patch adds simple misalignment checks for gather/scatter
> > operations. Previously, we assumed that those perform element accesses
> > internally so alignment does not matter. The riscv
On Thu, Jun 26, 2025 at 2:11 PM Hongtao Liu wrote:
>
> On Thu, Jun 26, 2025 at 1:59 PM H.J. Lu wrote:
> >
> > Use the inner scalar mode of vector broadcast source in:
> >
> > (set (reg:V8DF 394)
> >(vec_duplicate:V8DF (reg:V2DF 190 [ alpha ])))
> >
> > to compute the vector mode for bro
On Thu, Jun 26, 2025 at 2:02 PM H.J. Lu wrote:
>
> Since float vector constant
>
> (const_vector:V4SF [(const_double:SF -QNaN [-QNaN]) repeated x4])
>
> is an all 1s float vector constant, update the remove_redundant_vector
> pass to replace
>
> (insn 20 18 21 2 (set (reg:V4SF 124)
> (cons
On Thu, Jun 26, 2025 at 1:59 PM H.J. Lu wrote:
>
> Use the inner scalar mode of vector broadcast source in:
>
> (set (reg:V8DF 394)
>(vec_duplicate:V8DF (reg:V2DF 190 [ alpha ])))
>
> to compute the vector mode for broadcast from vector source.
ix86_get_vector_cse_mode (unsigned int si
Since float vector constant
(const_vector:V4SF [(const_double:SF -QNaN [-QNaN]) repeated x4])
is an all 1s float vector constant, update the remove_redundant_vector
pass to replace
(insn 20 18 21 2 (set (reg:V4SF 124)
(const_vector:V4SF [
(const_double:SF -QNaN [-QNaN]) r
On Thu, Jun 26, 2025 at 1:56 PM H.J. Lu wrote:
>
> On Thu, Jun 26, 2025 at 1:24 PM Hongtao Liu wrote:
> >
> > On Thu, Jun 26, 2025 at 6:20 AM H.J. Lu wrote:
> > >
> > > For tcpsock_test.go in libgo tests,
> > >
> > > commit aba3b9d3a48a0703fd565f7c5f0caf604f59970b
> > > Author: H.J. Lu
> > > Da
Use the inner scalar mode of vector broadcast source in:
(set (reg:V8DF 394)
(vec_duplicate:V8DF (reg:V2DF 190 [ alpha ])))
to compute the vector mode for broadcast from vector source.
gcc/
PR target/120830
* config/i386/i386-features.cc (ix86_get_vector_cse_mode): Handle
vector broadc
On Thu, Jun 26, 2025 at 1:24 PM Hongtao Liu wrote:
>
> On Thu, Jun 26, 2025 at 6:20 AM H.J. Lu wrote:
> >
> > For tcpsock_test.go in libgo tests,
> >
> > commit aba3b9d3a48a0703fd565f7c5f0caf604f59970b
> > Author: H.J. Lu
> > Date: Fri May 9 07:17:07 2025 +0800
> >
> > x86: Extend the remo
On Jun 25, 2025, Vladimir Makarov wrote:
> Alex, thanks for investigation of corner cases of register elimination.
You're welcome. Thanks for the reviews
> I guess it is too strict.
Yeah. I have a less strict version that relaxes it enough to not
regress acats-4 on arm-linux-gnueabihf, and t
On Thu, Jun 26, 2025 at 6:20 AM H.J. Lu wrote:
>
> For tcpsock_test.go in libgo tests,
>
> commit aba3b9d3a48a0703fd565f7c5f0caf604f59970b
> Author: H.J. Lu
> Date: Fri May 9 07:17:07 2025 +0800
>
> x86: Extend the remove_redundant_vector pass
>
> added an instruction:
>
> (insn 501 101 102
On Wed, Jun 25, 2025 at 3:35 PM H.J. Lu wrote:
>
> Add preserve_none attribute which is similar to no_callee_saved_registers
> attribute, except on x86-64, r12, r13, r14, r15, rdi and rsi registers are
> used for integer parameter passing. This can be used in an interpreter
> to avoid saving/rest
In the case of tailing call with a return of a structure, currently
all large structures are rejected. We can allow the case were the return
of the "tail call" function is setting the return value of the current
function. This allows for the musttail that is located in pr71761-1.c.
This should be
> -Original Message-
> From: Andrew Pinski (QUIC)
> Sent: Wednesday, June 25, 2025 4:20 PM
> To: Andrew Pinski (QUIC) ; gcc-
> patc...@gcc.gnu.org
> Subject: RE: [PATCH] expand: Allow sibcalling for return
> structures in some cases [PR71761]
>
> > -Original Message-
> > From: And
On Thu, Jun 26, 2025 at 6:21 AM H.J. Lu wrote:
>
> On Tue, Jun 24, 2025 at 2:21 PM H.J. Lu wrote:
> >
> > Add debug dump for the remove_redundant_vector pass with the following
> > output:
> >
> > Replace:
> >
> > (insn 7 4 8 2 (set (reg:V2DI 103)
> > (const_vector:V2DI [
> >
On Wed, Jun 25, 2025 at 4:59 PM Florian Weimer wrote:
>
> * H. J. Lu:
>
> > Add preserve_none attribute which is similar to no_callee_saved_registers
> > attribute, except on x86-64, r12, r13, r14, r15, rdi and rsi registers are
> > used for integer parameter passing. This can be used in an inter
Fixing issue with thumb1 code generation clobbering register. Detailed in
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117468
Test case included; run with:
make check-c RUNTESTFLAGS="--target-board='arm-sim/-march=armv5t'
arm.exp=pr117468.c"
gcc/ChangeLog:
* arm.cc: fix thumb1 prologue
> -Original Message-
> From: Andrew Pinski (QUIC)
> Sent: Monday, June 23, 2025 11:39 AM
> To: Andrew Pinski (QUIC) ; gcc-
> patc...@gcc.gnu.org
> Subject: RE: [PATCH] expand: Allow sibcalling for return
> structures in some cases [PR71761]
>
> > -Original Message-
> > From: Andre
On 6/25/25 2:51 PM, Jakub Jelinek wrote:
Hi!
The following patch attempts to implement the C++26 P2830R10 - Constexpr Type
Ordering paper, with a minor change that std::type_order class template
doesn't derive from integer_constant, because std::strong_ordering is not
a structural type (except i
Trying again, hopefully formatted correctly this time, and now including a test
case. Test case fails with original code, passes with patch. Command to execute
test case:
make check-c RUNTESTFLAGS="--target-board='arm-sim/-march=armv5t'
arm.exp=pr117366.c"
gcc/ChangeLog:
* arm.cc: fix
On Tue, Jun 24, 2025 at 2:21 PM H.J. Lu wrote:
>
> Add debug dump for the remove_redundant_vector pass with the following
> output:
>
> Replace:
>
> (insn 7 4 8 2 (set (reg:V2DI 103)
> (const_vector:V2DI [
> (const_int 0 [0]) repeated x2
> ])) "x.c":8:13 2406 {m
For tcpsock_test.go in libgo tests,
commit aba3b9d3a48a0703fd565f7c5f0caf604f59970b
Author: H.J. Lu
Date: Fri May 9 07:17:07 2025 +0800
x86: Extend the remove_redundant_vector pass
added an instruction:
(insn 501 101 102 21 (set (reg:V2DI 234)
(vec_duplicate:V2DI (reg:DI 111 [ _4
Andreas reported openvino failed to build with LTO enabled with gcc-15
on RISC-V. The included .o file was enough for me to reproduce the
problem and it was trivial to then track it down to a fix I'd already
made to the trunk.
commit b93d8873cda88f0892c7782b274904fa8d3751fb
Author: Jeff Law
Hi,
update of std module is missing.
Regards,
Maciej
Hi all,
fix incorrect declarations in the libcaf.h header and use the correct printf
function when printing a va_list. (The latter is stripped into a separate file
by the next patch of this series.)
Regtests ok on x86_64-pc-linux-gnu / F41. Ok for mainline?
Regards,
Andre
--
Andre Vehre
I posted this on the LLVM Discourse forum[1] and got some traction, so
I want to get the GCC community's input. (My initial proposal is
replicated here.)
I had already mentioned this in previous emails in this thread, so
it's nothing super new, and there have been some suggested
improvements alrea
On 6/25/25 12:49 PM, Jakub Jelinek wrote:
On Wed, Jun 25, 2025 at 12:37:33PM -0400, Jason Merrill wrote:
Ah, looks like fixed_type_or_null needs to handle a CALL_EXPR of class type
like a TARGET_EXPR. I also wonder why the call isn't already wrapped in a
TARGET_EXPR by build_cxx_call=>build_cpl
Am 25.06.25 um 13:45 schrieb Andre Vehreschild:
Hi,
while hunting for pr120711 I found a construct where a call-tree was created
and never used. The patch now just suppresses the tree creation and instead
uses directly the tree that is desired.
Regtests ok on x86_64-pc-linux-gnu / F41. Ok for m
Move the rules for CBZ/TBZ to be above the rules for
CBB/CBH/CB. We want them to have higher priority
because they can express larger displacements.
gcc/ChangeLog:
* config/aarch64/aarch64.md (aarch64_cbz1): Move
above rules for CBB/CBH/CB.
(*aarch64_tbz1): Likewise.
gcc/
This is a followup to 92e1893e0 "RISC-V: Add patterns for vector-scalar
multiply-(subtract-)accumulate" that caused an ICE in some cases where the mult
operands were wrongly swapped.
This patch ensures that operands are not swapped in the vector-scalar case.
PR target/120828
gcc/ChangeLog
The function `vect_check_gather_scatter` requires the `base` of the load
to be loop-invariant and the `off`set to be not loop-invariant. When faced
with a scenario where `base` is not loop-invariant, instead of giving up
immediately we can try swapping the `base` and `off`, if `off` is
actually loo
Am 25.06.25 um 13:42 schrieb Andre Vehreschild:
Hi,
attached patch prevents generation of a token component in derived types, when
-fcoarray=single is used. Generating the token only wastes memory. It is never
even initialized nor accessed.
Regtests ok on x86_64-pc-linux-gnu / F41. Ok for mainl
Hi!
The following patch implements the P3618R0 paper by tweaking pedwarn
condition, adjusting pedwarn wording, adjusting one testcase and adding 4
new ones. The paper was voted in as DR, so it isn't guarded on C++ version.
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
202
Am 25.06.25 um 13:39 schrieb Andre Vehreschild:
Hi all,
attached patch fixes an out of bounds access in the clean up code of a
concatenating array constructor. A fragment like
list = [ list, something() ]
lead to clean up using an offset (of the list array) that was manipulated in
the loop cop
On 6/24/25 11:49 PM, Andre Vehreschild wrote:
Hi Jerry,
thank you very much. Just try it. I can only imagine that Paul had a somehow
corrupted build directory or left overs from some previous build. I am still
wondering, that I got no automated mail from the build hosts, but I can
imagine, that
Give the `define_insn` rules used in lowering `cbranch4` to RTL
more descriptive and consistent names: from now on, each rule is named
after the AArch64 instruction that it generates. Also add comments to
document each rule.
gcc/ChangeLog:
* config/aarch64/aarch64.md (condjump): Rename to
Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk/branches?
-- >8 --
Here we end up with "error reporting routines re-entered" because
resolve_nondeduced_context isn't passing complain to mark_used.
PR c++/120756
gcc/cp/ChangeLog:
* pt.cc (resolve_nondeduced_context):
> Am 25.06.2025 um 16:26 schrieb Martin Jambor :
>
> Hi,
>
> when compiling tree-vect-stmts.cc with clang, it emits a warning:
>
> gcc/tree-vect-stmts.cc:14930:19: warning: unused variable 'mode_iter'
> [-Wunused-variable]
>
> And indeed, there are two mode_iter local variables in functio
The following allows SLP build to succeed when mixing .FMA/.FMS
in different lanes like we handle mixed plus/minus. This does not
yet address SLP pattern matching to not being able to form
a FMADDSUB from this.
Bootstrapped and tested on x86_64-unknown-linux-gnu.
While the testcases are x86 spec
Add preserve_none attribute which is similar to no_callee_saved_registers
attribute, except on x86-64, r12, r13, r14, r15, rdi and rsi registers are
used for integer parameter passing. This can be used in an interpreter
to avoid saving/restoring the registers in functions which process byte
codes.
Karl Meakin writes:
> Move the rules for CBZ/TBZ to be above the rules for
> CBB/CBH/CB. We want them to have higher priority
> because they can express larger displacements.
>
> gcc/ChangeLog:
>
> * config/aarch64/aarch64.md (aarch64_cbz1): Move
> above rules for CBB/CBH/CB.
> (
Thanks for cleaning up gfortran code. I was curious about
what the GNU Coding Standard said about this case, but it
does not consider initialization of subobjects. I did find
5.3 Clean Use of C Constructs
...
Don't make the program ugly just to placate static
analysis tools such as l
Richard Biener writes:
> On Tue, 24 Jun 2025, Richard Sandiford wrote:
>
>> Tamar Christina writes:
>> > store_bit_field_1 has an optimization where if a target is not a memory
>> > operand
>> > and the entire value is being set from something larger we can just wrap a
>> > subreg around the sou
Add the `+cmpbr` option to enable the FEAT_CMPBR architectural
extension.
gcc/ChangeLog:
* config/aarch64/aarch64-option-extensions.def (cmpbr): New
option.
* config/aarch64/aarch64.h (TARGET_CMPBR): New macro.
* doc/invoke.texi (cmpbr): New option.
---
gcc/config
* H. J. Lu:
> Add preserve_none attribute which is similar to no_callee_saved_registers
> attribute, except on x86-64, r12, r13, r14, r15, rdi and rsi registers are
> used for integer parameter passing. This can be used in an interpreter
> to avoid saving/restoring the registers in functions whic
Commit the test file `cmpbr.c` before rules for generating the new
instructions are added, so that the changes in codegen are more obvious
in the next commit.
gcc/testsuite/ChangeLog:
* lib/target-supports.exp: Add `cmpbr` to the list of extensions.
* gcc.target/aarch64/cmpbr.c: N
On 5/21/25 10:14 PM, Nathaniel Shead wrote:
This patch isn't currently necessary with how I've currently done the
follow-up patches, but is needed for avoiding any potential issues in
the future with DECL_CONTEXT'ful types getting created in the compiler
with no names on the fields. (For instanc
Make the formatting of the RTL templates in the rules for branch
instructions more consistent with each other.
gcc/ChangeLog:
* config/aarch64/aarch64.md (cbranch4): Reformat.
(cbranchcc4): Likewise.
(condjump): Likewise.
(*compare_condjump): Likewise.
(aar
On 6/25/25 7:29 AM, Nathaniel Shead wrote:
On Tue, Jun 24, 2025 at 11:14:51AM -0400, Jason Merrill wrote:
On 6/24/25 10:16 AM, Nathaniel Shead wrote:
On Tue, Jun 24, 2025 at 01:03:53PM +0200, Jakub Jelinek wrote:
Hi!
The following patch implements the P3618R0 paper by tweaking pedwarn
conditi
On Wed, 25 Jun 2025 at 19:51, Jakub Jelinek wrote:
>
> Hi!
>
> The following patch attempts to implement the C++26 P2830R10 - Constexpr Type
> Ordering paper, with a minor change that std::type_order class template
> doesn't derive from integer_constant, because std::strong_ordering is not
> a str
On Wed, 25 Jun 2025 at 19:56, Jakub Jelinek wrote:
>
> Hi!
>
> The following patch attempts to implement the C++26 P2927R3 - Inspecting
> exception_ptr
> paper (but not including P3748R0, I plan to play with it incrementally and
> it will really depend on the Constexpr exceptions patch).
>
> The
Hi,
this pass removes early-inlining from afdo pass since all inlining
should now happen from early inliner. I tedted this on spec and there
are 3 inlines happening here which are blocked at early-inline time by
hitting large function growth limit. We probably want to bypass that
limit, I will lo
gcc/ChangeLog:
* tree-object-size.cc (access_with_size_object_size): Update comments
for pointers with .ACCESS_WITH_SIZE.
(collect_object_sizes_for): Propagate size info through GIMPLE_ASSIGN
for pointers with .ACCESS_WITH_SIZE.
gcc/testsuite/ChangeLog:
*
On 6/25/25 1:28 PM, Marek Polacek wrote:
@@ -24604,7 +24604,7 @@ resolve_nondeduced_context (tree orig_expr,
tsubst_flags_t complain)
}
if (good == 1)
{
- mark_used (goodfn);
+ mark_used (goodfn, complain);
Actually, if we're going to pass complain, we s
> Am 25.06.2025 um 17:27 schrieb Karl Meakin :
>
> The function `vect_check_gather_scatter` requires the `base` of the load
> to be loop-invariant and the `off`set to be not loop-invariant. When faced
> with a scenario where `base` is not loop-invariant, instead of giving up
> immediately we c
On 6/25/25 1:28 PM, Marek Polacek wrote:
Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk/branches?
OK.
-- >8 --
Here we end up with "error reporting routines re-entered" because
resolve_nondeduced_context isn't passing complain to mark_used.
PR c++/120756
gcc/cp/ChangeLo
Andre,
this series of patches (six in total) adds a new coarray backend library to
libgfortran. The library uses shared memory and processes to implement
running multiple images on the same node. The work is based on work started by
Thomas and Nicolas Koenig. No changes to the gfortran compile
Hi,
when building GCC with clang, it warns that the private member suffix
in class cp_coroutine_transform (defined in gcc/cp/coroutines.h) is
not used which indeed looks like it is the case. This patch therefore
removes it.
Bootstrapped and tested on x86_64-linx. OK for master?
Alternatively,
Hi,
When GCC is built with clang, it emits warnings that several member
functions of various ranger classes override a virtual function of an
ancestor but are not marked with the override keyword. After
inspecting the cases, I found that all these classes had other member
functions marked as fina
Hi all,
This is a small change to ivopts to expand SSA variables enabling ivopts to
correctly work out when an address IV step is set to be a multiple on index
step in the loop header (ie, not constant, not calculated each loop.)
Seems like this might have compile speed costs that need to be cons
> > What seems to be common now is profile breakage around loops that has
> > been fully unrolled or vectorized which is bit undderstandbale thought I
> > wonder if we can improve here. I think we can fix problem where profile
> > of loop header stmts is partly or fully lost (which seems to be mai
Hi all,
this patch fixes handling of optional arguments to coarray routines. Again I
stumbled over this while implementing caf_shmem. I did not find a ticket either.
Regtests ok on x86_64-pc-linux-gnu / F41. Ok for mainline?
Regards,
Andre
--
Andre Vehreschild * Email: vehre ad gmx dot
> Here is the v3 patch. It no longer uses "rep mov/stos". Lili, can you
> measure
> its performance impact on Intel and AMD cpus?
>
> The updated generic has
>
> Update memcpy and memset inline strategies for -mtune=generic:
>
> 1. Don't align memory.
This looks OK to me (recent microarchs s
This is the 7th version of the patch set to extend "counted_by" attribute
to pointer fields of structures.
The C FE parts (patch #1 and #3) of the 5th version have been approved
by Joseph already (with a minor typo fix, which is included in this new
version);
The middle end part (patch #2) of t
> From:Kito Cheng
> Send Time:2025 Jun. 19 (Thu.) 15:08
> To:yunzezhu; Jeff Law
> CC:"gcc-patches"
> Subject:Re: [PATCH v2 1/4] RISC-V: Add support for xtheadvector unit-stride
> segment load/store intrinsics
>
> Hi YunZe:
>
> Generally I am open minded to accept vendor extensions, however thi
Christoph Müllner writes:
> insn_info::has_been_deleted () is documented to return true if an
> instruction is deleted. Such instructions have their `volatile` bit set,
> which can be tested via rtx_insn::deleted ().
>
> The current condition for insn_info::has_been_deleted () is:
> * m_rtl is no
On Tue, Jun 24, 2025 at 4:54 AM Cui, Lili wrote:
> > > > From: Lili Cui
> > > >
> > > > Hi Uros,
> > > >
> > > > I need to remove another assertion in the shrink wrap separate patch.
> > > Added two cases for changing the CHECK_STACK_LIMIT value.
> > > >
> > > > The default values for CHECK_STAC
If gfortran will have a shared-memory coarray implemented, it would be
great to also drop the requirement to pass -fcoarray. Other compilers
have trended in the direction of dropping the flag too, including Cray and
NAG.
Even all these years after Fortran 2008 introduced multi-image execution, I
The function `vect_check_gather_scatter` requires the `base` of the load
to be loop-invariant and the `off`set to be not loop-invariant. When faced
with a scenario where `base` is not loop-invariant, instead of giving up
immediately we can try swapping the `base` and `off`, if `off` is
actually loo
From: panciyan
This patch would like to support signed scalar SAT_ADD IMM form 2
Form2:
T __attribute__((noinline)) \
sat_s_add_imm_##T##_fmt_2##_##INDEX (T x)\
{\
T sum = (T)((UT)x
Add the `+cmpbr` option to enable the FEAT_CMPBR architectural
extension.
gcc/ChangeLog:
* config/aarch64/aarch64-option-extensions.def (cmpbr): New
option.
* config/aarch64/aarch64.h (TARGET_CMPBR): New macro.
* doc/invoke.texi (cmpbr): New option.
---
gcc/config
On Tue, Jun 17, 2025 at 8:54 PM Cui, Lili wrote:
>
>
>
> > -Original Message-
> > From: H.J. Lu
> > Sent: Monday, June 16, 2025 10:08 PM
> > To: Jan Hubicka
> > Cc: Uros Bizjak ; Cui, Lili ; gcc-
> > patc...@gcc.gnu.org; Liu, Hongtao ;
> > mjgu...@gmail.com
> > Subject: [PATCH v3] x86: U
Extract the hardcoded values for the minimum PC-relative displacements
into named constants and document them.
gcc/ChangeLog:
* config/aarch64/aarch64.md (BRANCH_LEN_P_128MiB): New constant.
(BRANCH_LEN_N_128MiB): Likewise.
(BRANCH_LEN_P_1MiB): Likewise.
(BRANCH_LE
On Tue, Jun 24, 2025 at 5:40 PM Richard Sandiford
wrote:
>
> process_uses_of_deleted_def seems to have been written on the assumption
> that non-degenerate phis would be explicitly deleted by an insn_change,
> and that the function therefore only needed to delete degenerate phis.
> But that was in
This is patch #3 of 3 to add -mcpu=future support to the PowerPC.
Compared to the previous version of tis patch, I update a comment to say
_ARCH_FUTURE instead of _ARCH_PWR11 that was a typo.
This patch adds simple tests for -mcpu=future.
I have tested these patches on both big endian and little
store_bit_field_1 has an optimization where if a target is not a memory operand
and the entire value is being set from something larger we can just wrap a
subreg around the source and emit a move.
For vector constructors this is however problematic because the subreg means
that the expansion of th
Hi all,
this patch fixes setting the coarray bounds correctly when a scalar char array
(i.e. CHARACTER(len=N)) is passed to function expecting a coarray. And when a
derived type coarray is passed to a function expecting a polymorphically typed
coarray as argument.
Regtests ok on x86_64-pc-linux-
This is patch #2 of 3 to add -mcpu=future support to the PowerPC.
This patch makes -mtune=future use the same tuning decision as -mtune=power10 or
-mtune=power11.
I added a new attribute (power10_tuning) that says whether the current processor
is tuned like a power10. This is true for power10, p
Hi!
The following patch attempts to implement the C++26 P2830R10 - Constexpr Type
Ordering paper, with a minor change that std::type_order class template
doesn't derive from integer_constant, because std::strong_ordering is not
a structural type (except in MSVC), so instead it is just a class temp
Hi!
The following patch attempts to implement the C++26 P2927R3 - Inspecting
exception_ptr
paper (but not including P3748R0, I plan to play with it incrementally and
it will really depend on the Constexpr exceptions patch).
The function template is implemented using an out of line private method
This is patch #1 of 3 that adds the support that can be used in developing GCC
support for potential future PowerPC processors. With all 3 patches, the tuning
for the 'future' processor is the same as power10 and power11. It may be in the
future this tuning will change as any future PowerPC proce
> Am 25.06.2025 um 16:30 schrieb Martin Jambor :
>
> Hi,
>
> since r15-4695-gd17e672ce82e69 (Richard Biener: Assert finished
> vectorizer pattern COND_EXPR transition), the static const array
> cond_expr_maps is unused and when GCC is compiled with clang, it warns
> about that.
>
> This patc
On Wed, Jun 25, 2025 at 04:09:26PM +0200, Martin Jambor wrote:
> Hi,
>
> When compiling fortran/match.cc, clang emits a warning
>
> fortran/match.cc:5301:7: warning: variable 'p' is used uninitialized
> whenever 'if' condition is true [-Wsometimes-uninitialized]
>
> which looks accurate, so t
Andre,
I assumed that there would be some overhead, and perhaps bloat,
if -fcoarray=single were made the default. With the introduction
of a shmem runtime, changing the default is likely a GCC 17 change
and not something we should pursue for GCC 16.
Yes, I know that this uses shmem and not MPI.
On 5/21/25 10:16 PM, Nathaniel Shead wrote:
I'm not sure if there might be a better way to retrieve the prefix back
off an IDENTIFIER_NODE?
I don't think so, given that a target could do arbitrary transformations
in ASM_GENERATE_INTERNAL_LABEL.
I'm also not sure if IDENTIFIER_INTERNAL_P
cou
On 5/21/25 10:15 PM, Nathaniel Shead wrote:
This type currently has a DECL_NAME of an IDENTIFIER_DECL. Although the
documentation indicates this is legal, this confuses modules streaming
which expects all RECORD_TYPEs to have a TYPE_DECL, which is used to
determine the context and merge key, etc
Hi,
in contrib we have a script filter-clang-warnings.py which supposedly
filters out uninteresting warnings emitted by clang when it compiles
GCC. I'm not sure if anyone else uses it but our internal SUSE
testing infrastructure does.
Since Martin Liška left, I have mostly ignored the warnings a
On Wed, Jun 25, 2025 at 12:37:33PM -0400, Jason Merrill wrote:
> Ah, looks like fixed_type_or_null needs to handle a CALL_EXPR of class type
> like a TARGET_EXPR. I also wonder why the call isn't already wrapped in a
> TARGET_EXPR by build_cxx_call=>build_cplus_new at this point.
Wonder if it has
On Wed, 2025-06-25 at 16:04 +0200, Martin Jambor wrote:
> Hi,
>
> When compiling diagnostic-path-output.cc with clang, it warns that
> path_label::get_effects should be marked as override. That looks
> like
> a good idea and from a brief look I also believe it should be marked
> as final (the oth
On 6/25/25 3:08 AM, Jakub Jelinek wrote:
On Tue, Jun 24, 2025 at 05:19:59PM -0400, Jason Merrill wrote:
I think we could move the initialization of the fixed_type_p and
virtual_access variables up, they don't need to be after cp_build_addr_expr.
I don't understand why it doesn't depend on cp_b
Tomasz Kamiński writes:
> This patch reworks the formatting for the chrono types, such that they are all
> formatted in terms of _ChronoData class, that includes all required fields.
> Populating each required field is performed in formatter for specific type,
> based on the chrono-spec used.
>
>
The rules for conditional branches were spread throughout `aarch64.md`.
Group them together so it is easier to understand how `cbranch4`
is lowered to RTL.
gcc/ChangeLog:
* config/aarch64/aarch64.md (condjump): Move.
(*compare_condjump): Likewise.
(aarch64_cb1): Likewise.
On 6/25/25 9:02 AM, Nathaniel Shead wrote:
On Tue, Jun 24, 2025 at 12:10:09PM -0400, Patrick Palka wrote:
On Tue, 24 Jun 2025, Jason Merrill wrote:
On 6/23/25 5:41 PM, Nathaniel Shead wrote:
Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk/15?
-- >8 --
We were erroring becaus
Add rules for lowering `cbranch4` to CBB/CBH/CB when
CMPBR extension is enabled.
gcc/ChangeLog:
* config/aarch64/aarch64-protos.h (aarch64_cb_rhs): New function.
* config/aarch64/aarch64.cc (aarch64_cb_rhs): Likewise.
* config/aarch64/aarch64.md (cbranch4): Rename to ...
This patch series adds support for the CMPBR extension. It includes the
new `+cmpbr` option and rules to generate the new instructions when
lowering conditional branches.
Changelog:
* v7:
- Support far branches and add a test for them.
- Replace `aarch64_cb_short_operand` with `aarch64_reg_or_
Commit the test file `cmpbr.c` before rules for generating the new
instructions are added, so that the changes in codegen are more obvious
in the next commit.
gcc/testsuite/ChangeLog:
* lib/target-supports.exp: Add `cmpbr` to the list of extensions.
* gcc.target/aarch64/cmpbr.c: N
Extract the hardcoded values for the minimum PC-relative displacements
into named constants and document them.
gcc/ChangeLog:
* config/aarch64/aarch64.md (BRANCH_LEN_P_128MiB): New constant.
(BRANCH_LEN_N_128MiB): Likewise.
(BRANCH_LEN_P_1MiB): Likewise.
(BRANCH_LE
The `far_branch` attribute only ever takes the values 0 or 1, so make it
a `no/yes` valued string attribute instead.
gcc/ChangeLog:
* config/aarch64/aarch64.md (far_branch): Replace 0/1 with
no/yes.
(aarch64_bcond): Handle rename.
(aarch64_cbz1): Likewise.
This change reminds me that we lack documentation about arguments
of most of the "complicated" internal functions ...
I didn't mention it but I got implicitly reminded several times while writing
the patch... ;) An overhaul has been on my todo list for a while but of course
it never was top pr
BTW, consider all such future changes in ranger code pre-approved!
Thanks
Andrew
On 6/25/25 10:27, Andrew MacLeod wrote:
OK for all the ranger related patches.
Thanks
Andrew
On 6/25/25 10:08, Martin Jambor wrote:
Hi,
When GCC is compiled with clang, it emits a warning that
dom_oracle::nex
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