> From:Kito Cheng <kito.ch...@gmail.com>
> Send Time:2025 Jun. 19 (Thu.) 15:08
> To:yunzezhu<yunze...@linux.alibaba.com>; Jeff Law<jeffreya...@gmail.com>
> CC:"gcc-patches"<gcc-patches@gcc.gnu.org>
> Subject:Re: [PATCH v2 1/4] RISC-V: Add support for xtheadvector unit-stride 
> segment load/store intrinsics
> 
> Hi YunZe:
> 
> Generally I am open minded to accept vendor extensions, however this
> patch set really introduces too much pattern...
> 
> - NUM_INSN_CODES (defined in insn-codes.h) become 83625 from 48573.  (+72%)
> - Total line of insn-emit-*.cc becomes 1749362 from 1055750. (+65%)
> - Total line of insn-recog-*.cc becomes 1018407 from 670185 (+51%)
> 
> Also I believe that may also increase a lot of build time on native
> RISC-V environment, (I didn't measure that yet, but most generated
> insn-*.cc files grow a lot).
> 
> So sorry, I have to say no this time.

Hi Kito:

Thanks for reviewing and apologies for disturbing your work.
I'm so sorry I made some mistakes that generates
large amount of unnecessary patterns.
I removed these unnecessary patterns, and modified
insn patterns to make them requiring less patterns in v3 patches.
This shall reduce patterns generated in insn-codes.h and insn-*.cc files.
I tested v3 patches locally and here is data comparing to
origin gcc:

- NUM_INSN_CODES become 51547 from 48573.  (+5.83%)
- Total line of insn-emit-*.cc becomes 1113703 from 1055750. (+4.98%)
- Total line of insn-recog-*.cc becomes 700017 from 670185 (+3.82%)

I hope these patches satisfies requirments now. Thanks!

Best regards,
Yunze Zhu

Reply via email to