Since float vector constant

(const_vector:V4SF [(const_double:SF -QNaN [-QNaN]) repeated x4])

is an all 1s float vector constant, update the remove_redundant_vector
pass to replace

(insn 20 18 21 2 (set (reg:V4SF 124)
        (const_vector:V4SF [
                (const_double:SF -QNaN [-QNaN]) repeated x4
            ])) "x.cc":26:5 2426 {movv4sf_internal}
     (nil))

with

(insn 49 2 5 2 (set (reg:V16QI 135)
        (const_vector:V16QI [
                (const_int -1 [0xffffffffffffffff]) repeated x16
            ])) -1
     (nil))
...
(insn 20 18 21 2 (set (reg:V4SF 124)
        (subreg:V4SF (reg:V16QI 135) 0)) "x.cc":26:5 2426 {movv4sf_internal}
     (nil))

gcc/

PR target/120819
* config/i386/i386-features.cc (ix86_broadcast_inner): Also handle
all 1s float vector constant.

gcc/testsuite/

PR target/120819
* g++.target/i386/pr120819.C: New test.

OK for master?

Thanks.


-- 
H.J.
From 00220c0bb79fbc1258b4633df4daf2579e55dc5f Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.to...@gmail.com>
Date: Thu, 26 Jun 2025 06:08:51 +0800
Subject: [PATCH] x86: Also handle all 1s float vector constant

Since float vector constant

(const_vector:V4SF [(const_double:SF -QNaN [-QNaN]) repeated x4])

is an all 1s float vector constant, update the remove_redundant_vector
pass to replace

(insn 20 18 21 2 (set (reg:V4SF 124)
        (const_vector:V4SF [
                (const_double:SF -QNaN [-QNaN]) repeated x4
            ])) "x.cc":26:5 2426 {movv4sf_internal}
     (nil))

with

(insn 49 2 5 2 (set (reg:V16QI 135)
        (const_vector:V16QI [
                (const_int -1 [0xffffffffffffffff]) repeated x16
            ])) -1
     (nil))
...
(insn 20 18 21 2 (set (reg:V4SF 124)
        (subreg:V4SF (reg:V16QI 135) 0)) "x.cc":26:5 2426 {movv4sf_internal}
     (nil))

gcc/

	PR target/120819
	* config/i386/i386-features.cc (ix86_broadcast_inner): Also handle
	all 1s float vector constant.

gcc/testsuite/

	PR target/120819
	* g++.target/i386/pr120819.C: New test.

Signed-off-by: H.J. Lu <hjl.to...@gmail.com>
---
 gcc/config/i386/i386-features.cc         |  6 ++--
 gcc/testsuite/g++.target/i386/pr120819.C | 37 ++++++++++++++++++++++++
 2 files changed, 41 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/g++.target/i386/pr120819.C

diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc
index d942bf08b56..fb4a9ec9903 100644
--- a/gcc/config/i386/i386-features.cc
+++ b/gcc/config/i386/i386-features.cc
@@ -3532,8 +3532,10 @@ ix86_broadcast_inner (rtx op, machine_mode mode,
       *insn_p = nullptr;
       return const0_rtx;
     }
-  else if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
-	   && (op == constm1_rtx || op == CONSTM1_RTX (mode)))
+  else if ((GET_MODE_CLASS (mode) == MODE_VECTOR_INT
+	    && (op == constm1_rtx || op == CONSTM1_RTX (mode)))
+	    || (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
+		&& float_vector_all_ones_operand (op, mode)))
     {
       *scalar_mode_p = QImode;
       *kind_p = X86_CSE_CONSTM1_VECTOR;
diff --git a/gcc/testsuite/g++.target/i386/pr120819.C b/gcc/testsuite/g++.target/i386/pr120819.C
new file mode 100644
index 00000000000..d0b05dfd052
--- /dev/null
+++ b/gcc/testsuite/g++.target/i386/pr120819.C
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-options "-O1 -march=znver2 -std=gnu++17 -w" } */
+
+typedef float a __attribute__ ((__vector_size__ (16)));
+typedef long long b __attribute__ ((__vector_size__ (16)));
+int c;
+a d, e, f;
+b g, h;
+struct i
+{
+  i (b j) : k (j) {}
+  i ();
+  b k;
+};
+i
+l (int j)
+{
+  g = (b)(__attribute__ ((__vector_size__ (4 * sizeof (1)))) int){ j, j, j,
+                                                                   j };
+  return g;
+}
+extern int m ();
+void
+n ()
+{
+  h = (__attribute__ ((
+      __vector_size__ (2 * sizeof (long long)))) long long){ c };
+  i o, p = l (2147483647 * 2 + 1);
+  f = __builtin_ia32_blendvps (a (p.k), d, e);
+  if (m ())
+    {
+      i q = l (2147483647 * 2 + 1);
+      a r = __builtin_ia32_blendvps (a (q.k), d, e);
+      o = b (r);
+      i s;
+    }
+}
-- 
2.49.0

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