Re: [PATCH] testsuite: Fix up vector-{8,9,10}.c tests

On Fri, 22 Nov 2024, Jakub Jelinek wrote: > On Thu, Nov 21, 2024 at 01:30:39PM +0100, Christoph Müllner wrote: > > > > * gcc.dg/tree-ssa/satd-hadamard.c: New test. > > > > * gcc.dg/tree-ssa/vector-10.c: New test. > > > > * gcc.dg/tree-ssa/vector-8.c: New test. > > > > * gcc

Re: [PATCH v2 1/5] vect: Force alignment peeling to vectorize more early break loops

On Thu, 21 Nov 2024, Alex Coplan wrote: > On 21/11/2024 10:02, Richard Biener wrote: > > On Fri, 15 Nov 2024, Alex Coplan wrote: > > > > > Hi, > > > > > > This is a v2 which hopefully addresses the feedback for v1 of the 1/5 > > > patch, originally posted here: > > > https://gcc.gnu.org/pipermai

Re: [pushed][PATCH 0/2] Remove redundant code.

Pushed to r15-5583 and r15-5584. 在 2024/11/2 上午10:48, Lulu Cheng 写道: Lulu Cheng (2): LoongArch: Remove redundant code. LoongArch: Modify the document to remove options that don't exist. gcc/config/loongarch/loongarch-builtins.cc | 102 - gcc/config/loongarch/loongar

Re: [PATCH] i386/testsuite: Do not append AVX10.2 option for check_effective_target

On Fri, Nov 22, 2024 at 2:40 PM Haochen Jiang wrote: > > Hi all, > > When -avx10.2 meet -march with AVX512 enabled, it will report warning > for vector size conflict. The warning will prevent the test to run on > GCC with arch native build on those platforms when > check_effective_target. > > Remo

[PATCH] i386/testsuite: Do not append AVX10.2 option for check_effective_target

Hi all, When -avx10.2 meet -march with AVX512 enabled, it will report warning for vector size conflict. The warning will prevent the test to run on GCC with arch native build on those platforms when check_effective_target. Remove AVX10.2 options since we are using inline asm ad it actually do not

Re: [PATCH v3] RISC-V: Minimal support for svvptc extension.

LGTM, will commit to trunk once I pass the local test :) On Fri, Nov 22, 2024 at 1:15 PM Dongyan Chen wrote: > > This patch support svvptc extension[1]. > To enable GCC to recognize and process svvptc extension correctly at compile > time. > > [1] https://github.com/riscv/riscv-svvptc > > gcc/Ch

[PATCH v3] RISC-V: Minimal support for svvptc extension.

This patch support svvptc extension[1]. To enable GCC to recognize and process svvptc extension correctly at compile time. [1] https://github.com/riscv/riscv-svvptc gcc/ChangeLog: * common/config/riscv/riscv-common.cc: New extension. * common/config/riscv/riscv-ext-bitmask.def (

Re:[pushed] [PATCH] LoongArch: Fix clerical errors in lasx_xvreplgr2vr_* and lsx_vreplgr2vr_*.

Pushed to r15-5581 and r14-10961. 在 2024/11/2 下午3:37, Lulu Cheng 写道: [x]vldi.{b/h/w/d} is not implemented in LoongArch. Use the macro [x]vrepli.{b/h/w/d} to replace. gcc/ChangeLog: * config/loongarch/lasx.md: Fixed. * config/loongarch/lsx.md: Fixed. --- gcc/config/loongarch/l

Re: [pushed] [PATCH] LoongArch: Make __builtin_lsx_vorn_v and __builtin_lasx_xvorn_v arguments and return values unsigned

Pushed to r14-10960. 在 2024/11/22 上午9:52, Lulu Cheng 写道: Pushed to r15-5580. We searched in the multimedia package and found no cases of using __builtin_lsx_vorn_v or __builtin_lasx_xvorn_v, so the interface type has been modified in the form of a bugfix. Thanks! 在 2024/10/31 下午11:58, Xi

Re:[pushed] [PATCH] LoongArch: Make __builtin_lsx_vorn_v and __builtin_lasx_xvorn_v arguments and return values unsigned

Pushed to r15-5580. We searched in the multimedia package and found no cases of using __builtin_lsx_vorn_v or __builtin_lasx_xvorn_v, so the interface type has been modified in the form of a bugfix. Thanks! 在 2024/10/31 下午11:58, Xi Ruoyao 写道: Align them with other vector bitwise builtins.

[PATCH] libsanitizer: Move language level from gnu++14 to gnu++17

While compiling libsanitizer for aarch64-linux-gnu, I noticed the new warning: ``` ../../../../libsanitizer/asan/asan_interceptors.cpp: In function ‘char* ___interceptor_strcpy(char*, const char*)’: ../../../../libsanitizer/asan/asan_interceptors.cpp:554:6: warning: ‘if constexpr’ only available

Re: Stage1 patch ping

On Tue, 19 Nov 2024, Jakub Jelinek wrote: > https://gcc.gnu.org/pipermail/gcc-patches/2024-November/667737.html > inline-asm: Add support for cc operand modifier > https://gcc.gnu.org/pipermail/gcc-patches/2024-November/667949.html > inline-asm, i386: Add "redzone" clobber support > This on

Re: [PATCH] inline-asm: Add - constraint modifier support for toplevel extended asm [PR41045]

On Mon, 18 Nov 2024, Jakub Jelinek wrote: > +@smallexample > +extern void foo (void), bar (void); > +int v; > +extern int w; > +asm (".globl %cc0, %cc2; .text; %cc0: call %cc1; ret; .data; %cc2: .word > %cc3" > + :: ":" (foo), "-s" (&bar), ":" (&w), "-i" (&v)); > +@end smallexample > + > +Thi

Re: [RFC PATCH] inline asm, v2: Add new constraint for symbol definitions

On Wed, 6 Nov 2024, Jakub Jelinek wrote: > + error_at (loc, "%<:%> constraint operand is not address " > + "of a function or non-automatic variable"); I think a testcase for this error is needed. -- Joseph S. Myers josmy...@redhat.com

[PATCH 2/3] aarch64: add attributes to the prefetch_builtins

This adds the attributes associated with prefetch to the bultins. Just call aarch64_get_attributes with FLAG_PREFETCH_MEMORY to get the attributes. Built and tested for aarch64-linux-gnu. gcc/ChangeLog: * config/aarch64/aarch64-builtins.cc (aarch64_init_prefetch_builtin): Updete

[PATCH 3/3] aarch64: Add attributes to the data intrinsics.

All of the data intrinsics don't read/write memory nor they are fp related. So adding the attributes will improve the code generation slightly. Built and tested for aarch64-linux-gnu gcc/ChangeLog: * config/aarch64/aarch64-builtins.cc (aarch64_init_data_intrinsics): Call aarch64

[PATCH 1/3] aarch64: Fix up flags for vget_low_*, vget_high_* and vreinterpret intrinsics

These 3 intrinsics will not raise an fp exception, or read FPCR. These intrinsics, will be folded into VIEW_CONVERT_EXPR or a BIT_FIELD_REF which is already set to be const expressions too. Built and tested for aarch64-linux-gnu. gcc/ChangeLog: * config/aarch64/aarch64-builtins.cc (VREI

[PATCH] testsuite: Fix up vector-{8,9,10}.c tests

On Thu, Nov 21, 2024 at 01:30:39PM +0100, Christoph Müllner wrote: > > > * gcc.dg/tree-ssa/satd-hadamard.c: New test. > > > * gcc.dg/tree-ssa/vector-10.c: New test. > > > * gcc.dg/tree-ssa/vector-8.c: New test. > > > * gcc.dg/tree-ssa/vector-9.c: New test. I see FAILs on i6

[PATCH] diagnostics: UX: add doc URLs for attributes (v2)

This is v2 of the patch; v1 was here: https://gcc.gnu.org/pipermail/gcc-patches/2024-June/655541.html Changed in v2: * added a new TARGET_DOCUMENTATION_NAME hook for figuring out which documentation URL to use when there are multiple per-target docs, such as for __attribute__((interrupt)); i

Re: [PATCH] wwwdocs: Align the DCO text for the GNU Toolchain to match community usage.

Hi Carlos, On Thu, 2024-11-21 at 12:04 -0500, Carlos O'Donell wrote: > Adjust the DCO text to match the broader community usage including > the Linux kernel use around "real names." We made a similar change to switch from "real names" to "known identifies" for elfutils a year ago: https://sourcew

Re: [PATCH] doc/cpp: Document __has_include_next

Joseph Myers writes: > On Fri, 18 Oct 2024, Arsen Arsenović wrote: > >> -The @code{__has_include} operator by itself, without any @var{operand} or >> -parentheses, acts as a predefined macro so that support for it can be tested >> -in portable code. Thus, the recommended use of the operator is a

Re: [PATCH] genemit: Distribute evenly to files [PR111600].

On 11/21/24 10:56 AM, Robin Dapp wrote: Hi, currently we distribute insn patterns in genemit, partitioning them by the number of patterns per file. The first 100 into file 1, the next 100 into file 2, and so on. Depending on the patterns this can lead to files of very uneven size. Similar

[committed] c: Give errors more consistently for void parameters [PR114816]

Cases of void parameters, other than a parameter list of (void) (or equivalent with a typedef for void) in its entirety, have been made a constraint violation in C2Y (N3344 alternative 1 was adopted), as part of a series of changes to eliminate unnecessary undefined behavior by turning it into cons

Re: [PATCH] Allow limited extended asm at toplevel [PR41045]

On Sat, 2 Nov 2024, Jakub Jelinek wrote: > +Extended @code{asm} statements outside of functions may not use any > +qualifiers, may not specify clobbers, may not use @code{%}, @code{+} or > +@code{&} modifiers in constraints and can only use constraints which don%'t > +allow using any register. Ju

Re: [PATCH 08/11] c: c++: flag to disable fetch_op handling fenv exceptions

On Thu, 21 Nov 2024, Matthew Malcomson wrote: > Based on that -- should the same reasoning apply to the new builtins? > I.e. do you believe it would be reasonable to say that the new builtins > require libatomic, and remove this flag entirely? I think it's reasonable to say that atomic built-in f

Re: [PATCH] c++: Disallow decomposition of lambda bases [PR90321]

On Thu, Nov 07, 2024 at 09:48:52PM +1100, Nathaniel Shead wrote: > Bootstrapped and lightly regtested on x86_64-pc-linux-gnu (so far just > dg.exp), OK for trunk if full regtest succeeds? > > -- >8 -- > > Decomposition of lambda closure types is not allowed by > [dcl.struct.bind] p6, since member

Re: [PATCH] testsuite: RISC-V: Fix vector flags handling [PR117603]

> The DejaGnu routine "riscv_get_arch" fails to infer the correct > architecture string when GCC is built for RV32EC. This causes invalid > architecture string to be produced by "add_options_for_riscv_v": > xgcc: error: '-march=rv32cv': first ISA subset must be 'e', 'i' or 'g' > > Fix by adding

Re: [PATCH v2 01/14] Support for 64-bit location_t: libcpp part 1

On Wed, 2024-11-20 at 23:10 -0500, Lewis Hyatt wrote: > On Wed, Nov 20, 2024 at 11:58:30AM +0100, Richard Biener wrote: > > On Sun, Nov 17, 2024 at 4:24 AM Lewis Hyatt > > wrote: > > > > > > Prepare libcpp to support 64-bit location_t, without yet making > > > any functional changes, by adding ne

Re: [PATCH] json parsing: avoid relying on floating point equality [PR117677]

On Thu, 2024-11-21 at 06:34 +0800, H.J. Lu wrote: > On Thu, Nov 21, 2024 at 4:52 AM David Malcolm > wrote: > > > Sorry about the breakage. > > > > I wasn't able to reproduce the failures myself, but the following > > patch seems plausible as a fix; does it fix the affected > > configurations? >

Re: [PATCH] wwwdocs: Align the DCO text for the GNU Toolchain to match community usage.

On 11/21/24 1:47 PM, Sam James wrote: > Mark Wielaard writes: > >> Hi Carlos, >> >> On Thu, 2024-11-21 at 12:04 -0500, Carlos O'Donell wrote: >>> Adjust the DCO text to match the broader community usage including >>> the Linux kernel use around "real names." >> >> We made a similar change to swit

Ping^5 [PATCH 0/2] Prime path coverage to gcc/gcov

Ping. On 11/12/24 09:56, Jørgen Kvalsvik wrote: Ping. On 10/30/24 13:55, Jørgen Kvalsvik wrote: Ping. On 10/21/24 15:21, Jørgen Kvalsvik wrote: Ping. On 10/10/24 10:08, Jørgen Kvalsvik wrote: Ping. On 10/3/24 12:46, Jørgen Kvalsvik wrote: This is both a ping and a minor update. A few of

[PATCH] testsuite: arm: Use -mtune=cortex-m4 for thumb-ifcvt.c test

Ok for trunk and releases/gcc-14? -- On Cortex-M4, the code generated is: cmp r0, r1 ittene lslne r0, r0, r1 asrne r0, r0, #1 moveq r0, r1 add r0, r0, r1 bx lr On Cortex-M7, the code generated is: cmp r0, r1 beq .L3

[to-be-committed][RISC-V][PR target/117690] Add missing shift in constant synthesis

As hinted out in the BZ, we were missing a left shift in the constant synthesis in the case where the upper 32 bits can be synthesized using a shNadd of the low 32 bits. This adjusts the synthesis to add the missing left shift and adjusts the cost to account for the additional instruction.

Re: [PATCH v2 1/3] c++: Fix mangling of otherwise unattached class-scope lambdas [PR107741]

On 11/9/24 9:22 AM, Nathaniel Shead wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? Given that this doesn't actually fix the modules PR c++/116568 anymore I've pulled my workaround for that out as a separate patch (3/3). In general, mangling changes should depend on -fa

Re: [PATCH] wwwdocs: Align the DCO text for the GNU Toolchain to match community usage.

Mark Wielaard writes: > Hi Carlos, > > On Thu, 2024-11-21 at 12:04 -0500, Carlos O'Donell wrote: >> Adjust the DCO text to match the broader community usage including >> the Linux kernel use around "real names." > > We made a similar change to switch from "real names" to "known > identifies" for

Re: [PATCH v2 3/3] c++/modules: Prevent ICE when writing class-scope lambdas without mangling scope [PR116568]

On 11/9/24 9:28 AM, Nathaniel Shead wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? OK. Alternatively, after this I'll work on an update of my P1815 (TU-local entities) patch series [1] which would also solve this ICE by erroring early due to attempting to emit a TU-lo

[pushed] c++: modules and debug marker stmts

Tested x86_64-pc-linux-gnu, applying to trunk. -- 8< -- 21_strings/basic_string/operations/contains/nonnull.cc was failing because the module was built with debug markers and the testcase was built not expecting debug markers, so we crashed in lower_stmt. Let's accommodate this by discarding deb

[pushed] c++: inline variables and modules

Tested x86_64-pc-linux-gnu, applying to trunk. -- 8< -- We weren't writing out the definition of an inline variable, so the importer either got an undefined symbol or 0. gcc/cp/ChangeLog: * module.cc (has_definition): Also true for inline vars. gcc/testsuite/ChangeLog: * g++.d

[pushed] c++: modules and tsubst_friend_class

Tested x86_64-pc-linux-gnu, applying to trunk. -- 8< -- In 20_util/function_objects/mem_fn/constexpr.cc we start to instantiate _Mem_fn_base's friend declaration of _Bind_check_arity before we've loaded the namespace-scope declaration, so lookup_imported_hidden_friend doesn't find it. But then w

[PATCH] testsuite: RISC-V: Fix vector flags handling [PR117603]

The DejaGnu routine "riscv_get_arch" fails to infer the correct architecture string when GCC is built for RV32EC. This causes invalid architecture string to be produced by "add_options_for_riscv_v": xgcc: error: '-march=rv32cv': first ISA subset must be 'e', 'i' or 'g' Fix by adding the E base

Re: [PATCH] gimple: Add limit after which slower switchlower algs are used [PR117091] [PR117352]

On Fri, Nov 15, 2024 at 10:43:57AM +0100, Filip Kastl wrote: > Hi, > > Andi's greedy bit test finding algorithm was reverted. I found a fix for the > problem that caused the revert. I made this patch to reintroduce the greedy > alg into GCC. However I think we should keep the old slow but more

[PATCH] genemit: Distribute evenly to files [PR111600].

Hi, currently we distribute insn patterns in genemit, partitioning them by the number of patterns per file. The first 100 into file 1, the next 100 into file 2, and so on. Depending on the patterns this can lead to files of very uneven size. Similar to the genmatch split, this patch introduces

[PATCH 0/1] Add ACLE macro _CHKFEAT_GCS

Add ACLE macro _CHKFEAT_GCS for AArch64. Regression tested on aarch64-none-linux-gnu and no regressions have been found. Is it OK for trunk? Applies to dbc38dd9e96. I don't have commit access so I need someone to commit on my behalf. --- Yury Khrustalev (1): aarch64: add ACLE macro _CHKFEAT_

Re: [PATCH v2 1/5] vect: Force alignment peeling to vectorize more early break loops

On 21/11/2024 10:02, Richard Biener wrote: > On Fri, 15 Nov 2024, Alex Coplan wrote: > > > Hi, > > > > This is a v2 which hopefully addresses the feedback for v1 of the 1/5 > > patch, originally posted here: > > https://gcc.gnu.org/pipermail/gcc-patches/2024-October/48.html > > > > As mentio

[PATCH 1/1] aarch64: add ACLE macro _CHKFEAT_GCS

gcc/ChangeLog: * config/aarch64/arm_acle.h (_CHKFEAT_GCS): New. libgcc/ChangeLog: * config/aarch64/aarch64-unwind.h (_Unwind_Frames_Extra): Update. (_Unwind_Frames_Increment): Update --- gcc/config/aarch64/arm_acle.h | 3 +++ libgcc/config/aarch64/aarch64-unwind.

[PATCH] testsuite: arm: Fix build error for thumb2-slow-flash-data-3.c test

I'm not sure how to verify that adding the parameter won't destroy the test. I've tried to repoduce the ICE on old Arm builds of arm-none-eabi, but none of them ICE. I suppose it should be safe to add the parameter as the PR talks about the literal pools. Ok for trunk and releases/gcc-14? -- Wit

Re: [PATCH v2 1/5] testsuite: arm: Use effective-target for pr56184.C and pr59985.C

On 2024-11-21 15:49, Christophe Lyon wrote: On 11/21/24 15:24, Torbjörn SVENSSON wrote: Update test cases to use -mcpu=unset/-march=unset feature introduced in r15-3606-g7d6c6a0d15c. gcc/testsuite/ChangeLog: * g++.dg/other/pr56184.C: Use effective-target arm_arch_v7a_neon_thumb.  

[PATCH v2] RISC-V: Minimal support for svvptc extension.

This patch support svvptc extension[1]. To enable GCC to recognize and process svvptc extension correctly at compile time. [1] https://github.com/riscv/riscv-svvptc gcc/ChangeLog: * common/config/riscv/riscv-common.cc: New extension. * common/config/riscv/riscv-ext-bitmask.def (

[PATCH] wwwdocs: Align the DCO text for the GNU Toolchain to match community usage.

Adjust the DCO text to match the broader community usage including the Linux kernel use around "real names." These changes clarify what was meant by "real name" and that it is not required to be a "legal name" or any other stronger requirement than a known identity that could be contacted to discu

[patch,avr] avr.opt: Refactor Var(avr_*) to Var(avropt_*)

This is a no-op refactoring that uses a prefix of avropt_ (formerly: avr_) for variables defined qua Var() directives in avr.opt. This makes it easier to spot values that come directly from avr.opt in the rest of the backend. Ok for trunk? Johann -- AVR: Use Var(avropt_xxx) for option variabl

Re: [PATCH] testsuite: tree-ssa: Limit targets for vec perm tests

On 11/21/24 9:10 AM, Christoph Müllner wrote: Recently added test cases assume optimized code generation for certain vectorized code. However, this optimization might not be applied if the backends don't support the optimized permuation. The tests are confirmed to work on aarch64 and x86-64,

[pushed] c++: tweak for -Wrange-loop-construct (13 backport) [PR116731]

This patch differs from the trunk patch slightly: before r14-125 constructible_expr took a TREE_LIST, not a TREE_VEC, so the patch adjusts for that. Bootstrapped/regtested on x86_64-pc-linux-gnu. Pushed. -- >8 -- This PR reports that the warning would be better off using a check for trivially co

[PATCH] testsuite: tree-ssa: Limit targets for vec perm tests

Recently added test cases assume optimized code generation for certain vectorized code. However, this optimization might not be applied if the backends don't support the optimized permuation. The tests are confirmed to work on aarch64 and x86-64, so this patch restricts the tests accordingly. Te

Re: [patch,avr] PR117726: Improve 4-byte ASHIFT insns

чт, 21 нояб. 2024 г. в 18:08, Georg-Johann Lay : > > This patch improves the 4-byte ASHIFT insns. > 1) It adds a "r,r,C15" alternative for improved long << 15. > 2) It adds 3-operand alternatives (depending on options) and > splits them after peephole2 / before avr-fuse-move into > a 3-oper

Re: [PATCH ver2 0/4] rs6000, remove redundant built-ins and add more test cases

Ping 6 On 11/14/24 1:36 PM, Carl Love wrote: Ping 5 On 11/5/24 8:28 AM, Carl Love wrote: Ping 4 On 10/28/24 4:29 PM, Carl Love wrote: Ping 3 On 10/17/24 1:31 PM, Carl Love wrote: Ping 2 On 10/9/24 7:44 AM, Carl Love wrote: Ping On 10/1/24 8:12 AM, Carl Love wrote: GCC maintain

Re: [PATCH v2 1/5] testsuite: arm: Use effective-target for pr56184.C and pr59985.C

On 11/21/24 15:24, Torbjörn SVENSSON wrote: Update test cases to use -mcpu=unset/-march=unset feature introduced in r15-3606-g7d6c6a0d15c. gcc/testsuite/ChangeLog: * g++.dg/other/pr56184.C: Use effective-target arm_arch_v7a_neon_thumb. * g++.dg/other/pr59985.C: Use ef

Re: [PATCH v2] RISC-V: Minimal support for svvptc extension.

Hi Dongyan: Thanks for your patch, it seems good but just a few minor comments :) > @@ -1721,6 +1722,9 @@ static const riscv_ext_flag_table_t > riscv_ext_flag_table[] = >RISCV_EXT_FLAG_ENTRY ("svinval", x_riscv_sv_subext, MASK_SVINVAL), >RISCV_EXT_FLAG_ENTRY ("svnapot", x_riscv_sv_subext

Re: [PATCH 08/11] c: c++: flag to disable fetch_op handling fenv exceptions

Attempting to resend since got rejected from gcc-patches mailing list. (Apologies about the duplication to those on Cc). On 11/18/24 11:25, Matthew Malcomson wrote: On 11/14/24 18:44, Joseph Myers wrote: External email: Use caution opening links or attachments On Thu, 14 Nov 2024,mmalcom...@n

Re: [PATCH] rs6000, fix test builtins-1-p10-runnable.c

Ping 6 On 11/14/24 1:36 PM, Carl Love wrote: Ping 5 On 11/5/24 8:27 AM, Carl Love wrote: Ping 4 On 10/28/24 4:28 PM, Carl Love wrote: Ping 3 On 10/17/24 1:31 PM, Carl Love wrote: Ping 2 On 10/9/24 7:43 AM, Carl Love wrote: Ping, FYI this is a fairly simple fix to a testcase. On 10

Re: [PATCH v4 5/5] aarch64: add SVE2 FP8DOT2 and FP8DOT4 intrinsics

Claudio Bantaloukas writes: > This patch adds support for the following intrinsics: > - svdot[_f32_mf8]_fpm > - svdot_lane[_f32_mf8]_fpm > - svdot[_f16_mf8]_fpm > - svdot_lane[_f16_mf8]_fpm > > The first two are available under a combination of the FP8DOT4 and SVE2 > features. > Alternatively und

Re: [PATCH 09/17] testsuite: arm: Use effective-target for nomve_fp_1.c test

On 2024-11-19 17:49, Richard Earnshaw (lists) wrote: On 19/11/2024 10:23, Torbjörn SVENSSON wrote: Update test cases to use -mcpu=unset/-march=unset feature introduced in r15-3606-g7d6c6a0d15c. gcc/testsuite/ChangeLog: * g++.target/arm/mve/general-c++/nomve_fp_1.c: Added option

[PATCH] i386/testsuite: Enhance AVX10.2 vmovd/w testcases

Hi all, Under -fno-omit-frame-pointer, %ebp will be used, which is the Solaris/x86 default. Both check %ebp and %esp to avoid error on that. Tested under -m32 w/ and w/o -fno-omit-frame-pointer. Ok for trunk? Thx, Haochen gcc/testsuite/ChangeLog: PR target/117697 * gcc.target/i

Re: [PATCH v4 4/5] aarch64: add SVE2 FP8 multiply accumulate intrinsics

Claudio Bantaloukas writes: > [...] > @@ -4004,6 +4008,44 @@ SHAPE (ternary_bfloat_lane) > typedef ternary_bfloat_lane_base<2> ternary_bfloat_lanex2_def; > SHAPE (ternary_bfloat_lanex2) > +/* sv_t svfoo[_t0](sv_t, svmfloat8_t, svmfloat8_t, uint64_t) > + > + where the final argument is an int

[PATCH v2 2/5] testsuite: arm: Use -march=unset for bfloat16_scalar* tests

Update test cases to use -mcpu=unset/-march=unset feature introduced in r15-3606-g7d6c6a0d15c. gcc/testsuite/ChangeLog: * gcc.target/arm/bfloat16_scalar_1_1.c: Use effective-target arm_arch_v8_2a_bf16_hard. * gcc.target/arm/bfloat16_scalar_2_1.c: Likewise. * gcc.ta

[PATCH v2 0/5] testsuite: arm: Leverage -mcpu=unset/-march=unset

Hi, Changes since v1: - Pushed part of the patch serie that was ok'ed. - Updated the remaining patches based on the review comments. Please let me know if I missed something. Ok for trunk? Kind regards, Torbjörn

[PATCH v2 3/5] testsuite: arm: Use -mcpu=unset when overriding -march

Update test cases to use -mcpu=unset/-march=unset feature introduced in r15-3606-g7d6c6a0d15c. gcc/testsuite/ChangeLog: * gcc.dg/pr41574.c: Added option "-mcpu=unset". * gcc.dg/pr59418.c: Likewise. * lib/target-supports.exp (add_options_for_vect_early_break): Likewi

[PATCH v2 4/5] testsuite: arm: Use effective-target for its.c test [PR94531]

The test case gcc.target/arm/its.c was created together with restriction of IT blocks for Cortex-M7. As the test case fails on all tunes that does not match Cortex-M7, explicitly test it for Cortex-M7. To have some additional faith that GCC does the correct thing, I also added another variant of th

[PATCH v2 5/5] testsuite: arm: Use effective-target for pr96939 test

Update test case to use -mcpu=unset/-march=unset feature introduced in r15-3606-g7d6c6a0d15c. gcc/testsuite/ChangeLog: * gcc.target/arm/lto/pr96939_0.c: Use effective-target arm_arch_v8a. * gcc.target/arm/lto/pr96939_1.c: Remove dg-options. Signed-off-by: Torbjörn SVENSSO

[PATCH v2 1/5] testsuite: arm: Use effective-target for pr56184.C and pr59985.C

Update test cases to use -mcpu=unset/-march=unset feature introduced in r15-3606-g7d6c6a0d15c. gcc/testsuite/ChangeLog: * g++.dg/other/pr56184.C: Use effective-target arm_arch_v7a_neon_thumb. * g++.dg/other/pr59985.C: Use effective-target arm_arch_v7a_fp_hard.

Re: [PATCH][middle-end] For multiplication try swapping operands when matching complex multiply [PR116463]

On Thu, 21 Nov 2024, Tamar Christina wrote: > Hi All, > > This commit fixes the failures of complex.exp=fast-math-complex-mls-*.c on the > GCC 14 branch and some of the ones on the master. > > The current matching just looks for one order for multiplication and was > relying > on canonicalizati

[patch,avr] PR117726: Improve 4-byte ASHIFT insns

This patch improves the 4-byte ASHIFT insns. 1) It adds a "r,r,C15" alternative for improved long << 15. 2) It adds 3-operand alternatives (depending on options) and splits them after peephole2 / before avr-fuse-move into a 3-operand byte shift and a 2-operand residual bit shift. For better

RE: 3D printing - gcc.gnu.org

Hi Team, Did you receive the email below? If so, let me know your questions. Sincerely, Kate From: Kate Turner Sent: Friday, September 13, 2024, 8:52 AM To: gcc-patches@gcc.gnu.org Subject: 3D printing - gcc.gnu.org Hello Team, Ar

Re: [PATCH v4 3/5] aarch64: add svcvt* FP8 intrinsics

On 21/11/2024 13:09, Richard Sandiford wrote: Thanks for the updated series and sorry for the slow reply. Claudio Bantaloukas writes: diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cvt_mf8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cvt_mf8.c new file mode 100644 index 0

Re: [PATCH v4 3/5] aarch64: add svcvt* FP8 intrinsics

Thanks for the updated series and sorry for the slow reply. Claudio Bantaloukas writes: > diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cvt_mf8.c > b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cvt_mf8.c > new file mode 100644 > index 000..e65774deadc > --- /dev/null > +

[PATCH] pa: Remove pa_section_type_flags

It's no longer needed since r15-4842 (when the target-independent code started to handle the case). gcc/ChangeLog: * config/pa/pa.cc (pa_section_type_flags): Remove. (TARGET_SECTION_TYPE_FLAGS): Remove. --- I don't have a hppa machine to test this, but conceptually this should be

[PATCH][middle-end] For multiplication try swapping operands when matching complex multiply [PR116463]

Hi All, This commit fixes the failures of complex.exp=fast-math-complex-mls-*.c on the GCC 14 branch and some of the ones on the master. The current matching just looks for one order for multiplication and was relying on canonicalization to always give the right order because of the TWO_OPERANDS.

[COMMITTED 1/3] ada: Cleanup in expansion of aggregates in object declarations with aspects

From: Eric Botcazou The strategy to expand aggregates present as initialization expressions in object declarations, originally with a subsequent address clause given for the object and later with aspects whose resolution needs to be delayed up to the freeze point, has been to block their resoluti

Re: [PATCH 17/17] testsuite: arm: Use effective-target for pr96939 test

On 20/11/2024 13:00, Torbjorn SVENSSON wrote: > > > On 2024-11-19 18:57, Richard Earnshaw (lists) wrote: >> On 19/11/2024 10:24, Torbjörn SVENSSON wrote: >>> Update test case to use -mcpu=unset/-march=unset feature introduced in >>> r15-3606-g7d6c6a0d15c. >>> >>> gcc/testsuite/ChangeLog: >>> >>>

testsuite: robustify gcc.target/m68k/20100512-1.c

This has been failing since r5-2883-g8cb65b3725f0c3 which caused the memset to be optimized out. Add an unoptimizable reference to the local variable to keep it. Committed. * gcc.target/m68k/20100512-1.c (doTest1, doTest2): Add asm that references foo. --- gcc/testsuite/gcc.targ

Re: [PATCH v6] forwprop: Try to blend two isomorphic VEC_PERM sequences

On Thu, Nov 21, 2024 at 1:34 PM Sam James wrote: > > The default on trunk is --enable-checking=yes,extra (when gcc/DEV-PHASE > contains "experimental"), otherwise it's --enable-checking=release. > > I personally do most testing with --enable-checking=yes,rtl,extra but > you can do less than that i

Re: [PATCH] Use decl size in Solaris ASM_DECLARE_OBJECT_NAME [PR102296]

Rainer Orth writes: > Solaris has modified versions of ASM_DECLARE_OBJECT_NAME on both i386 > and sparc. When > > commit ce597aedd79e646c4a5517505088d380239cbfa5 > Author: Ilya Enkovich > Date: Thu Aug 7 08:04:55 2014 + > > elfos.h (ASM_DECLARE_OBJECT_NAME): Use decl size instead of t

Re: [PATCH v6] forwprop: Try to blend two isomorphic VEC_PERM sequences

The default on trunk is --enable-checking=yes,extra (when gcc/DEV-PHASE contains "experimental"), otherwise it's --enable-checking=release. I personally do most testing with --enable-checking=yes,rtl,extra but you can do less than that if you want to quickly get results. The minimum for testing p

Re: [PATCH v6] forwprop: Try to blend two isomorphic VEC_PERM sequences

On Thu, Nov 21, 2024 at 1:17 PM Richard Biener wrote: > > On Thu, 21 Nov 2024, Christoph Müllner wrote: > > > This extends forwprop by yet another VEC_PERM optimization: > > It attempts to blend two isomorphic vector sequences by using the > > redundancy in the lane utilization in these sequences.

Re: [PATCH v6] forwprop: Try to blend two isomorphic VEC_PERM sequences

On Thu, 21 Nov 2024, Christoph Müllner wrote: > This extends forwprop by yet another VEC_PERM optimization: > It attempts to blend two isomorphic vector sequences by using the > redundancy in the lane utilization in these sequences. > This redundancy in lane utilization comes from the way how spec

[PATCH 2/2] x86: fix asm() operand 'c' modifier handling

Documentation is pretty clear here: "Require a constant operand and print the constant expression with no punctuation"; the internal use for condition codes is entirely undocumented. IOW any constant value of whatever kind, magnitude, or sign ought to be acceptable as long as it's expressable. Wire

[PATCH 1/2] fix asm() operand 'c' modifier handling

Documentation is pretty clear here: "Require a constant operand and print the constant expression with no punctuation." IOW any integer value of whatever magnitude or sign ought to be acceptable. --- RFC: If this (doing the change in generic code) is the way to go, in a few cases arch-specific

[PATCH 0/2] asm() operand 'c' modifier handling

Documentation is pretty clear here: "Require a constant operand and print the constant expression with no punctuation." See the patches for further details. 1: fix asm() operand 'c' modifier handling 2: x86: fix asm() operand 'c' modifier handling Technically for x86 the 2nd patch alone ought to

Re: [RFC PATCH] dwarf2out: Use post-DWARF 5 DW_LANG_* codes for -gdwarf-5 -gno-strict-dwarf

On Thu, 21 Nov 2024, Jakub Jelinek wrote: > Hi! > > DWARF now maintains DW_LANG_* code assignment online and 27 language codes > have been assigned already after DWARF 5 has been released, see > https://dwarfstd.org/languages.html > including one added yesterday (DW_LANG_C23). > DWARF 6 plans to

Re: [PATCH v1 4/4] aarch64: Add SEH, stack unwinding and C++ exceptions

Evgeny Karpov writes: > From 69ce2026b10711b32595d58e23f92f54e6c718c2 Mon Sep 17 00:00:00 2001 > From: Evgeny Karpov > Date: Fri, 15 Nov 2024 13:14:18 +0100 > Subject: [PATCH v1 4/4] aarch64: Add SEH, stack unwinding and C++ exceptions > > This patch reuses the existing SEH, stack unwinding and C

Re: [RFC PATCH 1/5] vect: Force alignment peeling to vectorize more early break loops

On 19/11/2024 20:12, Richard Sandiford wrote: > Alex Coplan writes: > > On 19/11/2024 17:02, Richard Sandiford wrote: > >> Sorry for the slow review. Finally catching up on backlog. > >> > >> Richard Biener writes: > >> > On Mon, 28 Oct 2024, Alex Coplan wrote: > >> > > >> >> This allows us to

[PATCH, commited] apx-ndd-tls-1[ab].c: Add -std=gnu17

Since GCC 15 defaults to -std=gnu23, add -std=gnu17 to apx-ndd-tls-1[ab].c to avoid: gcc.target/i386/apx-ndd-tls-1a.c: In function ‘k’: gcc.target/i386/apx-ndd-tls-1a.c:29:7: error: too many arguments to function ‘l’ gcc.target/i386/apx-ndd-tls-1a.c:25:5: note: declared here * gcc.target/i386/apx

[COMMITTED] libgomp: testsuite: Fix libgomp.c/alloc-pinned-3.c etc. for C23 on non-Linux

Since the switch to a C23 default, three libgomp tests FAIL on Solaris: FAIL: libgomp.c/alloc-pinned-3.c (test for excess errors) UNRESOLVED: libgomp.c/alloc-pinned-3.c compilation failed to produce executable FAIL: libgomp.c/alloc-pinned-4.c (test for excess errors) UNRESOLVED: libgomp.c/alloc-pi

Re: [PATCH]AArch64 Suppress default options when march or mcpu used is not affected by it.

> On 19 Nov 2024, at 4:18 PM, Tamar Christina wrote: > > External email: Use caution opening links or attachments > > >> -Original Message- >> From: Andrew Pinski >> Sent: Friday, November 15, 2024 7:16 PM >> To: Tamar Christina >> Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw

[PATCH] RISC-V: Minimal support for svvptc extension.

This patch support svvptc extension. To enable GCC to recognize and process svvptc extension correctly at compile time. gcc/ChangeLog: * common/config/riscv/riscv-common.cc: New extension. * common/config/riscv/riscv-ext-bitmask.def (RISCV_EXT_BITMASK): Ditto. * config/ri

RE: [PATCH]AArch64 Suppress default options when march or mcpu used is not affected by it.

> > I tried writing automated testcases for these, however the testsuite doesn't > > want to scan the output of -### and it makes the excess error tests always > > fail > > unless you use dg-error, which also looks for"error:". So tested manually: > > You might be able to use dg-message instead.

Re: [RFC PATCH] dwarf2out: Use post-DWARF 5 DW_LANG_* codes for -gdwarf-5 -gno-strict-dwarf

Hi Jakub, On Thu, Nov 21, 2024 at 10:16:13AM +0100, Jakub Jelinek via Gdb wrote: > From what I can read in gdb, it doesn't seem to care about exact standard > revision, all it cares about is if the TU is C, C++, Fortran, Ada etc. > So, from this POV perhaps we shouldn't switch at all and ignore al

Re: [PATCH v2 04/14] tree-phinodes: Use 4 instead of 2 as the minimum number of phi args

On Wed, Nov 20, 2024 at 10:19:13AM +0100, Richard Biener wrote: > On Tue, Nov 19, 2024 at 5:46 PM Lewis Hyatt wrote: > > > > On Tue, Nov 19, 2024 at 9:59 AM Richard Biener > > wrote: > > > > > > On Sun, Nov 17, 2024 at 4:28 AM Lewis Hyatt wrote: > > > > > > > > Currently, when we allocate a gphi

[RFC PATCH] dwarf2out: Use post-DWARF 5 DW_LANG_* codes for -gdwarf-5 -gno-strict-dwarf

Hi! DWARF now maintains DW_LANG_* code assignment online and 27 language codes have been assigned already after DWARF 5 has been released, see https://dwarfstd.org/languages.html including one added yesterday (DW_LANG_C23). DWARF 6 plans to use something different, DW_AT_language_{name,version} pa

[PATCH] tree-optimization/117720 - check alignment for VMAT_STRIDED_SLP

While vectorizable_store was already checking alignment requirement of the stores and fall back to elementwise accesses if not honored the vectorizable_load path wasn't doing this. After the previous change to disregard alignment checking for VMAT_STRIDED_SLP in get_group_load_store_type this now

Re: [PATCH] include: Add new post-DWARF 5 DW_LANG_* enumerators

On Thu, 21 Nov 2024, Jakub Jelinek wrote: > Hi! > > DWARF changed the language code assignment to be on a web page and > after DWARF 5 has been published already 27 codes have been assigned. > We have some of those already in the header, but most of them were missing, > including one added just y

  1   2   >