[gcc r16-3735] s390: fix vec_extract_plus define insn

https://gcc.gnu.org/g:7a49952100f374f9073647a717a8b8a036c2084d commit r16-3735-g7a49952100f374f9073647a717a8b8a036c2084d Author: Maximilian Immanuel Brandtner Date: Tue Sep 9 16:21:14 2025 +0200 s390: fix vec_extract_plus define insn Because of a wrong define_insn for vec_extract_

[gcc r16-3929] s390: testsuite: Fix bitops-{1, 2}.c and andc-splitter-2.c

https://gcc.gnu.org/g:282c1e682e04507a087392260c77e78a71ec2600 commit r16-3929-g282c1e682e04507a087392260c77e78a71ec2600 Author: Stefan Schulze Frielinghaus Date: Wed Sep 17 13:12:30 2025 +0200 s390: testsuite: Fix bitops-{1,2}.c and andc-splitter-2.c After r16-2649-g0340177d54d t

[gcc r14-12020] s390: Emulate vec_cmp{eq, gt, gtu} for 128-bit integers

https://gcc.gnu.org/g:f5ac7f0fa0f742824c68a4607f08b4d7d0dca865 commit r14-12020-gf5ac7f0fa0f742824c68a4607f08b4d7d0dca865 Author: Stefan Schulze Frielinghaus Date: Tue Jul 16 10:41:41 2024 +0200 s390: Emulate vec_cmp{eq,gt,gtu} for 128-bit integers Mode iterator V_HW enables V1TI

[gcc r16-3853] Bail out early during gimplify_asm_expr [PR121391]

https://gcc.gnu.org/g:4cff794ca18a96ceeb83ccb18b08ffa0a63c58af commit r16-3853-g4cff794ca18a96ceeb83ccb18b08ffa0a63c58af Author: Stefan Schulze Frielinghaus Date: Mon Sep 15 09:10:53 2025 +0200 Bail out early during gimplify_asm_expr [PR121391] In case an asm operand is an error n

[gcc r16-3759] testsuite: Fix asm-hard-reg-error-{4, 5}.c for non-LRA targets

https://gcc.gnu.org/g:e63d9f9de87e2fc8e17a095349a4b87df1c2f0a0 commit r16-3759-ge63d9f9de87e2fc8e17a095349a4b87df1c2f0a0 Author: Stefan Schulze Frielinghaus Date: Thu Sep 11 10:04:04 2025 +0200 testsuite: Fix asm-hard-reg-error-{4,5}.c for non-LRA targets Hard register constraints

[gcc r16-3200] s390: Fix zero extend patterns using vlgv

https://gcc.gnu.org/g:82d1617551aad498957cbbc0558001e2b24dc2f9 commit r16-3200-g82d1617551aad498957cbbc0558001e2b24dc2f9 Author: Stefan Schulze Frielinghaus Date: Thu Aug 14 08:18:27 2025 +0200 s390: Fix zero extend patterns using vlgv In commit r16-2316-gc6676092318 mistakenly pa

[gcc r16-3199] testsuite: Fix asm-hard-reg-error-3.c for arm [PR121511]

https://gcc.gnu.org/g:11e8671365a5464d28b62dd85b740fe9bfdca3e1 commit r16-3199-g11e8671365a5464d28b62dd85b740fe9bfdca3e1 Author: Stefan Schulze Frielinghaus Date: Thu Aug 14 08:07:15 2025 +0200 testsuite: Fix asm-hard-reg-error-3.c for arm [PR121511] This test is about register pa

[gcc r16-3058] s390: Add _BitInt support

https://gcc.gnu.org/g:48787c734ee647cb99abb1e95d937f1ba66e78d0 commit r16-3058-g48787c734ee647cb99abb1e95d937f1ba66e78d0 Author: Stefan Schulze Frielinghaus Date: Thu Aug 7 08:39:11 2025 +0200 s390: Add _BitInt support gcc/ChangeLog: * config/s390/s390.cc (print_o

[gcc r16-3057] s390: libgcc: Enable soft-fp

https://gcc.gnu.org/g:872b002b9f2cb9d726137062147951d84c67f02f commit r16-3057-g872b002b9f2cb9d726137062147951d84c67f02f Author: Stefan Schulze Frielinghaus Date: Thu Aug 7 08:39:11 2025 +0200 s390: libgcc: Enable soft-fp Enable soft-fp for -m64 only. libgcc/ChangeLog:

[gcc r16-2644] s390: Implement spaceship optab [PR117015]

https://gcc.gnu.org/g:f61fb5ab834bfec998c6bdb25754f04d8ab1aea2 commit r16-2644-gf61fb5ab834bfec998c6bdb25754f04d8ab1aea2 Author: Stefan Schulze Frielinghaus Date: Wed Jul 30 15:25:54 2025 +0200 s390: Implement spaceship optab [PR117015] gcc/ChangeLog: PR target/11

[gcc r16-2643] cprop: Allow jump bypassing for single set insns

https://gcc.gnu.org/g:22141f856d83473b48e5d706879fb646c6476e2a commit r16-2643-g22141f856d83473b48e5d706879fb646c6476e2a Author: Stefan Schulze Frielinghaus Date: Wed Jul 30 15:25:54 2025 +0200 cprop: Allow jump bypassing for single set insns During jump bypassing also consider in

[gcc r16-2502] Determine CONSTRAINT_LEN at run-time [PR121214]

https://gcc.gnu.org/g:94f896c7c6c0329077271487219e345bcdcec6ab commit r16-2502-g94f896c7c6c0329077271487219e345bcdcec6ab Author: Stefan Schulze Frielinghaus Date: Fri Jul 25 11:04:38 2025 +0200 Determine CONSTRAINT_LEN at run-time [PR121214] Tests gcc.dg/asm-hard-reg-error-{4,5}.c

[gcc r16-2421] genpreds.cc: Do not use rawmemchr for insn_constraint_len

https://gcc.gnu.org/g:65f044a3ef6f5abde2e45a92a503060909100706 commit r16-2421-g65f044a3ef6f5abde2e45a92a503060909100706 Author: Stefan Schulze Frielinghaus Date: Tue Jul 22 11:26:44 2025 +0200 genpreds.cc: Do not use rawmemchr for insn_constraint_len The GNU extension rawmemchr c

[gcc r16-2374] Hard register constraints

https://gcc.gnu.org/g:a51c146ebce41b5e4326b222f2d9e04bb22d276f commit r16-2374-ga51c146ebce41b5e4326b222f2d9e04bb22d276f Author: Stefan Schulze Frielinghaus Date: Mon Jul 21 13:05:26 2025 +0200 Hard register constraints Implement hard register constraints of the form {regname} whe

[gcc r16-2375] Error handling for hard register constraints

https://gcc.gnu.org/g:cbf17db978c663817e4cd3337bbc80f59fa05bb6 commit r16-2375-gcbf17db978c663817e4cd3337bbc80f59fa05bb6 Author: Stefan Schulze Frielinghaus Date: Mon Jul 21 13:05:26 2025 +0200 Error handling for hard register constraints This implements error handling for hard re

[gcc r16-2376] genoutput: Verify hard register constraints

https://gcc.gnu.org/g:9791950017c90c6dd2da773fbc2db98021226981 commit r16-2376-g9791950017c90c6dd2da773fbc2db98021226981 Author: Stefan Schulze Frielinghaus Date: Mon Jul 21 13:05:26 2025 +0200 genoutput: Verify hard register constraints Since genoutput has no information about ha

[gcc r16-2318] s390: Rework signbit optab

https://gcc.gnu.org/g:f9af5890fbafb3f1ff514aef0805fd7c6b2d6858 commit r16-2318-gf9af5890fbafb3f1ff514aef0805fd7c6b2d6858 Author: Stefan Schulze Frielinghaus Date: Thu Jul 17 12:44:06 2025 +0200 s390: Rework signbit optab Currently for a signbit operation instructions tc{f,d,x}b +

[gcc r16-2317] s390: Adapt GPR<->VR costs

https://gcc.gnu.org/g:df20aac4c6662ef58e7577501ca9bb3c8d4ae507 commit r16-2317-gdf20aac4c6662ef58e7577501ca9bb3c8d4ae507 Author: Stefan Schulze Frielinghaus Date: Thu Jul 17 12:44:06 2025 +0200 s390: Adapt GPR<->VR costs Moving between GPRs and VRs in any mode with size less than

[gcc r16-2316] s390: Add implicit zero extend for VLGV

https://gcc.gnu.org/g:c66760923188f630fbeb68c22ac521d2f4cae645 commit r16-2316-gc66760923188f630fbeb68c22ac521d2f4cae645 Author: Stefan Schulze Frielinghaus Date: Thu Jul 17 12:44:06 2025 +0200 s390: Add implicit zero extend for VLGV Exploit the fact that instruction VLGV zeros ex

[gcc r16-2105] s390: Always compute address of stack protector guard

https://gcc.gnu.org/g:bb6075e7115208bab3d9c8b2c54e0bd6a5c808b7 commit r16-2105-gbb6075e7115208bab3d9c8b2c54e0bd6a5c808b7 Author: Stefan Schulze Frielinghaus Date: Tue Jul 8 16:40:34 2025 +0200 s390: Always compute address of stack protector guard Computing the address of the threa

[gcc r12-11113] s390: Fix tf_to_fprx2

https://gcc.gnu.org/g:17340ad64729ff66374c20681bf9cc3d614082f2 commit r12-3-g17340ad64729ff66374c20681bf9cc3d614082f2 Author: Stefan Schulze Frielinghaus Date: Wed May 14 09:22:00 2025 +0200 s390: Fix tf_to_fprx2 Insn tf_to_fprx2 moves a TF value into a floating-point register

[gcc r14-11811] s390: Fix tf_to_fprx2

https://gcc.gnu.org/g:1dd54c5ad3930e27c4206ec3c08f4baecd9b4543 commit r14-11811-g1dd54c5ad3930e27c4206ec3c08f4baecd9b4543 Author: Stefan Schulze Frielinghaus Date: Wed May 14 09:22:00 2025 +0200 s390: Fix tf_to_fprx2 Insn tf_to_fprx2 moves a TF value into a floating-point register

[gcc r13-9688] s390: Fix tf_to_fprx2

https://gcc.gnu.org/g:a0fe50437ec2e207876a489ce0fdd4d35aeeebb0 commit r13-9688-ga0fe50437ec2e207876a489ce0fdd4d35aeeebb0 Author: Stefan Schulze Frielinghaus Date: Wed May 14 09:22:00 2025 +0200 s390: Fix tf_to_fprx2 Insn tf_to_fprx2 moves a TF value into a floating-point register

[gcc r16-609] s390: Fix tf_to_fprx2

https://gcc.gnu.org/g:8519b8ba9dd9567a5f90966351c1e758dbf511a4 commit r16-609-g8519b8ba9dd9567a5f90966351c1e758dbf511a4 Author: Stefan Schulze Frielinghaus Date: Wed May 14 09:22:00 2025 +0200 s390: Fix tf_to_fprx2 Insn tf_to_fprx2 moves a TF value into a floating-point register p

[gcc r16-439] s390: Add cstoreti4 expander

https://gcc.gnu.org/g:15edd7d60352d4cfa95ed1cf14e6ded041b469ba commit r16-439-g15edd7d60352d4cfa95ed1cf14e6ded041b469ba Author: Stefan Schulze Frielinghaus Date: Wed May 7 12:43:42 2025 +0200 s390: Add cstoreti4 expander For target VXE3 just emit a 128-bit comparison followed by a

[gcc r12-11075] s390: Accept only Pmode for registers AP/FP/RA [PR119235]

https://gcc.gnu.org/g:d41ce9f7c392d5110a63d61c4c85fb7a5f2f commit r12-11075-gd41ce9f7c392d5110a63d61c4c85fb7a5f2f Author: Stefan Schulze Frielinghaus Date: Fri Mar 21 10:29:19 2025 +0100 s390: Accept only Pmode for registers AP/FP/RA [PR119235] gcc/ChangeLog:

[gcc r13-9613] s390: Accept only Pmode for registers AP/FP/RA [PR119235]

https://gcc.gnu.org/g:a6a66eca19b5c556e2be7ca8c2b0d556ef52374c commit r13-9613-ga6a66eca19b5c556e2be7ca8c2b0d556ef52374c Author: Stefan Schulze Frielinghaus Date: Fri Mar 21 10:29:19 2025 +0100 s390: Accept only Pmode for registers AP/FP/RA [PR119235] gcc/ChangeLog:

[gcc r14-11681] s390: Accept only Pmode for registers AP/FP/RA [PR119235]

https://gcc.gnu.org/g:29004acab5caa46e59f53c8516619a9e996f8c49 commit r14-11681-g29004acab5caa46e59f53c8516619a9e996f8c49 Author: Stefan Schulze Frielinghaus Date: Fri Mar 21 10:29:19 2025 +0100 s390: Accept only Pmode for registers AP/FP/RA [PR119235] gcc/ChangeLog:

[gcc r15-9408] s390: Add z17 scheduler description

https://gcc.gnu.org/g:171710bec51ebbe859bf3ff008e60dd018738026 commit r15-9408-g171710bec51ebbe859bf3ff008e60dd018738026 Author: Stefan Schulze Frielinghaus Date: Sun Apr 13 10:59:18 2025 +0200 s390: Add z17 scheduler description gcc/ChangeLog: * config/s390/s390.

[gcc r15-9407] s390: Support z17 processor name

https://gcc.gnu.org/g:1b290c16e591f6df3c5896d21b610df3444052d9 commit r15-9407-g1b290c16e591f6df3c5896d21b610df3444052d9 Author: Stefan Schulze Frielinghaus Date: Sun Apr 13 10:59:18 2025 +0200 s390: Support z17 processor name The recently announced IBM z17 processor implements th

[gcc r15-8483] s390: Accept only Pmode for registers AP/FP/RA [PR119235]

https://gcc.gnu.org/g:2b383ae2a6e5fc0530bfd8b86ad0e6b27e760bd2 commit r15-8483-g2b383ae2a6e5fc0530bfd8b86ad0e6b27e760bd2 Author: Stefan Schulze Frielinghaus Date: Fri Mar 21 10:29:19 2025 +0100 s390: Accept only Pmode for registers AP/FP/RA [PR119235] gcc/ChangeLog:

[gcc r15-8469] Revert "s390: Deprecate ESA/390 support"

https://gcc.gnu.org/g:81166d54ca1b3a21bad387a862a87be9c389ac92 commit r15-8469-g81166d54ca1b3a21bad387a862a87be9c389ac92 Author: Stefan Schulze Frielinghaus Date: Thu Mar 20 16:48:24 2025 +0100 Revert "s390: Deprecate ESA/390 support" The intention of -m31 -mesa and -m31 -mzarch w

[gcc r15-8443] s390: testsuite: Fix autovec-double-signaling-eq-z13.c

https://gcc.gnu.org/g:abfdab9c7dd6c60641b203bf247bb1b8a1f218ec commit r15-8443-gabfdab9c7dd6c60641b203bf247bb1b8a1f218ec Author: Stefan Schulze Frielinghaus Date: Wed Mar 19 16:35:12 2025 +0100 s390: testsuite: Fix autovec-double-signaling-eq-z13.c Since r15-3992-g698e0ec89bc096 w

[gcc r15-8442] s390: testsuite: Fix vcond-shift.c

https://gcc.gnu.org/g:7e947040a48d3156c602e88fb938c7bd44e83b28 commit r15-8442-g7e947040a48d3156c602e88fb938c7bd44e83b28 Author: Stefan Schulze Frielinghaus Date: Wed Mar 19 16:35:12 2025 +0100 s390: testsuite: Fix vcond-shift.c Previously we optimized expressions of the form a <

[gcc r15-8086] testsuite: s390: Skip gcc.dg/vect/bb-slp-77.c

https://gcc.gnu.org/g:25cc0f28544a3d9d39f2c48c104b4c1f11b717a7 commit r15-8086-g25cc0f28544a3d9d39f2c48c104b4c1f11b717a7 Author: Stefan Schulze Frielinghaus Date: Mon Mar 17 14:07:52 2025 +0100 testsuite: s390: Skip gcc.dg/vect/bb-slp-77.c There exists no .REDUC_PLUS on s390.

[gcc r15-7945] s390: Deprecate ESA/390 support

https://gcc.gnu.org/g:3b1bd1fdcd241dd1e5b706b6937400d74ca43146 commit r15-7945-g3b1bd1fdcd241dd1e5b706b6937400d74ca43146 Author: Stefan Schulze Frielinghaus Date: Tue Mar 11 09:28:06 2025 +0100 s390: Deprecate ESA/390 support Deprecate support for the ESA/390 architecture which wi

[gcc r15-7944] s390: Implement TARGET_INSN_COST [PR115835]

https://gcc.gnu.org/g:229f4f040485c0c05cfb707b30c9b983ed1f95d3 commit r15-7944-g229f4f040485c0c05cfb707b30c9b983ed1f95d3 Author: Stefan Schulze Frielinghaus Date: Tue Mar 11 08:59:15 2025 +0100 s390: Implement TARGET_INSN_COST [PR115835] Currently insn_cost() only considers the so

[gcc r12-10967] s390: Fix s390_valid_shift_count() for TI mode [PR118835]

https://gcc.gnu.org/g:b27fa6a7ca86a9b885cb4dbe8a55991e7fb666f0 commit r12-10967-gb27fa6a7ca86a9b885cb4dbe8a55991e7fb666f0 Author: Stefan Schulze Frielinghaus Date: Thu Feb 13 09:13:06 2025 +0100 s390: Fix s390_valid_shift_count() for TI mode [PR118835] During combine we may end up

[gcc r13-9399] s390: Fix s390_valid_shift_count() for TI mode [PR118835]

https://gcc.gnu.org/g:b7466cff8cd4984cea6a2a134c54ca18e20f3fb3 commit r13-9399-gb7466cff8cd4984cea6a2a134c54ca18e20f3fb3 Author: Stefan Schulze Frielinghaus Date: Thu Feb 13 09:13:06 2025 +0100 s390: Fix s390_valid_shift_count() for TI mode [PR118835] During combine we may end up

[gcc r14-11342] s390: Fix s390_valid_shift_count() for TI mode [PR118835]

https://gcc.gnu.org/g:ce4cb48c3396837cf1562882b3f23f768558945b commit r14-11342-gce4cb48c3396837cf1562882b3f23f768558945b Author: Stefan Schulze Frielinghaus Date: Thu Feb 13 09:13:06 2025 +0100 s390: Fix s390_valid_shift_count() for TI mode [PR118835] During combine we may end up

[gcc r15-7499] s390: Fix s390_valid_shift_count() for TI mode [PR118835]

https://gcc.gnu.org/g:ac9806dae30d07ab082ac341fe5646987753adcb commit r15-7499-gac9806dae30d07ab082ac341fe5646987753adcb Author: Stefan Schulze Frielinghaus Date: Thu Feb 13 09:13:06 2025 +0100 s390: Fix s390_valid_shift_count() for TI mode [PR118835] During combine we may end up

[gcc r15-7176] s390: Implement isfinite and isnormal optabs

https://gcc.gnu.org/g:b00bd29286345cc90afc61dcb16d1fa44976dae6 commit r15-7176-gb00bd29286345cc90afc61dcb16d1fa44976dae6 Author: Stefan Schulze Frielinghaus Date: Fri Jan 24 12:53:44 2025 +0100 s390: Implement isfinite and isnormal optabs Merge new optabs with the existing impleme

[gcc r15-7125] s390: Fix arch15 machine string for binutils

https://gcc.gnu.org/g:9ece1c247b4d8dbb997a3dc16daa613401c6a84a commit r15-7125-g9ece1c247b4d8dbb997a3dc16daa613401c6a84a Author: Stefan Schulze Frielinghaus Date: Wed Jan 22 13:55:08 2025 +0100 s390: Fix arch15 machine string for binutils gcc/ChangeLog: * config/s

[gcc r15-7054] s390: Vector shift: Add 128-bit integer support

https://gcc.gnu.org/g:10c52b3866572df9f84e41d8045cbf8c6ce6ab04 commit r15-7054-g10c52b3866572df9f84e41d8045cbf8c6ce6ab04 Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:10 2025 +0100 s390: Vector shift: Add 128-bit integer support Add 128-bit vector shift support. Depr

[gcc r15-7052] s390: arch15: Vector load positive: Add 128-bit integer support

https://gcc.gnu.org/g:4cf5e261df34878033e20fb2b8a13ea643ab7f4c commit r15-7052-g4cf5e261df34878033e20fb2b8a13ea643ab7f4c Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:10 2025 +0100 s390: arch15: Vector load positive: Add 128-bit integer support For previous architectu

[gcc r15-7055] s390: Update vec_(load,store)_len(,_r)

https://gcc.gnu.org/g:459816efa13d9d553a5c900336f6eef22072f1a1 commit r15-7055-g459816efa13d9d553a5c900336f6eef22072f1a1 Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:10 2025 +0100 s390: Update vec_(load,store)_len(,_r) Reflect latest updates for vec_(load,store)_len(

[gcc r15-7051] s390: arch15: Vector compare: Add 128-bit integer support

https://gcc.gnu.org/g:2e87d6e44198e2b134555d661366a2f941615511 commit r15-7051-g2e87d6e44198e2b134555d661366a2f941615511 Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:10 2025 +0100 s390: arch15: Vector compare: Add 128-bit integer support gcc/ChangeLog:

[gcc r15-7050] s390: arch15: Vector devide/remainder

https://gcc.gnu.org/g:f31dd2d9e683ddd8534663af092984ddb911 commit r15-7050-gf31dd2d9e683ddd8534663af092984ddb911 Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:09 2025 +0100 s390: arch15: Vector devide/remainder gcc/ChangeLog: * config/s390/vec

[gcc r15-7053] s390: arch15: Vector maximum/minimum: Add 128-bit integer support

https://gcc.gnu.org/g:ec226016ca4954a431409699a52850717617bbfa commit r15-7053-gec226016ca4954a431409699a52850717617bbfa Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:10 2025 +0100 s390: arch15: Vector maximum/minimum: Add 128-bit integer support For previous architec

[gcc r15-7049] s390: arch15: Count leading/trailing zeros

https://gcc.gnu.org/g:0f0b91ef70218e2cb4ab795ef04725a68ea04b15 commit r15-7049-g0f0b91ef70218e2cb4ab795ef04725a68ea04b15 Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:09 2025 +0100 s390: arch15: Count leading/trailing zeros Add vector single element 128-bit integer su

[gcc r15-7048] s390: arch15: Vector generate element masks

https://gcc.gnu.org/g:41a69915d06a707bb6c80cc1ebf5d1c1396d commit r15-7048-g41a69915d06a707bb6c80cc1ebf5d1c1396d Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:09 2025 +0100 s390: arch15: Vector generate element masks Add instruction vgem and vector builtins

[gcc r15-7047] s390: arch15: Vector eval

https://gcc.gnu.org/g:7fb7b36293519ed68481ca8477244b5a4f142d4a commit r15-7047-g7fb7b36293519ed68481ca8477244b5a4f142d4a Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:09 2025 +0100 s390: arch15: Vector eval Add instruction veval and builtin vec_evaluate. gcc/

[gcc r15-7046] s390: arch15: Vector blend

https://gcc.gnu.org/g:adeb6ecc5d906ce2389400085f3262b4a248c71c commit r15-7046-gadeb6ecc5d906ce2389400085f3262b4a248c71c Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:09 2025 +0100 s390: arch15: Vector blend Add instruction vblend and builtin vec_blend. gcc/C

[gcc r15-7045] s390: arch15: Bit deposit and extract

https://gcc.gnu.org/g:d71e20b889ac82c3ca14a1c5c420765a11b06df9 commit r15-7045-gd71e20b889ac82c3ca14a1c5c420765a11b06df9 Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:09 2025 +0100 s390: arch15: Bit deposit and extract Add instructions bdepg and bextg and correspondin

[gcc r15-7043] s390: arch15: New instruction variants supporting 128-bit integer

https://gcc.gnu.org/g:447b917e98ee34e2eae455b43784ab6a86b604f2 commit r15-7043-g447b917e98ee34e2eae455b43784ab6a86b604f2 Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:08 2025 +0100 s390: arch15: New instruction variants supporting 128-bit integer Add new instruction v

[gcc r15-7044] s390: arch15: Load indexed address

https://gcc.gnu.org/g:86a1acfd86f881c32e0ae57036df65edd7d1d441 commit r15-7044-g86a1acfd86f881c32e0ae57036df65edd7d1d441 Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:09 2025 +0100 s390: arch15: Load indexed address Add instructions lxa and llxa. gcc/ChangeLo

[gcc r15-7042] s390: arch15: Prepare for future builtins

https://gcc.gnu.org/g:b963174abfb601bc39504d09ac6b86c53660e170 commit r15-7042-gb963174abfb601bc39504d09ac6b86c53660e170 Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:08 2025 +0100 s390: arch15: Prepare for future builtins gcc/ChangeLog: * config/s390

[gcc r15-7041] s390: Bump __VEC__ and add 128-bit integer zvector types

https://gcc.gnu.org/g:13efa59ce66516937fd5e0608d2aa3aab46c5d76 commit r15-7041-g13efa59ce66516937fd5e0608d2aa3aab46c5d76 Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:08 2025 +0100 s390: Bump __VEC__ and add 128-bit integer zvector types Bump __VEC__ version to 10305

[gcc r15-7040] s390: arch15: Prepare for a future architecture

https://gcc.gnu.org/g:a8192b59175e2cfcf665573d8168a8be09bdfa51 commit r15-7040-ga8192b59175e2cfcf665573d8168a8be09bdfa51 Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:08 2025 +0100 s390: arch15: Prepare for a future architecture gcc/ChangeLog: * commo

[gcc r15-7039] s390: Sort definitions in vecintrin.h

https://gcc.gnu.org/g:2638aea49a927ed7419f334f3e3d44c49cf44a3e commit r15-7039-g2638aea49a927ed7419f334f3e3d44c49cf44a3e Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:08 2025 +0100 s390: Sort definitions in vecintrin.h gcc/ChangeLog: * config/s390/vec

[gcc r15-7038] s390: Stay scalar for TOINTVEC/tointvec

https://gcc.gnu.org/g:0c6fdb9befa611135f6f94f15d97664e8f02e41f commit r15-7038-g0c6fdb9befa611135f6f94f15d97664e8f02e41f Author: Stefan Schulze Frielinghaus Date: Mon Jan 20 10:01:08 2025 +0100 s390: Stay scalar for TOINTVEC/tointvec Currently TOINTVEC maps scalar mode TI/TF to ve

[gcc r15-6791] s390: Add expander for uaddc/usubc optabs

https://gcc.gnu.org/g:8a2d5bc28089b2660310b964ef75fb05eb387f88 commit r15-6791-g8a2d5bc28089b2660310b964ef75fb05eb387f88 Author: Stefan Schulze Frielinghaus Date: Fri Jan 10 15:14:08 2025 +0100 s390: Add expander for uaddc/usubc optabs gcc/ChangeLog: * config/s390

[gcc r15-6742] s390: Fix s390_constant_via_vgbm_p() [PR118362]

https://gcc.gnu.org/g:2f31819a0ac7b000fa3a456e5b068242e954edac commit r15-6742-g2f31819a0ac7b000fa3a456e5b068242e954edac Author: Stefan Schulze Frielinghaus Date: Thu Jan 9 17:49:02 2025 +0100 s390: Fix s390_constant_via_vgbm_p() [PR118362] Optimization s390_constant_via_vgbm_p()

[gcc r15-6608] Fix type in some Min() calls (#119248)

https://gcc.gnu.org/g:7a7903dec533e02c58e634b6ddd680f36c4cd933 commit r15-6608-g7a7903dec533e02c58e634b6ddd680f36c4cd933 Author: Stefan Schulze Frielinghaus Date: Mon Jan 6 19:17:28 2025 +0100 Fix type in some Min() calls (#119248) This is a follow-up to 6dec33834d1fd89f16e271dde9

[gcc r15-6607] Fix few size types in memprof (#119114)

https://gcc.gnu.org/g:f0b8256224ec082ecffddcb5624a4b5032c09113 commit r15-6607-gf0b8256224ec082ecffddcb5624a4b5032c09113 Author: Vitaly Buka Date: Mon Jan 6 19:17:09 2025 +0100 Fix few size types in memprof (#119114) Fix type in a few related Min() calls. Follow up to #11

[gcc r15-6605] Replace uptr by usize/SIZE_T in interfaces

https://gcc.gnu.org/g:0bb38b2786a097f97664afbcf6577b77dd305d44 commit r15-6605-g0bb38b2786a097f97664afbcf6577b77dd305d44 Author: Stefan Schulze Frielinghaus Date: Mon Jan 6 19:17:09 2025 +0100 Replace uptr by usize/SIZE_T in interfaces For some targets uptr is mapped to unsigned i

[gcc r15-6606] Add type __sanitizer::ssize (#116957)

https://gcc.gnu.org/g:1bd03564f29dc31e67e67efd93137d50fa7bb8a4 commit r15-6606-g1bd03564f29dc31e67e67efd93137d50fa7bb8a4 Author: Stefan Schulze Frielinghaus Date: Mon Jan 6 19:17:09 2025 +0100 Add type __sanitizer::ssize (#116957) Since the sanitizer merge in commit r15-5164-gfa32

[gcc r15-4538] testsuite: Fix typo in ext-floating19.C

https://gcc.gnu.org/g:9263523b7e522e5b8c9ac70df5efc73632c19380 commit r15-4538-g9263523b7e522e5b8c9ac70df5efc73632c19380 Author: Stefan Schulze Frielinghaus Date: Tue Oct 22 08:58:14 2024 +0200 testsuite: Fix typo in ext-floating19.C gcc/testsuite/ChangeLog: * g++

[gcc r15-4318] MAINTAINERS (s390 port): Add myself

https://gcc.gnu.org/g:fa04a1713b54bdc4c7b686c88117c9c46043ec73 commit r15-4318-gfa04a1713b54bdc4c7b686c88117c9c46043ec73 Author: Stefan Schulze Frielinghaus Date: Mon Oct 14 11:12:48 2024 +0200 MAINTAINERS (s390 port): Add myself ChangeLog: * MAINTAINERS (s390 por

[gcc r12-10729] s390: Fix TF to FPRX2 conversion [PR115860]

https://gcc.gnu.org/g:7051fa5fa4eaa24785a64072490c1e0c65039915 commit r12-10729-g7051fa5fa4eaa24785a64072490c1e0c65039915 Author: Stefan Schulze Frielinghaus Date: Fri Sep 27 12:45:42 2024 +0200 s390: Fix TF to FPRX2 conversion [PR115860] Currently subregs originating from *tf_to_

[gcc r12-10728] s390: Fix AQ and AR constraints

https://gcc.gnu.org/g:8d29e1c4ceaea4d3ceec6b51de5b7c31a6bc5f85 commit r12-10728-g8d29e1c4ceaea4d3ceec6b51de5b7c31a6bc5f85 Author: Stefan Schulze Frielinghaus Date: Fri Sep 27 12:45:42 2024 +0200 s390: Fix AQ and AR constraints Ensure for AQ and AR constraints that the resulting di

[gcc r13-9058] s390: Fix TF to FPRX2 conversion [PR115860]

https://gcc.gnu.org/g:f7037fd03ad842dc69e20c03942f29d982ad655e commit r13-9058-gf7037fd03ad842dc69e20c03942f29d982ad655e Author: Stefan Schulze Frielinghaus Date: Fri Sep 27 08:18:47 2024 +0200 s390: Fix TF to FPRX2 conversion [PR115860] Currently subregs originating from *tf_to_f

[gcc r13-9057] s390: Fix AQ and AR constraints

https://gcc.gnu.org/g:14f0fbfb0a4518d507b4038e0757346567024934 commit r13-9057-g14f0fbfb0a4518d507b4038e0757346567024934 Author: Stefan Schulze Frielinghaus Date: Fri Sep 27 08:18:47 2024 +0200 s390: Fix AQ and AR constraints Ensure for AQ and AR constraints that the resulting dis

[gcc r14-10713] s390: Fix TF to FPRX2 conversion [PR115860]

https://gcc.gnu.org/g:3eb3fbc89c638a72611efdc54110b8113f79ee8d commit r14-10713-g3eb3fbc89c638a72611efdc54110b8113f79ee8d Author: Stefan Schulze Frielinghaus Date: Thu Sep 26 19:38:02 2024 +0200 s390: Fix TF to FPRX2 conversion [PR115860] Currently subregs originating from *tf_to_

[gcc r14-10712] s390: Fix AQ and AR constraints

https://gcc.gnu.org/g:1670d3259dec8abf445ed4f282dcbf3a1e0d3032 commit r14-10712-g1670d3259dec8abf445ed4f282dcbf3a1e0d3032 Author: Stefan Schulze Frielinghaus Date: Thu Sep 26 19:38:02 2024 +0200 s390: Fix AQ and AR constraints Ensure for AQ and AR constraints that the resulting di

[gcc r12-10717] s390: Fix strict_low_part generation

https://gcc.gnu.org/g:4fe0b88159a9548f90db4e846f2033d51e1506c7 commit r12-10717-g4fe0b88159a9548f90db4e846f2033d51e1506c7 Author: Stefan Schulze Frielinghaus Date: Fri Sep 20 14:08:32 2024 +0200 s390: Fix strict_low_part generation In s390_expand_insv(), if generating code for ICM

[gcc r13-9045] s390: Fix strict_low_part generation

https://gcc.gnu.org/g:edda7ba3b569652eb782a7c47a4ad32e3c0e29dd commit r13-9045-gedda7ba3b569652eb782a7c47a4ad32e3c0e29dd Author: Stefan Schulze Frielinghaus Date: Fri Sep 20 14:07:36 2024 +0200 s390: Fix strict_low_part generation In s390_expand_insv(), if generating code for ICM

[gcc r14-10692] s390: Fix strict_low_part generation

https://gcc.gnu.org/g:bff6e5667d6a8bf8060e550bdcb40e094d00af41 commit r14-10692-gbff6e5667d6a8bf8060e550bdcb40e094d00af41 Author: Stefan Schulze Frielinghaus Date: Fri Sep 20 14:06:42 2024 +0200 s390: Fix strict_low_part generation In s390_expand_insv(), if generating code for ICM

[gcc r15-3733] s390: Remove -m{,no-}lra option

https://gcc.gnu.org/g:09a52cf036ba8f2fa7b60b18ba58ca17ffa1b146 commit r15-3733-g09a52cf036ba8f2fa7b60b18ba58ca17ffa1b146 Author: Stefan Schulze Frielinghaus Date: Fri Sep 20 13:53:08 2024 +0200 s390: Remove -m{,no-}lra option Since the old reload pass is about to be removed and we

[gcc r15-3626] s390: Fix TF to FPRX2 conversion [PR115860]

https://gcc.gnu.org/g:46c2538435dfc50dd5c67c4e03ce387d1f6ebe9b commit r15-3626-g46c2538435dfc50dd5c67c4e03ce387d1f6ebe9b Author: Stefan Schulze Frielinghaus Date: Fri Sep 13 15:09:55 2024 +0200 s390: Fix TF to FPRX2 conversion [PR115860] Currently subregs originating from *tf_to_f

[gcc r15-3625] s390: Fix AQ and AR constraints

https://gcc.gnu.org/g:1a71ff3b89aadc7fa0af0bca269d74bb23c1a957 commit r15-3625-g1a71ff3b89aadc7fa0af0bca269d74bb23c1a957 Author: Stefan Schulze Frielinghaus Date: Fri Sep 13 15:05:33 2024 +0200 s390: Fix AQ and AR constraints Ensure for AQ and AR constraints that the resulting dis

[gcc r15-3602] s390: Fix strict_low_part generation

https://gcc.gnu.org/g:9ebc9fbdddfe1ec85355b068354315a4da8e1ca0 commit r15-3602-g9ebc9fbdddfe1ec85355b068354315a4da8e1ca0 Author: Stefan Schulze Frielinghaus Date: Thu Sep 12 13:29:43 2024 +0200 s390: Fix strict_low_part generation In s390_expand_insv(), if generating code for ICM

[gcc r14-10582] s390: Fix high-level builtins vec_gfmsum{, _accum}_128

https://gcc.gnu.org/g:e903ada5e8881acec734eb3f89c3644bbd8da7e9 commit r14-10582-ge903ada5e8881acec734eb3f89c3644bbd8da7e9 Author: Stefan Schulze Frielinghaus Date: Wed Aug 14 20:12:35 2024 +0200 s390: Fix high-level builtins vec_gfmsum{,_accum}_128 Starting with r14-9449-g9f2b16ce

[gcc r15-2919] s390: Remove vector intrinsics

https://gcc.gnu.org/g:a247088adaf122116919235f4a40189506139495 commit r15-2919-ga247088adaf122116919235f4a40189506139495 Author: Stefan Schulze Frielinghaus Date: Wed Aug 14 20:01:43 2024 +0200 s390: Remove vector intrinsics The following intrinsics are not implemented. Thus, rem

[gcc r15-2918] s390: Fix high-level builtins vec_gfmsum{,_accum}_128

https://gcc.gnu.org/g:e8a7142a697c5d2673adea33ba23af82a89c9559 commit r15-2918-ge8a7142a697c5d2673adea33ba23af82a89c9559 Author: Stefan Schulze Frielinghaus Date: Wed Aug 14 20:01:36 2024 +0200 s390: Fix high-level builtins vec_gfmsum{,_accum}_128 Starting with r14-9449-g9f2b16ce1

[gcc r12-10627] s390: Fix unresolved iterators bhfgq and xdee

https://gcc.gnu.org/g:7ad764fe3c3ad0e1167b58cf3785629d788491f4 commit r12-10627-g7ad764fe3c3ad0e1167b58cf3785629d788491f4 Author: Stefan Schulze Frielinghaus Date: Sat Jul 20 17:13:03 2024 +0200 s390: Fix unresolved iterators bhfgq and xdee Code attribute bhfgq is missing a mappin

[gcc r13-8927] s390: Fix unresolved iterators bhfgq and xdee

https://gcc.gnu.org/g:130edabae09e18064e0bdcb12656e4f4f9a51ff3 commit r13-8927-g130edabae09e18064e0bdcb12656e4f4f9a51ff3 Author: Stefan Schulze Frielinghaus Date: Sat Jul 20 16:05:41 2024 +0200 s390: Fix unresolved iterators bhfgq and xdee Code attribute bhfgq is missing a mapping

[gcc r14-10482] s390: Fix unresolved iterators bhfgq and xdee

https://gcc.gnu.org/g:bb34b7eda1fbfcfe108d985fd0ae1421c2fa14c0 commit r14-10482-gbb34b7eda1fbfcfe108d985fd0ae1421c2fa14c0 Author: Stefan Schulze Frielinghaus Date: Sat Jul 20 16:03:33 2024 +0200 s390: Fix unresolved iterators bhfgq and xdee Code attribute bhfgq is missing a mappin

[gcc r12-10620] s390: Fix output template for movv1qi

https://gcc.gnu.org/g:9e00ae3e23eef8bff497981e00853ca092772201 commit r12-10620-g9e00ae3e23eef8bff497981e00853ca092772201 Author: Stefan Schulze Frielinghaus Date: Tue Jul 16 14:01:58 2024 +0200 s390: Fix output template for movv1qi Although for instructions MVI and MVIY it does n

[gcc r12-10619] s390: Align *cjump_64 and *icjump_64

https://gcc.gnu.org/g:06d825719fd4b71c8e3d34fd9756be7f847b commit r12-10619-g06d825719fd4b71c8e3d34fd9756be7f847b Author: Stefan Schulze Frielinghaus Date: Tue Jul 16 14:01:50 2024 +0200 s390: Align *cjump_64 and *icjump_64 During machine reorg we optimize backward jumps a

[gcc r13-8918] s390: Fix output template for movv1qi

https://gcc.gnu.org/g:1accf7036570cbb0fef9afa595634be03f8c14e8 commit r13-8918-g1accf7036570cbb0fef9afa595634be03f8c14e8 Author: Stefan Schulze Frielinghaus Date: Tue Jul 16 13:59:38 2024 +0200 s390: Fix output template for movv1qi Although for instructions MVI and MVIY it does no

[gcc r13-8917] s390: Align *cjump_64 and *icjump_64

https://gcc.gnu.org/g:544b65cddf296a63dfb91c6ffa4f474ae9d70052 commit r13-8917-g544b65cddf296a63dfb91c6ffa4f474ae9d70052 Author: Stefan Schulze Frielinghaus Date: Tue Jul 16 13:59:06 2024 +0200 s390: Align *cjump_64 and *icjump_64 During machine reorg we optimize backward jumps an

[gcc r15-2060] s390: Fix unresolved iterators bhfgq and xdee

https://gcc.gnu.org/g:a4abda934aa426137f059934629d3241f008e113 commit r15-2060-ga4abda934aa426137f059934629d3241f008e113 Author: Stefan Schulze Frielinghaus Date: Tue Jul 16 11:23:10 2024 +0200 s390: Fix unresolved iterators bhfgq and xdee Code attribute bhfgq is missing a mapping

[gcc r15-2057] s390: Enable vcond_mask for 128-bit ops

https://gcc.gnu.org/g:6d1095788e23c27061421c7d180209264ebb32f7 commit r15-2057-g6d1095788e23c27061421c7d180209264ebb32f7 Author: Stefan Schulze Frielinghaus Date: Tue Jul 16 10:41:46 2024 +0200 s390: Enable vcond_mask for 128-bit ops In preparation of dropping vcond{,u,eq} optabs

[gcc r15-2058] s390: Drop vcond{,u} expanders

https://gcc.gnu.org/g:75c0bf997d2808561451e62aa6b7ae7c8e32b9e9 commit r15-2058-g75c0bf997d2808561451e62aa6b7ae7c8e32b9e9 Author: Stefan Schulze Frielinghaus Date: Tue Jul 16 10:41:52 2024 +0200 s390: Drop vcond{,u} expanders Optabs vcond{,u} will be removed for GCC 15. Since regt

[gcc r15-2056] s390: Emulate vec_cmp{eq,gt,gtu} for 128-bit integers

https://gcc.gnu.org/g:1b575bb24a7a3d2b00197dd5deb4c26b313f442b commit r15-2056-g1b575bb24a7a3d2b00197dd5deb4c26b313f442b Author: Stefan Schulze Frielinghaus Date: Tue Jul 16 10:41:41 2024 +0200 s390: Emulate vec_cmp{eq,gt,gtu} for 128-bit integers Mode iterator V_HW enables V1TI f

[gcc r14-10416] s390: Fix output template for movv1qi

https://gcc.gnu.org/g:5ade7afdefe7a5179c6a139103885c2cf911d9d0 commit r14-10416-g5ade7afdefe7a5179c6a139103885c2cf911d9d0 Author: Stefan Schulze Frielinghaus Date: Sat Jul 13 08:01:59 2024 +0200 s390: Fix output template for movv1qi Although for instructions MVI and MVIY it does n

[gcc r14-10415] s390: Align *cjump_64 and *icjump_64

https://gcc.gnu.org/g:cd11413ff7c4353a3e336db415304f788d23a393 commit r14-10415-gcd11413ff7c4353a3e336db415304f788d23a393 Author: Stefan Schulze Frielinghaus Date: Sat Jul 13 08:01:51 2024 +0200 s390: Align *cjump_64 and *icjump_64 During machine reorg we optimize backward jumps a

[gcc r15-2002] s390: Fully exploit vgm, vgbm, vrepi

https://gcc.gnu.org/g:61715e9340ab8941d40d62158fe437e9dbe3e068 commit r15-2002-g61715e9340ab8941d40d62158fe437e9dbe3e068 Author: Stefan Schulze Frielinghaus Date: Fri Jul 12 13:42:08 2024 +0200 s390: Fully exploit vgm, vgbm, vrepi Currently instructions vgm and vrepi are utilized

[gcc r15-2001] s390: Fix output template for movv1qi

https://gcc.gnu.org/g:e6680d3f392f7f7cc2a1515276213e21e9eeab1c commit r15-2001-ge6680d3f392f7f7cc2a1515276213e21e9eeab1c Author: Stefan Schulze Frielinghaus Date: Fri Jul 12 13:40:19 2024 +0200 s390: Fix output template for movv1qi Although for instructions MVI and MVIY it does no

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