https://gcc.gnu.org/g:0c6fdb9befa611135f6f94f15d97664e8f02e41f

commit r15-7038-g0c6fdb9befa611135f6f94f15d97664e8f02e41f
Author: Stefan Schulze Frielinghaus <stefa...@gcc.gnu.org>
Date:   Mon Jan 20 10:01:08 2025 +0100

    s390: Stay scalar for TOINTVEC/tointvec
    
    Currently TOINTVEC maps scalar mode TI/TF to vector mode V1TI/V1TF,
    respectively.  As a consequence we may end up with patterns with a
    mixture of scalar and vector modes as e.g. for
    
    (define_insn "vec_sel0<mode>"
      [(set (match_operand:VT 0 "register_operand" "=v")
            (if_then_else:VT
             (eq (match_operand:<TOINTVEC> 3 "register_operand" "v")
                 (match_operand:<TOINTVEC> 4 "const0_operand" ""))
             (match_operand:VT 1 "register_operand" "v")
             (match_operand:VT 2 "register_operand" "v")))]
    
    This is cumbersome since gen_vec_sel0ti() and gen_vec_sel0tf() require
    that operands 3 and 4 are of vector mode whereas the remainder of
    operands must be of scalar mode.  Likewise for tointvec.
    
    Fixed by staying scalar.
    
    gcc/ChangeLog:
    
            * config/s390/vector.md: Stay scalar for TOINTVEC/tointvec.

Diff:
---
 gcc/config/s390/vector.md | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md
index 0616275a4c5b..66ce1599fa7d 100644
--- a/gcc/config/s390/vector.md
+++ b/gcc/config/s390/vector.md
@@ -147,19 +147,19 @@
                            (V1HI "V1HI") (V2HI "V2HI") (V4HI "V4HI") (V8HI 
"V8HI")
                            (V1SI "V1SI") (V2SI "V2SI") (V4SI "V4SI")
                            (V1DI "V1DI") (V2DI "V2DI")
-                           (V1TI "V1TI") (TI "V1TI")
+                           (V1TI "V1TI") (TI "TI")
                            (V1SF "V1SI") (V2SF "V2SI") (V4SF "V4SI")
                            (V1DF "V1DI") (V2DF "V2DI")
-                           (V1TF "V1TI") (TF "V1TI")])
+                           (V1TF "V1TI") (TF "TI")])
 
 (define_mode_attr tointvec [(V1QI "v1qi") (V2QI "v2qi") (V4QI "v4qi") (V8QI 
"v8qi") (V16QI "v16qi")
                            (V1HI "v1hi") (V2HI "v2hi") (V4HI "v4hi") (V8HI 
"v8hi")
                            (V1SI "v1si") (V2SI "v2si") (V4SI "v4si")
                            (V1DI "v1di") (V2DI "v2di")
-                           (V1TI "v1ti") (TI "v1ti")
+                           (V1TI "v1ti") (TI "ti")
                            (V1SF "v1si") (V2SF "v2si") (V4SF "v4si")
                            (V1DF "v1di") (V2DF "v2di")
-                           (V1TF "v1ti") (TF   "v1ti")])
+                           (V1TF "v1ti") (TF   "ti")])
 
 (define_mode_attr vw [(SF "w") (V1SF "w") (V2SF "v") (V4SF "v")
                      (DF "w") (V1DF "w") (V2DF "v")
@@ -3077,7 +3077,7 @@
          (unspec:CCRAW [(match_operand:TF 1 "register_operand" "")
                         (match_dup        2)]
                        UNSPEC_VEC_VFTCICC))
-     (clobber (scratch:V1TI))])
+     (clobber (scratch:TI))])
    (set (match_operand:SI                  0 "register_operand" "")
        (const_int 0))
    (set (match_dup                         0)
@@ -3101,7 +3101,7 @@
          (unspec:CCRAW [(match_operand:TF 1 "register_operand" "")
                         (match_dup        2)]
                        UNSPEC_VEC_VFTCICC))
-     (clobber (scratch:V1TI))])
+     (clobber (scratch:TI))])
    (set (match_operand:SI                  0 "register_operand" "")
        (const_int 0))
    (set (match_dup                         0)

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