https://gcc.gnu.org/g:6d1095788e23c27061421c7d180209264ebb32f7
commit r15-2057-g6d1095788e23c27061421c7d180209264ebb32f7
Author: Stefan Schulze Frielinghaus <stefa...@gcc.gnu.org>
Date: Tue Jul 16 10:41:46 2024 +0200
s390: Enable vcond_mask for 128-bit ops
In preparation of dropping vcond{,u,eq} optabs
https://gcc.gnu.org/pipermail/gcc-patches/2024-June/654690.html
enable 128-bit operands for vcond_mask---including integer as well as
floating point.
This fixes partially PR115519 w.r.t. autovec-long-double-signaling-*.c
tests.
gcc/ChangeLog:
* config/s390/vector.md: Enable vcond_mask for 128-bit ops.
Diff:
---
gcc/config/s390/vector.md | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md
index 756011728938..c8e8029167d3 100644
--- a/gcc/config/s390/vector.md
+++ b/gcc/config/s390/vector.md
@@ -760,12 +760,12 @@
})
(define_expand "vcond_mask_<mode><tointvec>"
- [(set (match_operand:V 0 "register_operand" "")
- (if_then_else:V
+ [(set (match_operand:VT 0 "register_operand" "")
+ (if_then_else:VT
(eq (match_operand:<TOINTVEC> 3 "register_operand" "")
(match_dup 4))
- (match_operand:V 2 "register_operand" "")
- (match_operand:V 1 "register_operand" "")))]
+ (match_operand:VT 2 "register_operand" "")
+ (match_operand:VT 1 "register_operand" "")))]
"TARGET_VX"
"operands[4] = CONST0_RTX (<TOINTVEC>mode);")
