[gcc r16-609] s390: Fix tf_to_fprx2

[Stefan Schulze Frielinghaus via Gcc-cvs]

https://gcc.gnu.org/g:8519b8ba9dd9567a5f90966351c1e758dbf511a4

commit r16-609-g8519b8ba9dd9567a5f90966351c1e758dbf511a4
Author: Stefan Schulze Frielinghaus <stefa...@gcc.gnu.org>
Date:   Wed May 14 09:22:00 2025 +0200

    s390: Fix tf_to_fprx2
    
    Insn tf_to_fprx2 moves a TF value into a floating-point register pair.
    For alternative 0, the input is a vector register, however, in the else
    case instruction ldr is emitted which expects floating-point register
    operands only.  Thus, this works only for vector registers which overlap
    with floating-point registers.  Replace ldr with vlr so that the
    remaining vector registers are dealt with, too.  Emitting a vlr instead
    of a ldr is fine since the destination register %v0 is part of a
    floating-point register pair which means that the low half of %v0 is
    ignored in the end anyway and therefore may be clobbered.
    
    gcc/ChangeLog:
    
            * config/s390/vector.md: Fix tf_to_fprx2 by using vlr instead of
            ldr.

Diff:
---
 gcc/config/s390/vector.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md
index 160e42a30058..cdd55b69a8b0 100644
--- a/gcc/config/s390/vector.md
+++ b/gcc/config/s390/vector.md
@@ -953,7 +953,7 @@
       else
        {
          reg_pair += 2;  // get rid of prefix %f
-         snprintf (buf, sizeof (buf), 
"ldr\t%%f0,%%f1;vpdi\t%%%%v%s,%%v1,%%%%v%s,5", reg_pair, reg_pair);
+         snprintf (buf, sizeof (buf), 
"vlr\t%%v0,%%v1;vpdi\t%%%%v%s,%%v1,%%%%v%s,5", reg_pair, reg_pair);
          output_asm_insn (buf, operands);
          return "";
        }