[gcc r15-9742] aarch64: Enable newly implemented features for FUJITSU-MONAKA

https://gcc.gnu.org/g:d79b3dc85d26051665b3e7412d5e1bd35915b882 commit r15-9742-gd79b3dc85d26051665b3e7412d5e1bd35915b882 Author: Yuta Mukai Date: Fri May 23 04:51:11 2025 + aarch64: Enable newly implemented features for FUJITSU-MONAKA This patch enables newly implemented featu

[gcc r16-928] aarch64: Enable newly implemented features for FUJITSU-MONAKA

https://gcc.gnu.org/g:33ee574a7444b238005d89fdfdf2f21f50b1fc6e commit r16-928-g33ee574a7444b238005d89fdfdf2f21f50b1fc6e Author: Yuta Mukai Date: Fri May 23 04:51:11 2025 + aarch64: Enable newly implemented features for FUJITSU-MONAKA This patch enables newly implemented featur

[gcc r16-328] Aarch64: Add __sqrt and __sqrtf intrinsics and corresponding tests

https://gcc.gnu.org/g:05df554536a8d33f4c438cfc7b006b3b2083246a commit r16-328-g05df554536a8d33f4c438cfc7b006b3b2083246a Author: Ayan Shafqat Date: Thu May 1 06:17:30 2025 -0700 Aarch64: Add __sqrt and __sqrtf intrinsics and corresponding tests This patch introduces two new inline

[gcc r16-327] Aarch64: Use BUILTIN_VHSDF_HSDF for vector and scalar sqrt builtins

https://gcc.gnu.org/g:5c917a585d765b0878afd9435e3b3eece9f820f9 commit r16-327-g5c917a585d765b0878afd9435e3b3eece9f820f9 Author: Ayan Shafqat Date: Thu May 1 06:14:44 2025 -0700 Aarch64: Use BUILTIN_VHSDF_HSDF for vector and scalar sqrt builtins This patch changes the `sqrt` builti

[gcc r16-110] opts.cc: Use opts rather than opts_set for validating -fipa-reorder-for-locality

https://gcc.gnu.org/g:fbf8443961f484ed7fb7e953206af1ee60558a24 commit r16-110-gfbf8443961f484ed7fb7e953206af1ee60558a24 Author: Kyrylo Tkachov Date: Thu Apr 24 05:33:54 2025 -0700 opts.cc: Use opts rather than opts_set for validating -fipa-reorder-for-locality This ensures -fno-i

[gcc r15-9580] opts.cc: Use opts rather than opts_set for validating -fipa-reorder-for-locality

https://gcc.gnu.org/g:f873125cbd513c6c8ec9f223e52cd5ad68fa7bbd commit r15-9580-gf873125cbd513c6c8ec9f223e52cd5ad68fa7bbd Author: Kyrylo Tkachov Date: Thu Apr 24 05:33:54 2025 -0700 opts.cc: Use opts rather than opts_set for validating -fipa-reorder-for-locality This ensures -fno-

[gcc r16-108] opts.cc Simplify handling of explicit -flto-partition= and -fipa-reorder-for-locality

https://gcc.gnu.org/g:040f94d1f63c3607a2f3faf5c329c3b2b6bf7d1e commit r16-108-g040f94d1f63c3607a2f3faf5c329c3b2b6bf7d1e Author: Kyrylo Tkachov Date: Thu Apr 24 00:34:09 2025 -0700 opts.cc Simplify handling of explicit -flto-partition= and -fipa-reorder-for-locality The handling o

[gcc r15-9579] opts.cc Simplify handling of explicit -flto-partition= and -fipa-reorder-for-locality

https://gcc.gnu.org/g:340a9f871f02a23a4480a7b5f4eacadf689089e5 commit r15-9579-g340a9f871f02a23a4480a7b5f4eacadf689089e5 Author: Kyrylo Tkachov Date: Thu Apr 24 00:34:09 2025 -0700 opts.cc Simplify handling of explicit -flto-partition= and -fipa-reorder-for-locality The handling

[gcc r15-9571] aarch64: Update FP8 dependencies for -mcpu=olympus

https://gcc.gnu.org/g:f1b9d0380a4b5896b95f088799661d903ede80b5 commit r15-9571-gf1b9d0380a4b5896b95f088799661d903ede80b5 Author: Kyrylo Tkachov Date: Tue Apr 22 06:17:34 2025 -0700 aarch64: Update FP8 dependencies for -mcpu=olympus We had not noticed that after g:299a8e2dc667e7959

[gcc r16-82] aarch64: Update FP8 dependencies for -mcpu=olympus

https://gcc.gnu.org/g:5d5e8e87a42af8c0d962fa16dc9835fb71778250 commit r16-82-g5d5e8e87a42af8c0d962fa16dc9835fb71778250 Author: Kyrylo Tkachov Date: Tue Apr 22 06:17:34 2025 -0700 aarch64: Update FP8 dependencies for -mcpu=olympus We had not noticed that after g:299a8e2dc667e795991

[gcc r15-9566] Document locality partitioning params in invoke.texi

https://gcc.gnu.org/g:7faf49825ca47b07bca7b966db66f9f50121076f commit r15-9566-g7faf49825ca47b07bca7b966db66f9f50121076f Author: Kyrylo Tkachov Date: Thu Apr 17 10:50:44 2025 -0700 Document locality partitioning params in invoke.texi Filip Kastl pointed out that contrib/check-para

[gcc r16-70] Document locality partitioning params in invoke.texi

https://gcc.gnu.org/g:b7fb18dcf79476aa30ed2ad6cc2eaeab1f266107 commit r16-70-gb7fb18dcf79476aa30ed2ad6cc2eaeab1f266107 Author: Kyrylo Tkachov Date: Thu Apr 17 10:50:44 2025 -0700 Document locality partitioning params in invoke.texi Filip Kastl pointed out that contrib/check-params

[gcc r15-9498] Regenerate common.opt.urls

https://gcc.gnu.org/g:5621b3b5c9ebd98f1f18787a6fceb015d19d33a5 commit r15-9498-g5621b3b5c9ebd98f1f18787a6fceb015d19d33a5 Author: Kyrylo Tkachov Date: Tue Apr 15 09:22:05 2025 -0700 Regenerate common.opt.urls Signed-off-by: Kyrylo Tkachov * common.opt.urls: Regene

[gcc r15-9487] Locality cloning pass: -fipa-reorder-for-locality

https://gcc.gnu.org/g:6d9fdf4bf57353f9260a2e0c8774854fb50f5128 commit r15-9487-g6d9fdf4bf57353f9260a2e0c8774854fb50f5128 Author: Kyrylo Tkachov Date: Thu Feb 27 09:24:10 2025 -0800 Locality cloning pass: -fipa-reorder-for-locality Implement partitioning and cloning in the callgrap

[gcc r15-9062] PR middle-end/119442: expr.cc: Fix vec_duplicate into vector boolean modes

https://gcc.gnu.org/g:70391e3958db791edea4e877636592de47a785e7 commit r15-9062-g70391e3958db791edea4e877636592de47a785e7 Author: Kyrylo Tkachov Date: Mon Mar 24 01:53:06 2025 -0700 PR middle-end/119442: expr.cc: Fix vec_duplicate into vector boolean modes In this testcase GCC trie

[gcc r15-8570] aarch64: Add support for -mcpu=olympus

https://gcc.gnu.org/g:1aa49fe0b18deb98e324cee18538d26b46829611 commit r15-8570-g1aa49fe0b18deb98e324cee18538d26b46829611 Author: Dhruv Chawla Date: Wed Mar 19 09:34:09 2025 -0700 aarch64: Add support for -mcpu=olympus This adds support for the NVIDIA Olympus core to the AArch64 ba

[gcc r15-8290] aarch64: Add +sve2p1 to -march=armv9.4-a flags

https://gcc.gnu.org/g:d46be332818361d7a31065c6d46df7181505ab30 commit r15-8290-gd46be332818361d7a31065c6d46df7181505ab30 Author: Kyrylo Tkachov Date: Mon Mar 17 08:24:18 2025 -0700 aarch64: Add +sve2p1 to -march=armv9.4-a flags The ArmARM says: "In an Armv9.4 implementation, i

[gcc r15-8083] Aarch64: Add FMA and FMAF intrinsic and corresponding tests

https://gcc.gnu.org/g:f4f7216c56fe2f67c72db5b7c4afa220725f3ed1 commit r15-8083-gf4f7216c56fe2f67c72db5b7c4afa220725f3ed1 Author: Ayan Shafqat Date: Mon Mar 17 09:28:27 2025 +0100 Aarch64: Add FMA and FMAF intrinsic and corresponding tests This patch introduces inline definitions f

[gcc r15-7832] PR rtl-optimization/119046: Don't mark PARALLEL RTXes with floating-point mode as trapping

https://gcc.gnu.org/g:db76482175c4e76db273d7fb3a00ae0f932529a6 commit r15-7832-gdb76482175c4e76db273d7fb3a00ae0f932529a6 Author: Kyrylo Tkachov Date: Thu Feb 27 09:00:25 2025 -0800 PR rtl-optimization/119046: Don't mark PARALLEL RTXes with floating-point mode as trapping In this

[gcc r15-7833] PR rtl-optimization/119046: aarch64: Fix PARALLEL mode for vec_perm DUP expansion

https://gcc.gnu.org/g:ff505948631713d8c62523005059b10e25343617 commit r15-7833-gff505948631713d8c62523005059b10e25343617 Author: Kyrylo Tkachov Date: Wed Mar 5 03:03:52 2025 -0800 PR rtl-optimization/119046: aarch64: Fix PARALLEL mode for vec_perm DUP expansion The PARALLEL creat

[gcc r15-6023] aarch64: Update cpuinfo strings for some arch features

https://gcc.gnu.org/g:0b79d8b98ec086fccd4714c1ff66ff4382780183 commit r15-6023-g0b79d8b98ec086fccd4714c1ff66ff4382780183 Author: Kyrylo Tkachov Date: Tue Dec 3 04:12:09 2024 -0800 aarch64: Update cpuinfo strings for some arch features The entries for some recently-added arch featu

[gcc r15-4963] PR target/117449: Restrict vector rotate match and split to pre-reload

https://gcc.gnu.org/g:161e246cf32f1298400aa3c1d86110490a3cd0ce commit r15-4963-g161e246cf32f1298400aa3c1d86110490a3cd0ce Author: Kyrylo Tkachov Date: Tue Nov 5 05:10:22 2024 -0800 PR target/117449: Restrict vector rotate match and split to pre-reload The vector rotate splitter has

[gcc r15-4889] PR 117048: simplify-rtx: Simplify (X << C1) [+, ^] (X >> C2) into ROTATE

https://gcc.gnu.org/g:1c46a541c6957e8b0eee339d4cff46e951a5ad4e commit r15-4889-g1c46a541c6957e8b0eee339d4cff46e951a5ad4e Author: Kyrylo Tkachov Date: Mon Nov 4 07:25:16 2024 -0800 PR 117048: simplify-rtx: Simplify (X << C1) [+,^] (X >> C2) into ROTATE This is, in effect, a reappli

[gcc r15-4886] Revert "PR 117048: simplify-rtx: Simplify (X << C1) [+, ^] (X >> C2) into ROTATE"

https://gcc.gnu.org/g:8762bb1b004c442b8dbb22a6d9eb0b7da4a3e59f commit r15-4886-g8762bb1b004c442b8dbb22a6d9eb0b7da4a3e59f Author: Kyrylo Tkachov Date: Mon Nov 4 14:04:59 2024 +0100 Revert "PR 117048: simplify-rtx: Simplify (X << C1) [+,^] (X >> C2) into ROTATE" This reverts commit

[gcc r15-4876] aarch64: Optimize vector rotates as vector permutes where possible

https://gcc.gnu.org/g:19757e1c28de07b45da03117e6ff7ae3e21e5a7a commit r15-4876-g19757e1c28de07b45da03117e6ff7ae3e21e5a7a Author: Kyrylo Tkachov Date: Wed Oct 16 04:10:08 2024 -0700 aarch64: Optimize vector rotates as vector permutes where possible Some vector rotate operations can

[gcc r15-4877] aarch64: Emit XAR for vector rotates where possible

https://gcc.gnu.org/g:14cb23e743e02e6923f7e46a14717e9f561f6723 commit r15-4877-g14cb23e743e02e6923f7e46a14717e9f561f6723 Author: Kyrylo Tkachov Date: Tue Oct 22 07:52:36 2024 -0700 aarch64: Emit XAR for vector rotates where possible We can make use of the integrated rotate step of

[gcc r15-4878] simplify-rtx: Simplify ROTATE:HI (X:HI, 8) into BSWAP:HI (X)

https://gcc.gnu.org/g:f1d16cd9236e0d59c04018e2dccc09dd736bf1df commit r15-4878-gf1d16cd9236e0d59c04018e2dccc09dd736bf1df Author: Kyrylo Tkachov Date: Thu Oct 17 06:39:57 2024 -0700 simplify-rtx: Simplify ROTATE:HI (X:HI, 8) into BSWAP:HI (X) With recent patch to improve detection

[gcc r15-4874] aarch64: Use canonical RTL representation for SVE2 XAR and extend it to fixed-width modes

https://gcc.gnu.org/g:1e5ff11142b2a37e7fd07a85248a0179bbb534be commit r15-4874-g1e5ff11142b2a37e7fd07a85248a0179bbb534be Author: Kyrylo Tkachov Date: Tue Oct 22 03:27:47 2024 -0700 aarch64: Use canonical RTL representation for SVE2 XAR and extend it to fixed-width modes The MD pa

[gcc r15-4875] PR 117048: aarch64: Add define_insn_and_split for vector ROTATE

https://gcc.gnu.org/g:1411d39bc72515227de2e490eb8f629d8bf74c95 commit r15-4875-g1411d39bc72515227de2e490eb8f629d8bf74c95 Author: Kyrylo Tkachov Date: Tue Oct 15 06:33:11 2024 -0700 PR 117048: aarch64: Add define_insn_and_split for vector ROTATE The ultimate goal in this PR is to m

[gcc r15-4873] PR 117048: simplify-rtx: Simplify (X << C1) [+, ^] (X >> C2) into ROTATE

https://gcc.gnu.org/g:de2bc6a7367aca2eecc925ebb64cfb86998d89f3 commit r15-4873-gde2bc6a7367aca2eecc925ebb64cfb86998d89f3 Author: Kyrylo Tkachov Date: Tue Oct 15 06:32:31 2024 -0700 PR 117048: simplify-rtx: Simplify (X << C1) [+,^] (X >> C2) into ROTATE simplify-rtx can transform (

[gcc r15-4721] aarch64: Use implementation namespace for vxarq_u64 immediate argument

https://gcc.gnu.org/g:7c0e4963d5de12b44414c82419d3d9e426f718b6 commit r15-4721-g7c0e4963d5de12b44414c82419d3d9e426f718b6 Author: Kyrylo Tkachov Date: Mon Oct 28 15:19:07 2024 +0100 aarch64: Use implementation namespace for vxarq_u64 immediate argument Looks like this immediate var

[gcc r15-4592] SVE intrinsics: Fold constant operands for svlsl.

https://gcc.gnu.org/g:3e7549ece7c6b90b9e961778361ee2b65bf104a9 commit r15-4592-g3e7549ece7c6b90b9e961778361ee2b65bf104a9 Author: Soumya AR Date: Thu Oct 17 09:30:35 2024 +0530 SVE intrinsics: Fold constant operands for svlsl. This patch implements constant folding for svlsl. Test

[gcc r15-4270] PR target/117048 aarch64: Use more canonical and optimization-friendly representation for XAR instru

https://gcc.gnu.org/g:1dcc6a1a67165a469d4cd9b6b39514c46cc656ad commit r15-4270-g1dcc6a1a67165a469d4cd9b6b39514c46cc656ad Author: Kyrylo Tkachov Date: Wed Oct 9 09:40:33 2024 -0700 PR target/117048 aarch64: Use more canonical and optimization-friendly representation for XAR instruction

[gcc r15-4269] PR 117048: simplify-rtx: Extend (x << C1) | (X >> C2) --> ROTATE transformation to vector operands

https://gcc.gnu.org/g:70566e719f0710323251e8e9190b322f4de8faeb commit r15-4269-g70566e719f0710323251e8e9190b322f4de8faeb Author: Kyrylo Tkachov Date: Wed Oct 9 09:39:55 2024 -0700 PR 117048: simplify-rtx: Extend (x << C1) | (X >> C2) --> ROTATE transformation to vector operands I

[gcc r15-4068] aarch64: Set Armv9-A generic L1 cache line size to 64 bytes

https://gcc.gnu.org/g:f000cb8cbc58b23a91c84d47d69481904981a1d9 commit r15-4068-gf000cb8cbc58b23a91c84d47d69481904981a1d9 Author: Kyrylo Tkachov Date: Fri Sep 20 05:11:39 2024 -0700 aarch64: Set Armv9-A generic L1 cache line size to 64 bytes I'd like to use a value of 64 bytes for

[gcc r15-3705] aarch64: Define l1_cache_line_size for -mcpu=neoverse-v2

https://gcc.gnu.org/g:9a99559a478111f7fbeec29bd78344df7651c707 commit r15-3705-g9a99559a478111f7fbeec29bd78344df7651c707 Author: Kyrylo Tkachov Date: Wed Sep 11 06:58:35 2024 -0700 aarch64: Define l1_cache_line_size for -mcpu=neoverse-v2 This is a small patch that sets the L1 cach

[gcc r15-3666] aarch64: Emit ADD X, Y, Y instead of SHL X, Y, #1 for SVE instructions.

https://gcc.gnu.org/g:4af196b2ebd662c5183f1998b0184985e85479b2 commit r15-3666-g4af196b2ebd662c5183f1998b0184985e85479b2 Author: Soumya AR Date: Tue Sep 10 14:18:44 2024 +0530 aarch64: Emit ADD X, Y, Y instead of SHL X, Y, #1 for SVE instructions. On Neoverse V2, SVE ADD instructi

[gcc r15-3018] aarch64: Reduce FP reassociation width for Neoverse V2 and set AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FM

https://gcc.gnu.org/g:cc572242688f0c6f8733c173038163efb09560fa commit r15-3018-gcc572242688f0c6f8733c173038163efb09560fa Author: Kyrylo Tkachov Date: Fri Aug 2 06:48:47 2024 -0700 aarch64: Reduce FP reassociation width for Neoverse V2 and set AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA

[gcc r15-2883] aarch64: Emit ADD X, Y, Y instead of SHL X, Y, #1 for Advanced SIMD

https://gcc.gnu.org/g:fcc766c82cf8e0473ba54f1660c8282a7ce3231c commit r15-2883-gfcc766c82cf8e0473ba54f1660c8282a7ce3231c Author: Kyrylo Tkachov Date: Mon Aug 5 11:29:44 2024 -0700 aarch64: Emit ADD X, Y, Y instead of SHL X, Y, #1 for Advanced SIMD On many cores, including Neoverse

[gcc r15-2859] Revert "lra: emit caller-save register spills before call insn [PR116028]"

https://gcc.gnu.org/g:4734c1bfe837b3e70bc783dafc442de3bca43d88 commit r15-2859-g4734c1bfe837b3e70bc783dafc442de3bca43d88 Author: Kyrylo Tkachov Date: Fri Aug 9 21:16:56 2024 +0200 Revert "lra: emit caller-save register spills before call insn [PR116028]" This reverts commit 3c67a0

[gcc r15-2842] aarch64: Check CONSTM1_RTX in definition of Dm constraint

https://gcc.gnu.org/g:19e565ed13972410451091a789fe58638d03b795 commit r15-2842-g19e565ed13972410451091a789fe58638d03b795 Author: Kyrylo Tkachov Date: Mon Aug 5 10:47:33 2024 -0700 aarch64: Check CONSTM1_RTX in definition of Dm constraint The constraint Dm is intended to match vect

[gcc r15-2720] tree-reassoc.cc: PR tree-optimization/116139 Don't assert when forming fully-pipelined FMAs on wide

https://gcc.gnu.org/g:44da85f4455ea11296667434172810ea76a62add commit r15-2720-g44da85f4455ea11296667434172810ea76a62add Author: Kyrylo Tkachov Date: Fri Aug 2 06:21:16 2024 -0700 tree-reassoc.cc: PR tree-optimization/116139 Don't assert when forming fully-pipelined FMAs on wide MULT targ

[gcc r15-2405] SVE intrinsics: Add strength reduction for division by constant.

https://gcc.gnu.org/g:7cde140863edea536c676096cbc3d84a6d1424e4 commit r15-2405-g7cde140863edea536c676096cbc3d84a6d1424e4 Author: Jennifer Schmitz Date: Tue Jul 16 01:59:50 2024 -0700 SVE intrinsics: Add strength reduction for division by constant. This patch folds SVE division whe

[gcc r15-2297] SVE Intrinsics: Change return type of redirect_call to gcall.

https://gcc.gnu.org/g:3adfcc5802237e1299d67e6d716481cd3db2234a commit r15-2297-g3adfcc5802237e1299d67e6d716481cd3db2234a Author: Jennifer Schmitz Date: Tue Jul 23 03:54:50 2024 -0700 SVE Intrinsics: Change return type of redirect_call to gcall. As suggested in the review of ht

[gcc r15-2254] Revert "aarch64: Fuse CMP+CSEL and CMP+CSET for -mcpu=neoverse-v2"

https://gcc.gnu.org/g:39562dd1e745c7aacc23b51b2849a7d346cbef14 commit r15-2254-g39562dd1e745c7aacc23b51b2849a7d346cbef14 Author: Kyrylo Tkachov Date: Wed Jul 24 17:25:43 2024 +0530 Revert "aarch64: Fuse CMP+CSEL and CMP+CSET for -mcpu=neoverse-v2" This reverts commit 4c5eb66e701bc

[gcc r15-2253] aarch64: Fuse CMP+CSEL and CMP+CSET for -mcpu=neoverse-v2

https://gcc.gnu.org/g:4c5eb66e701bc9f3bf1298269f52559b10d63a09 commit r15-2253-g4c5eb66e701bc9f3bf1298269f52559b10d63a09 Author: Jennifer Schmitz Date: Mon Jul 22 23:24:45 2024 -0700 aarch64: Fuse CMP+CSEL and CMP+CSET for -mcpu=neoverse-v2 According to the Neoverse V2 Software Op

[gcc r15-2128] [aarch64] Document rewriting of -march=native to -mcpu=native

https://gcc.gnu.org/g:a2cb656c0d1f0b493219025208fa8ed5c7abd2cb commit r15-2128-ga2cb656c0d1f0b493219025208fa8ed5c7abd2cb Author: Kyrylo Tkachov Date: Tue Jul 16 16:59:42 2024 +0530 [aarch64] Document rewriting of -march=native to -mcpu=native Commit dd9e5f4db2debf1429feab7f785962c

[gcc r15-1935] testsuite: Tests the pattern folding x/sqrt(x) to sqrt(x) for Float16

https://gcc.gnu.org/g:1ae5fc24e86ecc9e7b60346d9ca2e56f83517bda commit r15-1935-g1ae5fc24e86ecc9e7b60346d9ca2e56f83517bda Author: Jennifer Schmitz Date: Wed Jul 10 12:54:01 2024 +0530 testsuite: Tests the pattern folding x/sqrt(x) to sqrt(x) for Float16 As a follow-up to adding a p

[gcc r11-11565] aarch64: PR target/115475 Implement missing __ARM_FEATURE_SVE_BF16 macro

https://gcc.gnu.org/g:ee69d6e1e3bed8c3799c29fad3299bfd2e14f64e commit r11-11565-gee69d6e1e3bed8c3799c29fad3299bfd2e14f64e Author: Kyrylo Tkachov Date: Fri Jun 28 13:22:37 2024 +0530 aarch64: PR target/115475 Implement missing __ARM_FEATURE_SVE_BF16 macro The ACLE requires __ARM_FE

[gcc r11-11564] aarch64: PR target/115457 Implement missing __ARM_FEATURE_BF16 macro

https://gcc.gnu.org/g:d32cfe3352f3863325f8452e83400063b1e71e5b commit r11-11564-gd32cfe3352f3863325f8452e83400063b1e71e5b Author: Kyrylo Tkachov Date: Thu Jun 27 16:10:41 2024 +0530 aarch64: PR target/115457 Implement missing __ARM_FEATURE_BF16 macro The ACLE asks the user to test

[gcc r12-10600] aarch64: PR target/115475 Implement missing __ARM_FEATURE_SVE_BF16 macro

https://gcc.gnu.org/g:cdeb7ce83f71d1527626975e70d294ef55535d03 commit r12-10600-gcdeb7ce83f71d1527626975e70d294ef55535d03 Author: Kyrylo Tkachov Date: Fri Jun 28 13:22:37 2024 +0530 aarch64: PR target/115475 Implement missing __ARM_FEATURE_SVE_BF16 macro The ACLE requires __ARM_FE

[gcc r12-10599] aarch64: PR target/115457 Implement missing __ARM_FEATURE_BF16 macro

https://gcc.gnu.org/g:ebf561429ee4fbd125aa51ee985e32f1cfd4daed commit r12-10599-gebf561429ee4fbd125aa51ee985e32f1cfd4daed Author: Kyrylo Tkachov Date: Thu Jun 27 16:10:41 2024 +0530 aarch64: PR target/115457 Implement missing __ARM_FEATURE_BF16 macro The ACLE asks the user to test

[gcc r13-8891] aarch64: PR target/115475 Implement missing __ARM_FEATURE_SVE_BF16 macro

https://gcc.gnu.org/g:40d54856c1189ab6125d3eeb064df25082dd0e50 commit r13-8891-g40d54856c1189ab6125d3eeb064df25082dd0e50 Author: Kyrylo Tkachov Date: Fri Jun 28 13:22:37 2024 +0530 aarch64: PR target/115475 Implement missing __ARM_FEATURE_SVE_BF16 macro The ACLE requires __ARM_FEA

[gcc r13-8890] aarch64: PR target/115457 Implement missing __ARM_FEATURE_BF16 macro

https://gcc.gnu.org/g:7785289f8d1f6350a3f48232ce578009b0e23534 commit r13-8890-g7785289f8d1f6350a3f48232ce578009b0e23534 Author: Kyrylo Tkachov Date: Thu Jun 27 16:10:41 2024 +0530 aarch64: PR target/115457 Implement missing __ARM_FEATURE_BF16 macro The ACLE asks the user to test

[gcc r14-10380] aarch64: PR target/115475 Implement missing __ARM_FEATURE_SVE_BF16 macro

https://gcc.gnu.org/g:dc63b5dbe60da076f46cb3bcb10f0f84cfd7fb7d commit r14-10380-gdc63b5dbe60da076f46cb3bcb10f0f84cfd7fb7d Author: Kyrylo Tkachov Date: Fri Jun 28 13:22:37 2024 +0530 aarch64: PR target/115475 Implement missing __ARM_FEATURE_SVE_BF16 macro The ACLE requires __ARM_FE

[gcc r14-10379] aarch64: PR target/115457 Implement missing __ARM_FEATURE_BF16 macro

https://gcc.gnu.org/g:1a97c8ed42562ceabb00c9c516435541909c134b commit r14-10379-g1a97c8ed42562ceabb00c9c516435541909c134b Author: Kyrylo Tkachov Date: Thu Jun 27 16:10:41 2024 +0530 aarch64: PR target/115457 Implement missing __ARM_FEATURE_BF16 macro The ACLE asks the user to test

[gcc r15-1839] Aarch64, bugfix: Fix NEON bigendian addp intrinsic [PR114890]

https://gcc.gnu.org/g:11049cdf204bc96bc407e5dd44ed3b8a492f405a commit r15-1839-g11049cdf204bc96bc407e5dd44ed3b8a492f405a Author: Alfie Richards Date: Thu Jul 4 09:09:19 2024 +0200 Aarch64, bugfix: Fix NEON bigendian addp intrinsic [PR114890] This change removes code that switches

[gcc r15-1838] Aarch64: Add test for non-commutative SIMD intrinsic

https://gcc.gnu.org/g:14c6793885c11c892ac90d5046979ab20de1b0b1 commit r15-1838-g14c6793885c11c892ac90d5046979ab20de1b0b1 Author: Alfie Richards Date: Thu Jul 4 09:07:57 2024 +0200 Aarch64: Add test for non-commutative SIMD intrinsic This adds a test for non-commutative SIMD NEON i

[gcc r15-1817] [PATCH] match.pd: Fold x/sqrt(x) to sqrt(x)

https://gcc.gnu.org/g:8dc5ad3ce8d4d2cd6cc2b7516d282395502fdf7d commit r15-1817-g8dc5ad3ce8d4d2cd6cc2b7516d282395502fdf7d Author: Jennifer Schmitz Date: Wed Jul 3 14:40:42 2024 +0200 [PATCH] match.pd: Fold x/sqrt(x) to sqrt(x) This patch adds a pattern in match.pd folding x/sqrt(x)

[gcc r15-1812] aarch64: PR target/115457 Implement missing __ARM_FEATURE_BF16 macro

https://gcc.gnu.org/g:c10942134fa759843ac1ed1424b86fcb8e6368ba commit r15-1812-gc10942134fa759843ac1ed1424b86fcb8e6368ba Author: Kyrylo Tkachov Date: Thu Jun 27 16:10:41 2024 +0530 aarch64: PR target/115457 Implement missing __ARM_FEATURE_BF16 macro The ACLE asks the user to test

[gcc r15-1813] aarch64: PR target/115475 Implement missing __ARM_FEATURE_SVE_BF16 macro

https://gcc.gnu.org/g:6492c7130d6ae9992298fc3d072e2589d1131376 commit r15-1813-g6492c7130d6ae9992298fc3d072e2589d1131376 Author: Kyrylo Tkachov Date: Fri Jun 28 13:22:37 2024 +0530 aarch64: PR target/115475 Implement missing __ARM_FEATURE_SVE_BF16 macro The ACLE requires __ARM_FEA

[gcc r13-8873] aarch64: Fix +nocrypto handling

https://gcc.gnu.org/g:c93a9bba743ac236f6045ba7aafbc12a83726c48 commit r13-8873-gc93a9bba743ac236f6045ba7aafbc12a83726c48 Author: Andrew Carlotti Date: Fri Nov 24 17:06:07 2023 + aarch64: Fix +nocrypto handling Additionally, replace all checks for the AARCH64_FL_CRYPTO bit with

[gcc r11-11540] Add support for -mcpu=grace

https://gcc.gnu.org/g:bb943609534fcbd984d39a9a7efef12fa2667ac6 commit r11-11540-gbb943609534fcbd984d39a9a7efef12fa2667ac6 Author: Kyrylo Tkachov Date: Wed Jun 19 14:56:02 2024 +0530 Add support for -mcpu=grace This adds support for the NVIDIA Grace CPU to aarch64. We reuse the

[gcc r12-10584] Add support for -mcpu=grace

https://gcc.gnu.org/g:25cb13649b1765a21f21907f2d7a0aa2135accb5 commit r12-10584-g25cb13649b1765a21f21907f2d7a0aa2135accb5 Author: Kyrylo Tkachov Date: Wed Jun 19 14:56:02 2024 +0530 Add support for -mcpu=grace This adds support for the NVIDIA Grace CPU to aarch64. We reuse the

[gcc r13-8871] Add support for -mcpu=grace

https://gcc.gnu.org/g:952ea3260e40992d3bf5e1f17b4845a4e5c908b5 commit r13-8871-g952ea3260e40992d3bf5e1f17b4845a4e5c908b5 Author: Kyrylo Tkachov Date: Wed Jun 19 14:56:02 2024 +0530 Add support for -mcpu=grace This adds support for the NVIDIA Grace CPU to aarch64. We reuse the

[gcc r14-10351] aarch64: Add support for -mcpu=grace

https://gcc.gnu.org/g:c2878a9a1719e067b1476377bd2a292350482e61 commit r14-10351-gc2878a9a1719e067b1476377bd2a292350482e61 Author: Kyrylo Tkachov Date: Wed Jun 19 14:56:02 2024 +0530 aarch64: Add support for -mcpu=grace This adds support for the NVIDIA Grace CPU to aarch64. We

[gcc r15-1647] [aarch64] Add support for -mcpu=grace

https://gcc.gnu.org/g:7fada36c77829a197f63dde0d48ca33139105202 commit r15-1647-g7fada36c77829a197f63dde0d48ca33139105202 Author: Kyrylo Tkachov Date: Wed Jun 26 09:42:11 2024 +0200 [aarch64] Add support for -mcpu=grace This adds support for the NVIDIA Grace CPU to aarch64. We

[gcc r15-1403] [MAINTAINERS] Update my email address

https://gcc.gnu.org/g:5f6b42969d598139640e60daf1d0b9bdfcaa9f73 commit r15-1403-g5f6b42969d598139640e60daf1d0b9bdfcaa9f73 Author: Kyrylo Tkachov Date: Tue Jun 18 14:00:54 2024 +0200 [MAINTAINERS] Update my email address Pushing to trunk. * MAINTAINERS (aarch64 port

[gcc r14-9782] [MAINTAINERS] Update my email address and step down as arm port maintainer

https://gcc.gnu.org/g:f2ccfb2d0b2698e6b140e4d09e53b701a3193384 commit r14-9782-gf2ccfb2d0b2698e6b140e4d09e53b701a3193384 Author: Kyrylo Tkachov Date: Thu Apr 4 09:12:28 2024 +0100 [MAINTAINERS] Update my email address and step down as arm port maintainer * MAINTAINERS: Upd