https://gcc.gnu.org/g:6492c7130d6ae9992298fc3d072e2589d1131376
commit r15-1813-g6492c7130d6ae9992298fc3d072e2589d1131376
Author: Kyrylo Tkachov <ktkac...@nvidia.com>
Date: Fri Jun 28 13:22:37 2024 +0530
aarch64: PR target/115475 Implement missing __ARM_FEATURE_SVE_BF16 macro
The ACLE requires __ARM_FEATURE_SVE_BF16 to be enabled when SVE and BF16
and the associated intrinsics are available.
GCC does support the required intrinsics for TARGET_SVE_BF16 so define
this macro too.
Bootstrapped and tested on aarch64-none-linux-gnu.
gcc/
PR target/115475
* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins):
Define __ARM_FEATURE_SVE_BF16 for TARGET_SVE_BF16.
gcc/testsuite/
PR target/115475
* gcc.target/aarch64/acle/bf16_sve_feature.c: New test.
Signed-off-by: Kyrylo Tkachov <ktkac...@nvidia.com>
Diff:
---
gcc/config/aarch64/aarch64-c.cc | 3 +++
gcc/testsuite/gcc.target/aarch64/acle/bf16_sve_feature.c | 10 ++++++++++
2 files changed, 13 insertions(+)
diff --git a/gcc/config/aarch64/aarch64-c.cc b/gcc/config/aarch64/aarch64-c.cc
index f5d70339e4e..2aff097dd33 100644
--- a/gcc/config/aarch64/aarch64-c.cc
+++ b/gcc/config/aarch64/aarch64-c.cc
@@ -254,6 +254,9 @@ aarch64_update_cpp_builtins (cpp_reader *pfile)
"__ARM_FEATURE_BF16_SCALAR_ARITHMETIC", pfile);
aarch64_def_or_undef (TARGET_BF16_FP,
"__ARM_FEATURE_BF16", pfile);
+ aarch64_def_or_undef (TARGET_SVE_BF16,
+ "__ARM_FEATURE_SVE_BF16", pfile);
+
aarch64_def_or_undef (TARGET_LS64,
"__ARM_FEATURE_LS64", pfile);
aarch64_def_or_undef (AARCH64_ISA_RCPC, "__ARM_FEATURE_RCPC", pfile);
diff --git a/gcc/testsuite/gcc.target/aarch64/acle/bf16_sve_feature.c
b/gcc/testsuite/gcc.target/aarch64/acle/bf16_sve_feature.c
new file mode 100644
index 00000000000..cb3ddac71a3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/acle/bf16_sve_feature.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+
+#pragma GCC target "+sve+bf16"
+#ifndef __ARM_FEATURE_SVE_BF16
+#error "__ARM_FEATURE_SVE_BF16 is not defined but should be!"
+#endif
+
+void
+foo (void) {}
+
