https://gcc.gnu.org/g:d79b3dc85d26051665b3e7412d5e1bd35915b882
commit r15-9742-gd79b3dc85d26051665b3e7412d5e1bd35915b882 Author: Yuta Mukai <mukai.y...@fujitsu.com> Date: Fri May 23 04:51:11 2025 +0000 aarch64: Enable newly implemented features for FUJITSU-MONAKA This patch enables newly implemented features in GCC (FAMINMAX, FP8FMA, FP8DOT2, FP8DOT4, LUT) for FUJITSU-MONAKA processor (-mcpu=fujitsu-monaka). 2025-05-23 Yuta Mukai <mukai.y...@fujitsu.com> gcc/ChangeLog: * config/aarch64/aarch64-cores.def (fujitsu-monaka): Update ISA features. (cherry picked from commit 33ee574a7444b238005d89fdfdf2f21f50b1fc6e) Diff: --- gcc/config/aarch64/aarch64-cores.def | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def index 12096300d012..24b7cd362aaf 100644 --- a/gcc/config/aarch64/aarch64-cores.def +++ b/gcc/config/aarch64/aarch64-cores.def @@ -132,7 +132,7 @@ AARCH64_CORE("octeontx2f95mm", octeontx2f95mm, cortexa57, V8_2A, (CRYPTO, PROFI /* Fujitsu ('F') cores. */ AARCH64_CORE("a64fx", a64fx, a64fx, V8_2A, (F16, SVE), a64fx, 0x46, 0x001, -1) -AARCH64_CORE("fujitsu-monaka", fujitsu_monaka, cortexa57, V9_3A, (F16, FP8, LS64, RNG, CRYPTO, SVE2_AES, SVE2_BITPERM, SVE2_SHA3, SVE2_SM4), fujitsu_monaka, 0x46, 0x003, -1) +AARCH64_CORE("fujitsu-monaka", fujitsu_monaka, cortexa57, V9_3A, (F16, FAMINMAX, FP8FMA, FP8DOT2, FP8DOT4, LS64, LUT, RNG, CRYPTO, SVE2_AES, SVE2_BITPERM, SVE2_SHA3, SVE2_SM4), fujitsu_monaka, 0x46, 0x003, -1) /* HiSilicon ('H') cores. */ AARCH64_CORE("tsv110", tsv110, tsv110, V8_2A, (CRYPTO, F16), tsv110, 0x48, 0xd01, -1)