https://gcc.gnu.org/g:895ea5bdc5e6485faa5fe88ead5a5d8d1f3dc5b9
commit r15-9263-g895ea5bdc5e6485faa5fe88ead5a5d8d1f3dc5b9
Author: Jonathan Wakely
Date: Mon Apr 7 20:46:44 2025 +0100
libbacktrace: Use correct type in backtrace_atomic_store_int
libbacktrace/ChangeLog:
https://gcc.gnu.org/g:ee65440cbd8042a5e5885e18bde70f8d530e4404
commit r15-9328-gee65440cbd8042a5e5885e18bde70f8d530e4404
Author: Paul Thomas
Date: Wed Apr 9 09:50:04 2025 +0100
Fortran: Fix some problems with the reduce intrinsic [PR119460]
2025-04-09 Paul Thomas
https://gcc.gnu.org/g:3f2e8aef6f9e70da075261da80fa1400a2341634
commit 3f2e8aef6f9e70da075261da80fa1400a2341634
Author: Matty Kuhn
Date: Fri Apr 4 18:09:41 2025 -0600
gccrs: fix ICE segfault with empty feature gate
This patch fixes an issue where an empty feature gate would segfaul
https://gcc.gnu.org/g:4bd63c709de82bfecde8cf99145974b349918d5d
commit r14-11575-g4bd63c709de82bfecde8cf99145974b349918d5d
Author: xuli
Date: Mon Oct 28 04:41:09 2024 +
RISC-V:Bugfix for vlmul_ext and vlmul_trunc with NULL return value[pr117286]
This patch fixes following ICE:
https://gcc.gnu.org/g:f77aeb99dde12544ea7c29004e88d46a8d5aa7b2
commit f77aeb99dde12544ea7c29004e88d46a8d5aa7b2
Author: Pierre-Emmanuel Patry
Date: Tue Apr 1 15:57:47 2025 +0200
Make loop label truly optional
A loop label error state was in use to represent missing loop label but
https://gcc.gnu.org/g:cee353c2653d274768a67677c8ea37fd23422b3c
commit r15-9342-gcee353c2653d274768a67677c8ea37fd23422b3c
Author: Iain Buclaw
Date: Wed Apr 9 20:02:02 2025 +0200
d: Fix forward referenced enums missing type names in debug info [PR118309]
Calling `rest_of_type_compil
https://gcc.gnu.org/g:630bca9fa83236e108e9421549bdd5058133c3dd
commit r14-11578-g630bca9fa83236e108e9421549bdd5058133c3dd
Author: Patrick Palka
Date: Wed Apr 9 17:48:05 2025 -0400
libstdc++: Fix constraint recursion in basic_const_iterator operator-
[PR115046]
It was proposed in
https://gcc.gnu.org/g:d69f73c0334486f3c66937388f02008736809e87
commit r15-9351-gd69f73c0334486f3c66937388f02008736809e87
Author: Patrick Palka
Date: Wed Apr 9 17:48:05 2025 -0400
libstdc++: Fix constraint recursion in basic_const_iterator operator-
[PR115046]
It was proposed in P
https://gcc.gnu.org/g:f3862ab07943d1fc6e6a0416657ae4b7d1f3941d
commit r15-9350-gf3862ab07943d1fc6e6a0416657ae4b7d1f3941d
Author: Patrick Palka
Date: Wed Apr 9 17:47:34 2025 -0400
c++: ICE with nested default targ lambdas [PR119574]
Here we substitute into the inner lambda twice, f
https://gcc.gnu.org/g:6704d95ec859d9e7480da130bff1e6b58fe37350
commit r15-9349-g6704d95ec859d9e7480da130bff1e6b58fe37350
Author: Bob Dubner
Date: Wed Apr 9 16:23:53 2025 -0400
cobol: Proper comparison of alphanumeric to refmoded numeric-display
[PR119682]
gcc/cobol
https://gcc.gnu.org/g:4f41d8fa5a73e2703d417b0e44bce48aa35bfd91
commit r14-11564-g4f41d8fa5a73e2703d417b0e44bce48aa35bfd91
Author: Jin Ma
Date: Sat Sep 7 10:29:02 2024 -0600
[PATCH v4] [target/116592] RISC-V: Fix illegal operands "th.vsetvli
zero,0,e32,m8" for XTheadVector
Since t
https://gcc.gnu.org/g:d0663c143071331bd3bff7e396bc0e761dd98939
commit r14-11561-gd0663c143071331bd3bff7e396bc0e761dd98939
Author: Bohan Lei
Date: Wed Sep 18 07:20:23 2024 -0600
[PATCH] RISC-V: Allow zero operand for DI variants of vssubu.vx
The RISC-V vector machine description re
https://gcc.gnu.org/g:4203060a73e65e4fa3e091b060a973c3296b84e9
commit r15-9345-g4203060a73e65e4fa3e091b060a973c3296b84e9
Author: Jakub Jelinek
Date: Wed Apr 9 22:00:35 2025 +0200
h8300: Fix up bit test and jump splitter [PR119664]
r12-2601 has added this define_insn_and_split and
https://gcc.gnu.org/g:101ac9e5acbd9ff7216565492988be7b4f02587d
commit r15-9344-g101ac9e5acbd9ff7216565492988be7b4f02587d
Author: Joseph Myers
Date: Wed Apr 9 20:06:02 2025 +
Update gcc de.po
* de.po: Update.
Diff:
---
gcc/po/de.po | 366 +-
https://gcc.gnu.org/g:76b267b43cbf93163b1648c4430ab1102e24142e
commit r15-9347-g76b267b43cbf93163b1648c4430ab1102e24142e
Author: Jakub Jelinek
Date: Wed Apr 9 22:03:50 2025 +0200
modula2: FIx a comment typo
During make gcc.pot I've noticed among tons of other warnings (e.g. becaus
https://gcc.gnu.org/g:e081ced345c45581a4891361c08e50e07720239e
commit r15-9346-ge081ced345c45581a4891361c08e50e07720239e
Author: Jakub Jelinek
Date: Wed Apr 9 22:01:30 2025 +0200
libquadmath: Fix up THREEp96 constant in expq
Here is a cherry-pick from glibc [BZ #32411] fix.
https://gcc.gnu.org/g:f7738c36710f8084e24cbb1d92acf3b6e5e83ea9
commit r15-9348-gf7738c36710f8084e24cbb1d92acf3b6e5e83ea9
Author: Jakub Jelinek
Date: Wed Apr 9 22:07:33 2025 +0200
pretty-print: Fix format specifier description
I've noticed we talk about %Ns even when that isn't sup
https://gcc.gnu.org/g:76d902a68d8331fa3d06f3ba04d361795b17bb5a
commit r15-9343-g76d902a68d8331fa3d06f3ba04d361795b17bb5a
Author: Andrew Pinski
Date: Wed Apr 9 12:47:53 2025 -0700
aarch64: Add sve testcase for PR 116595 [PR116595]
This was fixed with r15-9329-gf183ae0ae891a47176487
https://gcc.gnu.org/g:24d1832e0d6edce4f6f717135fcec65d6939e199
commit r15-9332-g24d1832e0d6edce4f6f717135fcec65d6939e199
Author: Pan Li
Date: Wed Apr 9 19:08:21 2025 +0800
Revert "RISC-V: Refine the testcases for cond_widen_complicate-3"
This reverts commit f70f4b60debce4a22372578
https://gcc.gnu.org/g:f3ac41f84249d10a1685c73d67e5d071902fcc4c
commit r14-11547-gf3ac41f84249d10a1685c73d67e5d071902fcc4c
Author: Jeff Law
Date: Sat Jan 18 13:44:33 2025 -0700
[RISC-V][PR target/116308] Fix generation of initial RTL for atomics
While this wasn't originally marked
https://gcc.gnu.org/g:28fe2b087baea05759aa7386fb8c3862aecf51ef
commit r14-11568-g28fe2b087baea05759aa7386fb8c3862aecf51ef
Author: Jin Ma
Date: Thu Aug 8 07:49:51 2024 -0600
RISC-V: Delete duplicate '#define RISCV_DWARF_VLENB'
gcc/ChangeLog:
* config/riscv/riscv.h
https://gcc.gnu.org/g:334545194d9023fb9b2f72ee0dcde8af94930f25
commit r15-9340-g334545194d9023fb9b2f72ee0dcde8af94930f25
Author: Harald Anlauf
Date: Tue Apr 8 22:30:15 2025 +0200
Fortran: fix issue with impure elemental subroutine and interface [PR119656]
PR fortran/119656
https://gcc.gnu.org/g:4645d092969face6aa1da4c919924697185f9cf9
commit r15-9339-g4645d092969face6aa1da4c919924697185f9cf9
Author: Jeff Law
Date: Wed Apr 9 08:33:17 2025 -0600
[RISC-V] Fix more fallout from combine.c changes
Trivial fallout from the recent combine work. We end up w
https://gcc.gnu.org/g:327c7c38123eec6264324acd98b4386363d05cb4
commit r14-11567-g327c7c38123eec6264324acd98b4386363d05cb4
Author: 曾治金
Date: Wed Aug 14 14:06:23 2024 +0800
RISC-V: Fix factor in dwarf_poly_indeterminate_value [PR116305]
This patch is to fix the bug (BugId:116305) in
https://gcc.gnu.org/g:5615fea2fce63d49d67691f102601868147c2bbc
commit r14-11562-g5615fea2fce63d49d67691f102601868147c2bbc
Author: Andreas Schwab
Date: Thu Sep 12 13:55:09 2024 +0200
riscv: Fix duplicate assmbler label in @tlsdesc insn
Use %= instead of maintaining a sequence numbe
https://gcc.gnu.org/g:94b774c5c1cd67608c31d593167996351e952cea
commit r14-11563-g94b774c5c1cd67608c31d593167996351e952cea
Author: garthlei
Date: Wed Sep 11 17:09:37 2024 +0800
RISC-V: Fix vl_used_by_non_rvv_insn logic of vsetvl pass
This patch fixes a bug in the current vsetvl pas
https://gcc.gnu.org/g:eaf423763c780795ea7ae914d390ac07e149871e
commit r14-11571-geaf423763c780795ea7ae914d390ac07e149871e
Author: Patrick O'Neill
Date: Tue Jul 30 14:28:23 2024 -0700
RISC-V: Reject 'd' extension with ILP32E ABI
Also add a testcase for -mabi=lp64d where 'd' is requ
https://gcc.gnu.org/g:95ac2d8afb386ccd7277f4906e0aca88d53c835a
commit r14-11570-g95ac2d8afb386ccd7277f4906e0aca88d53c835a
Author: Robin Dapp
Date: Wed Jul 31 16:54:03 2024 +0200
RISC-V: Correct mode_idx attribute for viwalu wx variants [PR116149].
In PR116149 we choose a wrong vec
https://gcc.gnu.org/g:b7d975945025d1e4e9237c90b46bf4f660289d22
commit r14-11572-gb7d975945025d1e4e9237c90b46bf4f660289d22
Author: Robin Dapp
Date: Wed Jul 24 09:08:00 2024 +0200
RISC-V: Error early with V and no M extension.
For calculating the value of a poly_int at runtime we us
https://gcc.gnu.org/g:ca6adeda373fc97ff57a79bc1a078f90776330cd
commit r14-11555-gca6adeda373fc97ff57a79bc1a078f90776330cd
Author: Robin Dapp
Date: Wed Dec 11 20:48:30 2024 +0100
RISC-V: Fix compress shuffle pattern [PR117383].
This patch makes vcompress use the tail-undisturbed po
https://gcc.gnu.org/g:d2f5d28415fe28881b4b8cadf6df85cf94ded233
commit r14-11566-gd2f5d28415fe28881b4b8cadf6df85cf94ded233
Author: Kito Cheng
Date: Tue Aug 27 21:27:02 2024 +0800
RISC-V: Add missing mode_idx for vrol and vror
We add pattern for vector rotate, but seems like we forg
https://gcc.gnu.org/g:164aededa828c5db6195a10f9d0f6a500f2cbef9
commit r14-11557-g164aededa828c5db6195a10f9d0f6a500f2cbef9
Author: Robin Dapp
Date: Thu Nov 21 14:49:53 2024 +0100
RISC-V: Ensure vtype for full-register moves [PR117544].
As discussed in PR117544 the VTYPE register is
https://gcc.gnu.org/g:5b3558944a7a03071744585ee8c55f30d51b5653
commit r14-11560-g5b3558944a7a03071744585ee8c55f30d51b5653
Author: Xianmiao Qu
Date: Wed Sep 18 07:28:44 2024 -0600
[PATCH] RISC-V: Fix th.extu operands exceeding range on rv32.
The Combine Pass may generate zero_extra
https://gcc.gnu.org/g:37d13153635b78013a8d27d2be9da99d0f2a88a7
commit r14-11558-g37d13153635b78013a8d27d2be9da99d0f2a88a7
Author: Jin Ma
Date: Wed Sep 18 08:56:23 2024 -0600
[PATCH v3] RISC-V: Fixed incorrect semantic description in DF to DI pattern
in the Zfa extension on rv32.
https://gcc.gnu.org/g:3aca82bc3a3ab62f96bf6ebe9e38ccc78cc8dca8
commit r15-9338-g3aca82bc3a3ab62f96bf6ebe9e38ccc78cc8dca8
Author: Uros Bizjak
Date: Wed Apr 9 16:21:18 2025 +0200
testsuite/x86: Correctly escape asterisk in scan-assembler
Asterisk in []* regexp applies to bracket exp
https://gcc.gnu.org/g:80ab25142565e83477af7c3e57f0a4dcf51b9659
commit r14-11559-g80ab25142565e83477af7c3e57f0a4dcf51b9659
Author: Xianmiao Qu
Date: Wed Sep 18 07:35:12 2024 -0600
[PATCH 1/2] RISC-V: Fix the outer_code when calculating the cost of SET
expression.
I think it is a t
https://gcc.gnu.org/g:6547906bdbdb3feb0d3bd96e09ceffcbc489349f
commit r14-11554-g6547906bdbdb3feb0d3bd96e09ceffcbc489349f
Author: Jeff Law
Date: Mon Dec 30 13:51:55 2024 -0700
[RISC-V][PR target/106544] Avoid ICEs due to bogus asms
This is a fix for a bug Andrew P filed a while ba
https://gcc.gnu.org/g:08e381e8af3ec9beaa887824c41d4551b54e5063
commit r14-11552-g08e381e8af3ec9beaa887824c41d4551b54e5063
Author: Robin Dapp
Date: Mon Jan 13 17:09:35 2025 -0700
RISC-V: Disallow negative step for interleaving [PR117682]
Hi,
in PR117682 we build an interle
https://gcc.gnu.org/g:6a66212916e70a9f27adf458b79c309c926dcf42
commit r14-11576-g6a66212916e70a9f27adf458b79c309c926dcf42
Author: Patrick O'Neill
Date: Wed Aug 21 23:48:24 2024 -0700
RISC-V: Fix vid const vector expander for non-npatterns size steps
Prior to this patch the expande
https://gcc.gnu.org/g:cdb987e977e03ba78a8a0e094967a5121e01f2ce
commit r14-11573-gcdb987e977e03ba78a8a0e094967a5121e01f2ce
Author: Jeff Law
Date: Sun Jun 9 09:17:55 2024 -0600
[committed] [RISC-V] Fix false-positive uninitialized variable
Andreas noted we were getting an uninit war
https://gcc.gnu.org/g:af3ebb414e2b88973d570e8878bc6262c0a1b3a9
commit r14-11549-gaf3ebb414e2b88973d570e8878bc6262c0a1b3a9
Author: Kito Cheng
Date: Mon Dec 23 21:27:46 2024 +0800
RISC-V: Move fortran testcase to gfortran.target
gcc/testsuite/ChangeLog:
* gcc.target
https://gcc.gnu.org/g:86b0f63adb0815b40705051484dcb7ac640d
commit r14-11569-g86b0f63adb0815b40705051484dcb7ac640d
Author: Jeff Law
Date: Thu Aug 8 07:42:26 2024 -0600
[RISC-V][PR target/116240] Ensure object is a comparison before extracting
arguments
This was supposed to
https://gcc.gnu.org/g:46732eb89db2f5124f9433ef9460ff301ab7d737
commit r14-11553-g46732eb89db2f5124f9433ef9460ff301ab7d737
Author: Andreas Schwab
Date: Tue Jan 7 12:23:37 2025 -0700
[PATCH] riscv: add mising masking in lrsc expander (PR118137)
gcc:
PR target/118137
https://gcc.gnu.org/g:6cd78e383a98553482811f10318ff3da9a101d38
commit r14-11574-g6cd78e383a98553482811f10318ff3da9a101d38
Author: xuli
Date: Tue Nov 12 02:31:28 2024 +
RISC-V: Bugfix for
max_sew_overlap_and_next_ratio_valid_for_prev_sew_p[pr117483]
This patch fixs https://gcc
https://gcc.gnu.org/g:e19a21f8edda3de1e460094e54239928bd289a31
commit r14-11565-ge19a21f8edda3de1e460094e54239928bd289a31
Author: Robin Dapp
Date: Tue Aug 27 10:25:34 2024 +0200
RISC-V: Fix subreg of VLS modes larger than a vector [PR116086].
When the source mode is potentially la
https://gcc.gnu.org/g:1eb6bf312839d0ff6f0f1a246f9b0b715d1c4b7a
commit r14-11550-g1eb6bf312839d0ff6f0f1a246f9b0b715d1c4b7a
Author: Kito Cheng
Date: Mon Dec 23 23:23:44 2024 +0800
RISC-V: Fix code gen for reduction with length 0 [PR118182]
`.MASK_LEN_FOLD_LEFT_PLUS`(or `mask_len_fol
https://gcc.gnu.org/g:acb636a9c3ac18e7234e37c99bd6e9200b80b9bd
commit r14-11556-gacb636a9c3ac18e7234e37c99bd6e9200b80b9bd
Author: Pan Li
Date: Wed Dec 4 13:53:52 2024 +0800
RISC-V: Add assert for insn operand out of range access [PR117878][NFC]
According to the the initial analysi
https://gcc.gnu.org/g:e4586ae318436d63aa91c2d417f068987c77e442
commit r14-11548-ge4586ae318436d63aa91c2d417f068987c77e442
Author: Jin Ma
Date: Sat Jan 18 07:43:17 2025 -0700
[PR target/118357] RISC-V: Disable fusing vsetvl instructions by
VSETVL_VTYPE_CHANGE_ONLY for XTheadVector.
https://gcc.gnu.org/g:6f549f865d02f897f682dddf56f392a22c01df6c
commit r14-11551-g6f549f865d02f897f682dddf56f392a22c01df6c
Author: Robin Dapp
Date: Thu Jan 9 20:45:10 2025 +0100
RISC-V: Fix vsetvl compatibility predicate [PR118154].
In PR118154 we emit strided stores but the first
https://gcc.gnu.org/g:9ea6bdac02af61f360b5741bef978be02924252d
commit r15-9337-g9ea6bdac02af61f360b5741bef978be02924252d
Author: Jonathan Yong <10wa...@gmail.com>
Date: Mon Apr 7 15:40:05 2025 +
deref-before-check-pr113253.c: Fix bogus warnings on lp32
Warnings about pointer si
https://gcc.gnu.org/g:0f74d1e38a7dd1931ab110c2b64b633393393437
commit r15-9336-g0f74d1e38a7dd1931ab110c2b64b633393393437
Author: Jeff Law
Date: Wed Apr 9 07:55:06 2025 -0600
[committed][RISC-V] Adjust expected output for rvv test
The recent combine changes twiddled code generation
https://gcc.gnu.org/g:39deb26060ecf9c055489e96fa1d9c1d641ecefe
commit r15-9335-g39deb26060ecf9c055489e96fa1d9c1d641ecefe
Author: Jakub Jelinek
Date: Wed Apr 9 15:43:48 2025 +0200
riscv: Fix r15-9270 fallout on RISC-V
On Wed, Apr 09, 2025 at 02:38:01PM +0200, Mark Wielaard wrote:
https://gcc.gnu.org/g:07de7717a22b1503760e9b79dfbe22a0f428
commit r15-9334-g07de7717a22b1503760e9b79dfbe22a0f428
Author: Richard Biener
Date: Wed Apr 9 14:36:19 2025 +0200
rtl-optimization/119689 - compare-debug failure with LRA
The previous change to fix LRA rematerializa
https://gcc.gnu.org/g:3e3b665cc77791f2e088aeee124d8a9fb7f6eb41
commit r15-9333-g3e3b665cc77791f2e088aeee124d8a9fb7f6eb41
Author: Iain Buclaw
Date: Wed Apr 9 14:49:14 2025 +0200
d: Use CONSTRUCTOR_ZERO_PADDING_BITS in the D FE [PR117832]
Adds a new wrapper function for `build_const
https://gcc.gnu.org/g:6e77a83ffbe4253c306b5b3750cf4ee38e5ce071
commit r15-9331-g6e77a83ffbe4253c306b5b3750cf4ee38e5ce071
Author: Jakub Jelinek
Date: Wed Apr 9 12:27:38 2025 +0200
libcpp: Fix error recovery after use of __VA_ARGS__ as macro argument
[PR118674]
The following testca
https://gcc.gnu.org/g:ac1044da4b3db6cba7aa5d9faa1f0622b10ff823
commit r15-9330-gac1044da4b3db6cba7aa5d9faa1f0622b10ff823
Author: Robin Dapp
Date: Wed Apr 9 12:11:52 2025 +0200
testsuite: Add -mabi to pr116595.C
As usual, I forgot to add -mabi=lp64d to the test case. This patch ad
https://gcc.gnu.org/g:f183ae0ae891a471764876eb1e69239904598bb4
commit r15-9329-gf183ae0ae891a471764876eb1e69239904598bb4
Author: Robin Dapp
Date: Thu Apr 3 16:46:05 2025 +0200
expr: Use constant_lower_bound classifying constructor els [PR116595].
In categorize_ctor_elements_1 we d
https://gcc.gnu.org/g:faff25435b0d23b2ac4deef5a9434c8cd098c0d2
commit r15-9327-gfaff25435b0d23b2ac4deef5a9434c8cd098c0d2
Author: Richard Biener
Date: Tue Apr 8 14:57:05 2025 +0200
bootstrap/119680 - fix cross-compiler build with --enable-host-shared
It seems that at least when cro
https://gcc.gnu.org/g:668fb8231327b7385492464ab879fe06f9859ca1
commit 668fb8231327b7385492464ab879fe06f9859ca1
Author: Ondřej Machota
Date: Tue Apr 8 23:27:00 2025 +0200
rtl-ssa-dce: delete dead debug insns
Diff:
---
gcc/dce.cc | 138 --
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