[gcc r14-10896] i386: Modify regexp of pr117304-1.c

https://gcc.gnu.org/g:6a0e143a6449bcc250af13642263f671f756500b commit r14-10896-g6a0e143a6449bcc250af13642263f671f756500b Author: Hu, Lin1 Date: Thu Nov 7 10:13:15 2024 +0800 i386: Modify regexp of pr117304-1.c Since the test doesn't care if the hint is correct, modify the reg

[gcc r15-5006] i386: Modify regexp of pr117304-1.c

https://gcc.gnu.org/g:4473cf8409f4db19ad91bd784e32dc54eccf02a3 commit r15-5006-g4473cf8409f4db19ad91bd784e32dc54eccf02a3 Author: Hu, Lin1 Date: Thu Nov 7 10:13:15 2024 +0800 i386: Modify regexp of pr117304-1.c Since the test doesn't care if the hint is correct, modify the rege

[gcc r15-5005] limit ifcombine stmt moving and adjust flow info

https://gcc.gnu.org/g:c2d58f88c1a9f190f475ae8b91f6a1859f164410 commit r15-5005-gc2d58f88c1a9f190f475ae8b91f6a1859f164410 Author: Alexandre Oliva Date: Thu Nov 7 02:47:50 2024 -0300 limit ifcombine stmt moving and adjust flow info It became apparent that conditions could be combine

[gcc(refs/users/aoliva/heads/testme)] drop redundant ifcombine_ifandif parm

https://gcc.gnu.org/g:77c925464e50dfdf224be3c27e5b72de21a92e86 commit 77c925464e50dfdf224be3c27e5b72de21a92e86 Author: Alexandre Oliva Date: Thu Nov 7 02:47:19 2024 -0300 drop redundant ifcombine_ifandif parm In preparation to changes that may modify both inner and outer condi

[gcc r15-5004] handle TRUTH_ANDIF cond exprs in ifcombine_replace_cond

https://gcc.gnu.org/g:13cf22eb557eb5e3d796822247d8d4957bdb25da commit r15-5004-g13cf22eb557eb5e3d796822247d8d4957bdb25da Author: Alexandre Oliva Date: Thu Nov 7 02:47:46 2024 -0300 handle TRUTH_ANDIF cond exprs in ifcombine_replace_cond The upcoming move of fold_truth_andor to ifc

[gcc r15-5001] adjust update_profile_after_ifcombine for noncontiguous ifcombine

https://gcc.gnu.org/g:02dc5036ba8d816048b942e51f74a9e4b3fde173 commit r15-5001-g02dc5036ba8d816048b942e51f74a9e4b3fde173 Author: Alexandre Oliva Date: Thu Nov 7 02:47:34 2024 -0300 adjust update_profile_after_ifcombine for noncontiguous ifcombine Prepare for ifcombining noncontigu

[gcc r15-5003] ifcombine across noncontiguous blocks

https://gcc.gnu.org/g:ae074c69fd5aff10953264dbd9740cebfeb0902e commit r15-5003-gae074c69fd5aff10953264dbd9740cebfeb0902e Author: Alexandre Oliva Date: Thu Nov 7 02:47:42 2024 -0300 ifcombine across noncontiguous blocks Rework ifcombine to support merging conditions from noncontigu

[gcc r15-5002] extend ifcombine_replace_cond to handle noncontiguous ifcombine

https://gcc.gnu.org/g:6eac478619193eeb2fd714eb0988ce3197dd63b1 commit r15-5002-g6eac478619193eeb2fd714eb0988ce3197dd63b1 Author: Alexandre Oliva Date: Thu Nov 7 02:47:38 2024 -0300 extend ifcombine_replace_cond to handle noncontiguous ifcombine Prepare to handle noncontiguous ifco

[gcc r15-5000] introduce ifcombine_replace_cond

https://gcc.gnu.org/g:f9fb8f96cd7d849ca68da8839b2e8fe8eeb70411 commit r15-5000-gf9fb8f96cd7d849ca68da8839b2e8fe8eeb70411 Author: Alexandre Oliva Date: Thu Nov 7 02:47:31 2024 -0300 introduce ifcombine_replace_cond Refactor ifcombine_ifandif, moving the common code from the various

[gcc r15-4999] drop redundant ifcombine_ifandif parm

https://gcc.gnu.org/g:77c925464e50dfdf224be3c27e5b72de21a92e86 commit r15-4999-g77c925464e50dfdf224be3c27e5b72de21a92e86 Author: Alexandre Oliva Date: Thu Nov 7 02:47:19 2024 -0300 drop redundant ifcombine_ifandif parm In preparation to changes that may modify both inner and outer

[gcc r15-4998] allow vuses in ifcombine blocks

https://gcc.gnu.org/g:8e6a25b01becf449d54154b7e83de5f4955cba37 commit r15-4998-g8e6a25b01becf449d54154b7e83de5f4955cba37 Author: Alexandre Oliva Date: Thu Nov 7 02:47:15 2024 -0300 allow vuses in ifcombine blocks Disallowing vuses in blocks for ifcombine is too strict, and it

[gcc r15-4997] [testsuite] disable PIE on ia32 on more tests

https://gcc.gnu.org/g:2ec80c60d4f10dcdbc9fad5d35297bfa432d14aa commit r15-4997-g2ec80c60d4f10dcdbc9fad5d35297bfa432d14aa Author: Alexandre Oliva Date: Thu Nov 7 02:47:06 2024 -0300 [testsuite] disable PIE on ia32 on more tests Multiple tests fail on ia32 with -fPIE enabled by defa

[gcc r15-4996] [testsuite] fix pr70321.c PIC expectations

https://gcc.gnu.org/g:d17a2e8bfc91a8e401a2d8c61e23fba36e28a43d commit r15-4996-gd17a2e8bfc91a8e401a2d8c61e23fba36e28a43d Author: Alexandre Oliva Date: Thu Nov 7 02:46:57 2024 -0300 [testsuite] fix pr70321.c PIC expectations When we select a non-bx get_pc_thunk, we get an extra mov

[gcc(refs/users/aoliva/heads/testme)] ifcombine across noncontiguous blocks

https://gcc.gnu.org/g:ae074c69fd5aff10953264dbd9740cebfeb0902e commit ae074c69fd5aff10953264dbd9740cebfeb0902e Author: Alexandre Oliva Date: Thu Nov 7 02:47:42 2024 -0300 ifcombine across noncontiguous blocks Rework ifcombine to support merging conditions from noncontiguous bl

[gcc/aoliva/heads/testbase] (404 commits) RISC-V: Add testcases for signed imm SAT_ADD form1

The branch 'aoliva/heads/testbase' was updated to point to: 1e2ae65a7f01... RISC-V: Add testcases for signed imm SAT_ADD form1 It previously pointed to: fc40202c1ac5... SVE intrinsics: Fold division and multiplication by -1 to n Diff: Summary of changes (added commits): -

[gcc(refs/users/aoliva/heads/testme)] limit ifcombine stmt moving and adjust flow info

https://gcc.gnu.org/g:c2d58f88c1a9f190f475ae8b91f6a1859f164410 commit c2d58f88c1a9f190f475ae8b91f6a1859f164410 Author: Alexandre Oliva Date: Thu Nov 7 02:47:50 2024 -0300 limit ifcombine stmt moving and adjust flow info It became apparent that conditions could be combined that had

[gcc(refs/users/aoliva/heads/testme)] adjust update_profile_after_ifcombine for noncontiguous ifcombine

https://gcc.gnu.org/g:02dc5036ba8d816048b942e51f74a9e4b3fde173 commit 02dc5036ba8d816048b942e51f74a9e4b3fde173 Author: Alexandre Oliva Date: Thu Nov 7 02:47:34 2024 -0300 adjust update_profile_after_ifcombine for noncontiguous ifcombine Prepare for ifcombining noncontiguous blocks

[gcc(refs/users/aoliva/heads/testme)] extend ifcombine_replace_cond to handle noncontiguous ifcombine

https://gcc.gnu.org/g:6eac478619193eeb2fd714eb0988ce3197dd63b1 commit 6eac478619193eeb2fd714eb0988ce3197dd63b1 Author: Alexandre Oliva Date: Thu Nov 7 02:47:38 2024 -0300 extend ifcombine_replace_cond to handle noncontiguous ifcombine Prepare to handle noncontiguous ifcombine, int

[gcc(refs/users/aoliva/heads/testme)] handle TRUTH_ANDIF cond exprs in ifcombine_replace_cond

https://gcc.gnu.org/g:13cf22eb557eb5e3d796822247d8d4957bdb25da commit 13cf22eb557eb5e3d796822247d8d4957bdb25da Author: Alexandre Oliva Date: Thu Nov 7 02:47:46 2024 -0300 handle TRUTH_ANDIF cond exprs in ifcombine_replace_cond The upcoming move of fold_truth_andor to ifcombine bri

[gcc(refs/users/aoliva/heads/testme)] introduce ifcombine_replace_cond

https://gcc.gnu.org/g:f9fb8f96cd7d849ca68da8839b2e8fe8eeb70411 commit f9fb8f96cd7d849ca68da8839b2e8fe8eeb70411 Author: Alexandre Oliva Date: Thu Nov 7 02:47:31 2024 -0300 introduce ifcombine_replace_cond Refactor ifcombine_ifandif, moving the common code from the various paths

[gcc(refs/users/aoliva/heads/testme)] allow vuses in ifcombine blocks

https://gcc.gnu.org/g:8e6a25b01becf449d54154b7e83de5f4955cba37 commit 8e6a25b01becf449d54154b7e83de5f4955cba37 Author: Alexandre Oliva Date: Thu Nov 7 02:47:15 2024 -0300 allow vuses in ifcombine blocks Disallowing vuses in blocks for ifcombine is too strict, and it prevents u

[gcc(refs/users/aoliva/heads/testme)] [testsuite] disable PIE on ia32 on more tests

https://gcc.gnu.org/g:2ec80c60d4f10dcdbc9fad5d35297bfa432d14aa commit 2ec80c60d4f10dcdbc9fad5d35297bfa432d14aa Author: Alexandre Oliva Date: Thu Nov 7 02:47:06 2024 -0300 [testsuite] disable PIE on ia32 on more tests Multiple tests fail on ia32 with -fPIE enabled by default becaus

[gcc/aoliva/heads/testme] (414 commits) limit ifcombine stmt moving and adjust flow info

The branch 'aoliva/heads/testme' was updated to point to: c2d58f88c1a9... limit ifcombine stmt moving and adjust flow info It previously pointed to: 948a9475337a... fold fold_truth_andor field merging into ifcombine Diff: !!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST): --

[gcc(refs/users/aoliva/heads/testme)] [testsuite] fix pr70321.c PIC expectations

https://gcc.gnu.org/g:d17a2e8bfc91a8e401a2d8c61e23fba36e28a43d commit d17a2e8bfc91a8e401a2d8c61e23fba36e28a43d Author: Alexandre Oliva Date: Thu Nov 7 02:46:57 2024 -0300 [testsuite] fix pr70321.c PIC expectations When we select a non-bx get_pc_thunk, we get an extra mov to set up

[gcc r14-10895] i386: Add OPTION_MASK_ISA2_EVEX512 for some AVX512 instructions.

https://gcc.gnu.org/g:05fd99e3d5e9f00e4e23596ed15a3cec2aaba128 commit r14-10895-g05fd99e3d5e9f00e4e23596ed15a3cec2aaba128 Author: Hu, Lin1 Date: Tue Nov 5 15:49:57 2024 +0800 i386: Add OPTION_MASK_ISA2_EVEX512 for some AVX512 instructions. gcc/ChangeLog: PR target

[gcc r15-4995] RISC-V: Add testcases for signed imm SAT_ADD form1

https://gcc.gnu.org/g:1e2ae65a7f01fa3dcdbfd1bb5bc87b860172336d commit r15-4995-g1e2ae65a7f01fa3dcdbfd1bb5bc87b860172336d Author: xuli Date: Mon Nov 4 10:00:45 2024 + RISC-V: Add testcases for signed imm SAT_ADD form1 This patch adds testcase for form1, as shown below:

[gcc r15-4994] Match:Support signed imm SAT_ADD form1

https://gcc.gnu.org/g:da31786910f253bba062d8f7126b269c432083ff commit r15-4994-gda31786910f253bba062d8f7126b269c432083ff Author: xuli Date: Wed Nov 6 01:56:09 2024 + Match:Support signed imm SAT_ADD form1 This patch would like to support .SAT_ADD when one of the op is sing

[gcc(refs/vendors/ibm/heads/mmaplus)] Update ChangeLog.*

https://gcc.gnu.org/g:3b2b644646c703d9535205a45d7702a5b7b9f232 commit 3b2b644646c703d9535205a45d7702a5b7b9f232 Author: Michael Meissner Date: Wed Nov 6 16:54:27 2024 -0500 Update ChangeLog.* Diff: --- gcc/ChangeLog.mmaplus | 13 + 1 file changed, 13 insertions(+) diff --git

[gcc(refs/vendors/ibm/heads/mmaplus)] Set default name to power8 if no --with-cpu.

https://gcc.gnu.org/g:6c83daecb0f8b82377f635a03956eff337d57843 commit 6c83daecb0f8b82377f635a03956eff337d57843 Author: Michael Meissner Date: Wed Nov 6 16:52:07 2024 -0500 Set default name to power8 if no --with-cpu. 2024-11-06 Michael Meissner gcc/ *

[gcc r15-4992] avx10_2-comibf-2.c: Require AVX10.2 support

https://gcc.gnu.org/g:859ce74dc25b9e77faa10144f981585bd3e00edc commit r15-4992-g859ce74dc25b9e77faa10144f981585bd3e00edc Author: H.J. Lu Date: Wed Nov 6 16:14:38 2024 +0800 avx10_2-comibf-2.c: Require AVX10.2 support Since avx10_2-comibf-2.c is a run test, require AVX10.2 support.

[gcc r15-4991] [PATCH v2] RISC-V: zero_extend(not) -> xor optimization [PR112398]

https://gcc.gnu.org/g:69bd93c167fefbdff0cb88614275358b7a2b2941 commit r15-4991-g69bd93c167fefbdff0cb88614275358b7a2b2941 Author: Alexey Merzlyakov Date: Wed Nov 6 14:39:30 2024 -0700 [PATCH v2] RISC-V: zero_extend(not) -> xor optimization [PR112398] This patch adds optimization of

[gcc(refs/users/meissner/heads/work182-vpair)] Update ChangeLog.*

https://gcc.gnu.org/g:2f898582819b6775236789ffb9cde763f7c96b34 commit 2f898582819b6775236789ffb9cde763f7c96b34 Author: Michael Meissner Date: Sat Nov 2 01:29:48 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.vpair | 35 +-- 1 file changed, 5 inserti

[gcc(refs/users/meissner/heads/work182-vpair)] Merge commit 'refs/users/meissner/heads/work182-vpair' of git+ssh://gcc.gnu.org/git/gcc into me/work

https://gcc.gnu.org/g:d7955856fb123f7b9c3f0c685d8f01dac0e74a4f commit d7955856fb123f7b9c3f0c685d8f01dac0e74a4f Merge: 2f898582819b 2cecf1305e78 Author: Michael Meissner Date: Wed Nov 6 16:25:04 2024 -0500 Merge commit 'refs/users/meissner/heads/work182-vpair' of git+ssh://gcc.gnu.org/git/

[gcc(refs/users/meissner/heads/work182-vpair)] Update ChangeLog.*

https://gcc.gnu.org/g:ee52f595f6c5a29354cd42cf1e8a687d770a03d1 commit ee52f595f6c5a29354cd42cf1e8a687d770a03d1 Author: Michael Meissner Date: Sat Nov 2 01:22:17 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.vpair | 9 + 1 file changed, 9 insertions(+) diff --git a/gcc/Ch

[gcc(refs/users/meissner/heads/work182-vpair)] Vector pair support.

https://gcc.gnu.org/g:804fca12b6b78cb2d98164daaae6beee54ed58fa commit 804fca12b6b78cb2d98164daaae6beee54ed58fa Author: Michael Meissner Date: Sat Nov 2 01:27:19 2024 -0400 Vector pair support. This patch adds a new include file (vector-pair.h) that adds support so that users w

[gcc(refs/users/meissner/heads/work182-vpair)] Revert changes

https://gcc.gnu.org/g:c44c09f23436fdf1105c37e99ea649253c455fa0 commit c44c09f23436fdf1105c37e99ea649253c455fa0 Author: Michael Meissner Date: Sat Nov 2 01:24:11 2024 -0400 Revert changes Diff: --- gcc/config.gcc | 2 +- gcc/config/rs6000/rs6000-c.cc

[gcc(refs/users/meissner/heads/work182-vpair)] Add vector pair swap even and odd.

https://gcc.gnu.org/g:4ce2ca4ed9fee43f9fc7a99168a99d395736244b commit 4ce2ca4ed9fee43f9fc7a99168a99d395736244b Author: Michael Meissner Date: Sat Nov 2 00:11:55 2024 -0400 Add vector pair swap even and odd. This patch adds 2 additional functions: vpair_f32_swap_od

[gcc(refs/users/meissner/heads/work182-vpair)] Update vector-pair documentation.

https://gcc.gnu.org/g:2ba9882c1869c9f3f4b48b1a5f2f07c1d8d3 commit 2ba9882c1869c9f3f4b48b1a5f2f07c1d8d3 Author: Michael Meissner Date: Sat Nov 2 01:16:58 2024 -0400 Update vector-pair documentation. 2024-11-02 Michael Meissner * doc/extend.texi (PowerPC

[gcc(refs/users/meissner/heads/work182-vpair)] Update ChangeLog.*

https://gcc.gnu.org/g:64465b950adb407d5359e8a5dcf5b83b6c99291a commit 64465b950adb407d5359e8a5dcf5b83b6c99291a Author: Michael Meissner Date: Sat Nov 2 00:13:58 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.vpair | 440 1 file

[gcc(refs/users/meissner/heads/work182-vpair)] Vector pair support.

https://gcc.gnu.org/g:baf46a7dda25b576edeed2e7515d7238355957f4 commit baf46a7dda25b576edeed2e7515d7238355957f4 Author: Michael Meissner Date: Fri Nov 1 20:01:55 2024 -0400 Vector pair support. This patch adds a new include file (vector-pair.h) that adds support so that users w

[gcc/meissner/heads/work182-vpair] (26 commits) Merge commit 'refs/users/meissner/heads/work182-vpair' of g

The branch 'meissner/heads/work182-vpair' was updated to point to: d7955856fb12... Merge commit 'refs/users/meissner/heads/work182-vpair' of g It previously pointed to: 2cecf1305e78... Update ChangeLog.* Diff: Summary of changes (added commits): --- d795585

[gcc(refs/users/meissner/heads/work182-vpair)] Add ChangeLog.vpair and update REVISION.

https://gcc.gnu.org/g:1fdd15a60ba10b8c4c9dd892d61306742cc56a76 commit 1fdd15a60ba10b8c4c9dd892d61306742cc56a76 Author: Michael Meissner Date: Tue Oct 22 15:33:05 2024 -0400 Add ChangeLog.vpair and update REVISION. 2024-10-22 Michael Meissner gcc/ * Cha

[gcc(refs/users/meissner/heads/work182-test)] Merge commit 'refs/users/meissner/heads/work182-test' of git+ssh://gcc.gnu.org/git/gcc into me/work1

https://gcc.gnu.org/g:ff9bdf5f8b640db623f176176b234e62da0ba874 commit ff9bdf5f8b640db623f176176b234e62da0ba874 Merge: 23996bd867bf f35900b93819 Author: Michael Meissner Date: Wed Nov 6 16:23:49 2024 -0500 Merge commit 'refs/users/meissner/heads/work182-test' of git+ssh://gcc.gnu.org/git/g

[gcc(refs/users/meissner/heads/work182-test)] Update ChangeLog.*

https://gcc.gnu.org/g:23996bd867bf29dff1a76eee50009dcaa5a5fa50 commit 23996bd867bf29dff1a76eee50009dcaa5a5fa50 Author: Michael Meissner Date: Wed Nov 6 16:17:19 2024 -0500 Update ChangeLog.* Diff: --- gcc/ChangeLog.test | 22 ++ 1 file changed, 22 insertions(+) diff

[gcc(refs/users/meissner/heads/work182-test)] Add debugging for PR 71977-1.c regression.

https://gcc.gnu.org/g:292a657f3027ab3036ad9e7efcafde2b679bec7f commit 292a657f3027ab3036ad9e7efcafde2b679bec7f Author: Michael Meissner Date: Wed Nov 6 16:15:36 2024 -0500 Add debugging for PR 71977-1.c regression. 2024-11-06 Michael Meissner gcc/ * co

[gcc(refs/users/meissner/heads/work182-test)] Add ChangeLog.test and update REVISION.

https://gcc.gnu.org/g:3da6199aadbbc4d77987d973ad571f0c92c138ad commit 3da6199aadbbc4d77987d973ad571f0c92c138ad Author: Michael Meissner Date: Tue Oct 22 15:37:11 2024 -0400 Add ChangeLog.test and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chan

[gcc/meissner/heads/work182-test] (20 commits) Merge commit 'refs/users/meissner/heads/work182-test' of gi

The branch 'meissner/heads/work182-test' was updated to point to: ff9bdf5f8b64... Merge commit 'refs/users/meissner/heads/work182-test' of gi It previously pointed to: f35900b93819... Update ChangeLog.* Diff: Summary of changes (added commits): --- ff9bdf5.

[gcc/meissner/heads/work182-tar] (18 commits) Merge commit 'refs/users/meissner/heads/work182-tar' of git

The branch 'meissner/heads/work182-tar' was updated to point to: a8d2d9edcfbb... Merge commit 'refs/users/meissner/heads/work182-tar' of git It previously pointed to: 153f08510e13... Merge commit 'refs/users/meissner/heads/work182-tar' of git Diff: Summary of changes (added commits): ---

[gcc(refs/users/meissner/heads/work182-sha)] Update ChangeLog.*

https://gcc.gnu.org/g:55728978fc880f1b12007c7de784372025028876 commit 55728978fc880f1b12007c7de784372025028876 Author: Michael Meissner Date: Thu Oct 24 12:26:59 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.sha | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --gi

[gcc(refs/users/meissner/heads/work182-test)] Update ChangeLog.*

https://gcc.gnu.org/g:f35900b938191cb5dafe9eeaed1ed2baa79350ec commit f35900b938191cb5dafe9eeaed1ed2baa79350ec Author: Michael Meissner Date: Wed Nov 6 16:17:19 2024 -0500 Update ChangeLog.* Diff: --- gcc/ChangeLog.test | 22 ++ 1 file changed, 22 insertions(+) diff

[gcc(refs/users/meissner/heads/work182-test)] Add debugging for PR 71977-1.c regression.

https://gcc.gnu.org/g:cd59f64c68541b050ef6ab95637cbb1855d3df94 commit cd59f64c68541b050ef6ab95637cbb1855d3df94 Author: Michael Meissner Date: Wed Nov 6 16:15:36 2024 -0500 Add debugging for PR 71977-1.c regression. 2024-11-06 Michael Meissner gcc/ * co

[gcc(refs/users/meissner/heads/work182-tar)] Add ChangeLog.tar and update REVISION.

https://gcc.gnu.org/g:bf1ef9c1bec80bf4f665d12e3616f98c3d7d2177 commit bf1ef9c1bec80bf4f665d12e3616f98c3d7d2177 Author: Michael Meissner Date: Tue Oct 22 15:34:01 2024 -0400 Add ChangeLog.tar and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chang

[gcc(refs/users/meissner/heads/work182-tar)] Merge commit 'refs/users/meissner/heads/work182-tar' of git+ssh://gcc.gnu.org/git/gcc into me/work18

https://gcc.gnu.org/g:a8d2d9edcfbb70bd8c104e4650112549a6d0ca09 commit a8d2d9edcfbb70bd8c104e4650112549a6d0ca09 Merge: bf1ef9c1bec8 153f08510e13 Author: Michael Meissner Date: Wed Nov 6 16:09:19 2024 -0500 Merge commit 'refs/users/meissner/heads/work182-tar' of git+ssh://gcc.gnu.org/git/gc

[gcc(refs/users/meissner/heads/work182)] Do not allow -mvsx to boost processor to power7.

https://gcc.gnu.org/g:1b9926150dd7e38196cda043c0fc4afc374007b8 commit 1b9926150dd7e38196cda043c0fc4afc374007b8 Author: Michael Meissner Date: Wed Nov 6 15:28:34 2024 -0500 Do not allow -mvsx to boost processor to power7. This patch restructures the code so that -mvsx for example w

[gcc(refs/users/meissner/heads/work182-sha)] Merge commit 'refs/users/meissner/heads/work182-sha' of git+ssh://gcc.gnu.org/git/gcc into me/work18

https://gcc.gnu.org/g:cc318ac99f83e04507baeda7e057f54374d08abc commit cc318ac99f83e04507baeda7e057f54374d08abc Merge: 8800ae704d6e c5a9703abe8d Author: Michael Meissner Date: Wed Nov 6 16:07:21 2024 -0500 Merge commit 'refs/users/meissner/heads/work182-sha' of git+ssh://gcc.gnu.org/git/gc

[gcc(refs/users/meissner/heads/work182-sha)] Update ChangeLog.*

https://gcc.gnu.org/g:344b41a356d2fb212c24b4621793ce87628c9f5a commit 344b41a356d2fb212c24b4621793ce87628c9f5a Author: Michael Meissner Date: Thu Oct 24 12:27:43 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.sha | 24 1 file changed, 12 insertions(+), 12

[gcc(refs/users/meissner/heads/work182-sha)] Update ChangeLog.*

https://gcc.gnu.org/g:8800ae704d6e6482fd92b7c9d40c3d6a1fa85544 commit 8800ae704d6e6482fd92b7c9d40c3d6a1fa85544 Author: Michael Meissner Date: Thu Oct 24 14:08:35 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.sha | 12 1 file changed, 12 insertions(+) diff --git a/gc

[gcc(refs/users/meissner/heads/work182-sha)] Add p-future target-supports.exp

https://gcc.gnu.org/g:168741b8e7a230560c4cf5702e42e17ccd7043ba commit 168741b8e7a230560c4cf5702e42e17ccd7043ba Author: Michael Meissner Date: Thu Oct 24 14:07:22 2024 -0400 Add p-future target-supports.exp 2024-10-24 Michael Meissner gcc/testsuite/ * l

[gcc(refs/users/meissner/heads/work182-sha)] Update ChangeLog.*

https://gcc.gnu.org/g:b1cf258d66b448da4378616ecf57df83c948bbb7 commit b1cf258d66b448da4378616ecf57df83c948bbb7 Author: Michael Meissner Date: Thu Oct 24 12:26:28 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.sha | 143 +++--- 1 file

[gcc(refs/users/meissner/heads/work182-sha)] Update ChangeLog.*

https://gcc.gnu.org/g:33901274eea3a07aeac48ec0bc4e87f66f19d50e commit 33901274eea3a07aeac48ec0bc4e87f66f19d50e Author: Michael Meissner Date: Thu Oct 24 12:30:57 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.sha | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/

[gcc(refs/users/meissner/heads/work182-sha)] Revert changes

https://gcc.gnu.org/g:5c03d03351a2026159c81e29f350a0f77567bd2f commit 5c03d03351a2026159c81e29f350a0f77567bd2f Author: Michael Meissner Date: Thu Oct 24 12:15:20 2024 -0400 Revert changes Diff: --- gcc/config/rs6000/fusion.md| 660 + gcc/config

[gcc(refs/users/meissner/heads/work182-sha)] Add potential p-future XVRLD and XVRLDI instructions.

https://gcc.gnu.org/g:442f717c7cf517cbc4475ac98064c9be0fe4b222 commit 442f717c7cf517cbc4475ac98064c9be0fe4b222 Author: Michael Meissner Date: Thu Oct 24 12:23:17 2024 -0400 Add potential p-future XVRLD and XVRLDI instructions. 2024-10-24 Michael Meissner gcc/

[gcc(refs/users/meissner/heads/work182-sha)] Revert changes

https://gcc.gnu.org/g:be9aeedf712fb457ca2603622a6e2ea4c5b6fbb2 commit be9aeedf712fb457ca2603622a6e2ea4c5b6fbb2 Author: Michael Meissner Date: Thu Oct 24 12:15:54 2024 -0400 Revert changes Diff: --- gcc/testsuite/gcc.target/powerpc/p10-vector-fused-1.c | 0 gcc/testsuite/gcc.target/powerp

[gcc(refs/users/meissner/heads/work182-sha)] PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations

https://gcc.gnu.org/g:b9352efddd99af7512450ea57cbf3581cdabeb4a commit b9352efddd99af7512450ea57cbf3581cdabeb4a Author: Michael Meissner Date: Thu Oct 24 12:21:09 2024 -0400 PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations The multibuff.c benchmark attache

[gcc(refs/users/meissner/heads/work182-sha)] Revert changes

https://gcc.gnu.org/g:89f86a5ddfa57a721f7ca5776e554b91332b5a0b commit 89f86a5ddfa57a721f7ca5776e554b91332b5a0b Author: Michael Meissner Date: Thu Oct 24 12:11:15 2024 -0400 Revert changes Diff: --- gcc/config/rs6000/altivec.md | 35 +- gcc/config/rs6000/predicates.

[gcc(refs/users/meissner/heads/work182-sha)] Update ChangeLog.*

https://gcc.gnu.org/g:f3cae2735d9e6e1a5470b93ad2e0d3e7 commit f3cae2735d9e6e1a5470b93ad2e0d3e7 Author: Michael Meissner Date: Wed Oct 23 13:31:23 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.sha | 26 ++ 1 file changed, 26 insertions(+) d

[gcc(refs/users/meissner/heads/work182-sha)] Add missing test.

https://gcc.gnu.org/g:ad14425132290755acf69e2f7673abb0518bb764 commit ad14425132290755acf69e2f7673abb0518bb764 Author: Michael Meissner Date: Wed Oct 23 13:30:07 2024 -0400 Add missing test. 2024-10-16 Michael Meissner gcc/testsuite/ * gcc.target/power

[gcc(refs/users/meissner/heads/work182-sha)] Add potential p-future XVRLD and XVRLDI instructions.

https://gcc.gnu.org/g:de89bc11125fc705cda16d419cea11d45c1fb3ec commit de89bc11125fc705cda16d419cea11d45c1fb3ec Author: Michael Meissner Date: Wed Oct 23 13:26:49 2024 -0400 Add potential p-future XVRLD and XVRLDI instructions. 2024-10-16 Michael Meissner gcc/

[gcc/meissner/heads/work182-sha] (34 commits) Merge commit 'refs/users/meissner/heads/work182-sha' of git

The branch 'meissner/heads/work182-sha' was updated to point to: cc318ac99f83... Merge commit 'refs/users/meissner/heads/work182-sha' of git It previously pointed to: c5a9703abe8d... Update ChangeLog.* Diff: Summary of changes (added commits): --- cc318ac..

[gcc(refs/users/meissner/heads/work182-sha)] Update ChangeLog.*

https://gcc.gnu.org/g:95e4e093c98f18dd4cdbb26a0a6d2f4929e5b2a9 commit 95e4e093c98f18dd4cdbb26a0a6d2f4929e5b2a9 Author: Michael Meissner Date: Tue Oct 22 19:37:19 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.sha | 35 +++ 1 file changed, 35 inserti

[gcc(refs/users/meissner/heads/work182-sha)] Initial support for adding xxeval fusion support.

https://gcc.gnu.org/g:65a8dfdbe04ed3db254f267ffccf9353e4352a0a commit 65a8dfdbe04ed3db254f267ffccf9353e4352a0a Author: Michael Meissner Date: Tue Oct 22 19:35:27 2024 -0400 Initial support for adding xxeval fusion support. 2024-10-16 Michael Meissner gcc/

[gcc(refs/users/meissner/heads/work182-sha)] Add ChangeLog.sha and update REVISION.

https://gcc.gnu.org/g:72ecf7cbf38ecba7fb65ab4a51ebaabaaadf197b commit 72ecf7cbf38ecba7fb65ab4a51ebaabaaadf197b Author: Michael Meissner Date: Tue Oct 22 15:36:24 2024 -0400 Add ChangeLog.sha and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chang

[gcc(refs/users/meissner/heads/work182-libs)] Merge commit 'refs/users/meissner/heads/work182-libs' of git+ssh://gcc.gnu.org/git/gcc into me/work1

https://gcc.gnu.org/g:1c84b8027e7ef00d0e26ba0656ad6239b419c1d9 commit 1c84b8027e7ef00d0e26ba0656ad6239b419c1d9 Merge: 49a3ad314ac9 1fa6af582a1a Author: Michael Meissner Date: Wed Nov 6 16:05:58 2024 -0500 Merge commit 'refs/users/meissner/heads/work182-libs' of git+ssh://gcc.gnu.org/git/g

[gcc(refs/users/meissner/heads/work182-libs)] Add ChangeLog.libs and update REVISION.

https://gcc.gnu.org/g:49a3ad314ac91e9e7c7428b72351431816d9bc96 commit 49a3ad314ac91e9e7c7428b72351431816d9bc96 Author: Michael Meissner Date: Tue Oct 22 15:35:38 2024 -0400 Add ChangeLog.libs and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chan

[gcc/meissner/heads/work182-libs] (18 commits) Merge commit 'refs/users/meissner/heads/work182-libs' of gi

The branch 'meissner/heads/work182-libs' was updated to point to: 1c84b8027e7e... Merge commit 'refs/users/meissner/heads/work182-libs' of gi It previously pointed to: 1fa6af582a1a... Merge commit 'refs/users/meissner/heads/work182-libs' of gi Diff: Summary of changes (added commits): --

[gcc(refs/users/meissner/heads/work182-dmf)] Merge commit 'refs/users/meissner/heads/work182-dmf' of git+ssh://gcc.gnu.org/git/gcc into me/work18

https://gcc.gnu.org/g:e2b2ecbb0d9b5e2e2af5b9be297db997a32ef35d commit e2b2ecbb0d9b5e2e2af5b9be297db997a32ef35d Merge: 03a0a55f93bd 663944a2b488 Author: Michael Meissner Date: Wed Nov 6 16:04:23 2024 -0500 Merge commit 'refs/users/meissner/heads/work182-dmf' of git+ssh://gcc.gnu.org/git/gc

[gcc(refs/users/meissner/heads/work182-dmf)] Revert changes

https://gcc.gnu.org/g:03a0a55f93bd9e6f3f1769a7c82ced60d6a31cca commit 03a0a55f93bd9e6f3f1769a7c82ced60d6a31cca Author: Michael Meissner Date: Tue Oct 22 18:01:36 2024 -0400 Revert changes Diff: --- gcc/ChangeLog.dmf | 45 +- gcc/config/rs6000/alti

[gcc(refs/users/meissner/heads/work182-dmf)] Update ChangeLog.*

https://gcc.gnu.org/g:72dd4a7afce5476959c49a9b41d5c3a9f167299d commit 72dd4a7afce5476959c49a9b41d5c3a9f167299d Author: Michael Meissner Date: Tue Oct 22 16:29:33 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.dmf | 450 ++ 1 file

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2677-Add xvrlw support.

https://gcc.gnu.org/g:cac1d9d66ab682d06523c462e2cb67d50e6958c9 commit cac1d9d66ab682d06523c462e2cb67d50e6958c9 Author: Michael Meissner Date: Tue Oct 22 16:25:54 2024 -0400 RFC2677-Add xvrlw support. 2024-10-22 Michael Meissner gcc/ * config/rs6000/alt

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2686-Add paddis support.

https://gcc.gnu.org/g:360c0471348a4f8b8a8b866c704823567d62bb58 commit 360c0471348a4f8b8a8b866c704823567d62bb58 Author: Michael Meissner Date: Tue Oct 22 16:24:17 2024 -0400 RFC2686-Add paddis support. 2024-10-22 Michael Meissner gcc/ * config/rs6000/co

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2653-PowerPC: Add support for 1, 024 bit DMR registers.

https://gcc.gnu.org/g:734d503889ad5c84f355d26513500025e420cc68 commit 734d503889ad5c84f355d26513500025e420cc68 Author: Michael Meissner Date: Tue Oct 22 16:20:44 2024 -0400 RFC2653-PowerPC: Add support for 1,024 bit DMR registers. This patch is a prelimianry patch to add the full

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2653-Add dense math test for new instruction names.

https://gcc.gnu.org/g:24421eb1af4e492cbe23ea1e77d52fe81d641e93 commit 24421eb1af4e492cbe23ea1e77d52fe81d641e93 Author: Michael Meissner Date: Tue Oct 22 16:19:55 2024 -0400 RFC2653-Add dense math test for new instruction names. 2024-10-22 Michael Meissner gcc/testsuit

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2655-Add saturating subtract built-ins.

https://gcc.gnu.org/g:cbd2455ef7c92a64b242c6fa3d4a976e23b80e57 commit cbd2455ef7c92a64b242c6fa3d4a976e23b80e57 Author: Michael Meissner Date: Tue Oct 22 16:23:20 2024 -0400 RFC2655-Add saturating subtract built-ins. This patch adds support for a saturating subtract built-in functi

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2656-Support load/store vector with right length.

https://gcc.gnu.org/g:d4ca240457ded511bf36e6a9a0cf1a6015c5f7aa commit d4ca240457ded511bf36e6a9a0cf1a6015c5f7aa Author: Michael Meissner Date: Tue Oct 22 16:22:22 2024 -0400 RFC2656-Support load/store vector with right length. This patch adds support for new instructions that may b

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2653-Add support for dense math registers.

https://gcc.gnu.org/g:f4a8690b7e069396bb98fbd689ddb098e6e1e0b8 commit f4a8690b7e069396bb98fbd689ddb098e6e1e0b8 Author: Michael Meissner Date: Tue Oct 22 16:17:41 2024 -0400 RFC2653-Add support for dense math registers. The MMA subsystem added the notion of accumulator registers as

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2653-PowerPC: Switch to dense math names for all MMA operations.

https://gcc.gnu.org/g:d340b8928626c8847c0e5f3a84cf5d0be3f995d1 commit d340b8928626c8847c0e5f3a84cf5d0be3f995d1 Author: Michael Meissner Date: Tue Oct 22 16:18:43 2024 -0400 RFC2653-PowerPC: Switch to dense math names for all MMA operations. This patch changes the assembler instruc

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2653-Add wD constraint.

https://gcc.gnu.org/g:d8e9a7370ba52ccd5fb31e264e3a918bcdc9f121 commit d8e9a7370ba52ccd5fb31e264e3a918bcdc9f121 Author: Michael Meissner Date: Tue Oct 22 16:16:43 2024 -0400 RFC2653-Add wD constraint. This patch adds a new constraint ('wD') that matches the accumulator registers

[gcc(refs/users/meissner/heads/work182-dmf)] Use vector pair load/store for memcpy with -mcpu=future

https://gcc.gnu.org/g:52b2990b5a242158040a5f19add5611438449487 commit 52b2990b5a242158040a5f19add5611438449487 Author: Michael Meissner Date: Tue Oct 22 16:15:45 2024 -0400 Use vector pair load/store for memcpy with -mcpu=future In the development for the power10 processor, GCC di

[gcc(refs/users/meissner/heads/work182-dmf)] Add ChangeLog.dmf and update REVISION.

https://gcc.gnu.org/g:787e71a76ad677a015e81f8c1c4f4ac3c3675dc0 commit 787e71a76ad677a015e81f8c1c4f4ac3c3675dc0 Author: Michael Meissner Date: Tue Oct 22 15:32:17 2024 -0400 Add ChangeLog.dmf and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chang

[gcc/meissner/heads/work182-dmf] (30 commits) Merge commit 'refs/users/meissner/heads/work182-dmf' of git

The branch 'meissner/heads/work182-dmf' was updated to point to: e2b2ecbb0d9b... Merge commit 'refs/users/meissner/heads/work182-dmf' of git It previously pointed to: 663944a2b488... Revert changes Diff: Summary of changes (added commits): --- e2b2ecb... Me

[gcc(refs/users/meissner/heads/work182-bugs)] PR 99293: Optimize splat of a V2DF/V2DI extract with constant element

https://gcc.gnu.org/g:8cb1bce5427a0e3999f5bb03621a20dbadb23f69 commit 8cb1bce5427a0e3999f5bb03621a20dbadb23f69 Author: Michael Meissner Date: Tue Oct 22 16:31:04 2024 -0400 PR 99293: Optimize splat of a V2DF/V2DI extract with constant element We had optimizations for splat of a ve

[gcc(refs/users/meissner/heads/work182-bugs)] Update ChangeLog.*

https://gcc.gnu.org/g:d261945e478258a73d10f5ba2af999547ec7 commit d261945e478258a73d10f5ba2af999547ec7 Author: Michael Meissner Date: Tue Oct 22 16:32:40 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.bugs | 51 +++ 1 file ch

[gcc(refs/users/meissner/heads/work182-bugs)] Merge commit 'refs/users/meissner/heads/work182-bugs' of git+ssh://gcc.gnu.org/git/gcc into me/work1

https://gcc.gnu.org/g:28ac3fbb5f0d2e9a72bf3666d4523b2da53852ac commit 28ac3fbb5f0d2e9a72bf3666d4523b2da53852ac Merge: d261945e4782 2db27caa81c2 Author: Michael Meissner Date: Wed Nov 6 16:01:53 2024 -0500 Merge commit 'refs/users/meissner/heads/work182-bugs' of git+ssh://gcc.gnu.org/git/g

[gcc/meissner/heads/work182-bugs] (20 commits) Merge commit 'refs/users/meissner/heads/work182-bugs' of gi

The branch 'meissner/heads/work182-bugs' was updated to point to: 28ac3fbb5f0d... Merge commit 'refs/users/meissner/heads/work182-bugs' of gi It previously pointed to: 2db27caa81c2... Update ChangeLog.* Diff: Summary of changes (added commits): --- 28ac3fb.

[gcc(refs/users/meissner/heads/work182-bugs)] Add ChangeLog.bugs and update REVISION.

https://gcc.gnu.org/g:d350c1191a696b11a8eb30fc78c36f0bd8191adc commit d350c1191a696b11a8eb30fc78c36f0bd8191adc Author: Michael Meissner Date: Tue Oct 22 15:34:50 2024 -0400 Add ChangeLog.bugs and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chan

[gcc(refs/users/meissner/heads/work182)] Change TARGET_FPRND to TARGET_POWER5X

https://gcc.gnu.org/g:bc1106eb6337f561461161bf65d8c66a80190285 commit bc1106eb6337f561461161bf65d8c66a80190285 Author: Michael Meissner Date: Wed Nov 6 15:34:41 2024 -0500 Change TARGET_FPRND to TARGET_POWER5X As part of the architecture flags patches, this patch changes the use o

[gcc r15-4990] Darwin: Fix a narrowing warning.

https://gcc.gnu.org/g:a91d5c27cd2173a40cc170ee09330dd1e13403a5 commit r15-4990-ga91d5c27cd2173a40cc170ee09330dd1e13403a5 Author: Iain Sandoe Date: Wed Nov 6 20:46:47 2024 + Darwin: Fix a narrowing warning. cdtor_record needs to have an unsigned entry for the position in order

[gcc(refs/users/meissner/heads/work182)] Update ChangeLog.*

https://gcc.gnu.org/g:892e05e5f778ff7017741a0c2eed5133e7527a65 commit 892e05e5f778ff7017741a0c2eed5133e7527a65 Author: Michael Meissner Date: Wed Nov 6 15:53:49 2024 -0500 Update ChangeLog.* Diff: --- gcc/ChangeLog.meissner | 416 + 1 file

[gcc(refs/users/meissner/heads/work182)] Add support for -mcpu=future

https://gcc.gnu.org/g:11869df9a8300867a8e46a7de199cb703bc2410c commit 11869df9a8300867a8e46a7de199cb703bc2410c Author: Michael Meissner Date: Wed Nov 6 15:48:43 2024 -0500 Add support for -mcpu=future This patch adds the support that can be used in developing GCC support for f

[gcc(refs/users/meissner/heads/work182)] Add -mcpu=future tuning support.

https://gcc.gnu.org/g:ab781c69a65339bb2f5317a666fe386c532215b5 commit ab781c69a65339bb2f5317a666fe386c532215b5 Author: Michael Meissner Date: Wed Nov 6 15:50:25 2024 -0500 Add -mcpu=future tuning support. This patch makes -mtune=future use the same tuning decision as -mtune=power

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