https://gcc.gnu.org/g:1e2ae65a7f01fa3dcdbfd1bb5bc87b860172336d
commit r15-4995-g1e2ae65a7f01fa3dcdbfd1bb5bc87b860172336d
Author: xuli <xu...@eswincomputing.com>
Date: Mon Nov 4 10:00:45 2024 +0000
RISC-V: Add testcases for signed imm SAT_ADD form1
This patch adds testcase for form1, as shown below:
T __attribute__((noinline)) \
sat_s_add_imm_##T##_fmt_1##_##INDEX (T x) \
{ \
T sum = (UT)x + (UT)IMM; \
return (x ^ IMM) < 0 \
? sum \
: (sum ^ x) >= 0 \
? sum \
: x < 0 ? MIN : MAX; \
}
Passed the rv64gcv regression test.
Signed-off-by: Li Xu <xu...@eswincomputing.com>
gcc/testsuite/ChangeLog:
* gcc.target/riscv/sat_arith.h: Support signed
imm SAT_ADD form1.
* gcc.target/riscv/sat_s_add_imm-1-1.c: New test.
* gcc.target/riscv/sat_s_add_imm-1.c: New test.
* gcc.target/riscv/sat_s_add_imm-2-1.c: New test.
* gcc.target/riscv/sat_s_add_imm-2.c: New test.
* gcc.target/riscv/sat_s_add_imm-3-1.c: New test.
* gcc.target/riscv/sat_s_add_imm-3.c: New test.
* gcc.target/riscv/sat_s_add_imm-4.c: New test.
* gcc.target/riscv/sat_s_add_imm-run-1.c: New test.
* gcc.target/riscv/sat_s_add_imm-run-2.c: New test.
* gcc.target/riscv/sat_s_add_imm-run-3.c: New test.
* gcc.target/riscv/sat_s_add_imm-run-4.c: New test.
Diff:
---
gcc/testsuite/gcc.target/riscv/sat_arith.h | 15 ++++++++
gcc/testsuite/gcc.target/riscv/sat_s_add_imm-1-1.c | 10 ++++++
gcc/testsuite/gcc.target/riscv/sat_s_add_imm-1.c | 30 ++++++++++++++++
gcc/testsuite/gcc.target/riscv/sat_s_add_imm-2-1.c | 10 ++++++
gcc/testsuite/gcc.target/riscv/sat_s_add_imm-2.c | 33 +++++++++++++++++
gcc/testsuite/gcc.target/riscv/sat_s_add_imm-3-1.c | 10 ++++++
gcc/testsuite/gcc.target/riscv/sat_s_add_imm-3.c | 31 ++++++++++++++++
gcc/testsuite/gcc.target/riscv/sat_s_add_imm-4.c | 29 +++++++++++++++
.../gcc.target/riscv/sat_s_add_imm-run-1.c | 42 ++++++++++++++++++++++
.../gcc.target/riscv/sat_s_add_imm-run-2.c | 42 ++++++++++++++++++++++
.../gcc.target/riscv/sat_s_add_imm-run-3.c | 42 ++++++++++++++++++++++
.../gcc.target/riscv/sat_s_add_imm-run-4.c | 42 ++++++++++++++++++++++
12 files changed, 336 insertions(+)
diff --git a/gcc/testsuite/gcc.target/riscv/sat_arith.h
b/gcc/testsuite/gcc.target/riscv/sat_arith.h
index 2cbd1f18c8d2..b334e7f630c5 100644
--- a/gcc/testsuite/gcc.target/riscv/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat_arith.h
@@ -176,6 +176,21 @@ sat_s_add_##T##_fmt_4 (T x, T y) \
#define RUN_SAT_S_ADD_FMT_4(T, x, y) sat_s_add_##T##_fmt_4(x, y)
#define RUN_SAT_S_ADD_FMT_4_WRAP(T, x, y) RUN_SAT_S_ADD_FMT_4(T, x, y)
+#define DEF_SAT_S_ADD_IMM_FMT_1(INDEX, T, UT, IMM, MIN, MAX) \
+T __attribute__((noinline)) \
+sat_s_add_imm_##T##_fmt_1##_##INDEX (T x) \
+{ \
+ T sum = (UT)x + (UT)IMM; \
+ return (x ^ IMM) < 0 \
+ ? sum \
+ : (sum ^ x) >= 0 \
+ ? sum \
+ : x < 0 ? MIN : MAX; \
+}
+
+#define RUN_SAT_S_ADD_IMM_FMT_1(INDEX, T, x, expect) \
+ if (sat_s_add_imm##_##T##_fmt_1##_##INDEX(x) != expect) __builtin_abort ()
+
/******************************************************************************/
/* Saturation Sub (Unsigned and Signed)
*/
/******************************************************************************/
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-1-1.c
b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-1-1.c
new file mode 100644
index 000000000000..f20f9b0c477c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-1-1.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-flto" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_S_ADD_IMM_FMT_1(0, int8_t, uint8_t, -129, INT8_MIN, INT8_MAX)
+DEF_SAT_S_ADD_IMM_FMT_1(1, int8_t, uint8_t, 128, INT8_MIN, INT8_MAX)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-1.c
b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-1.c
new file mode 100644
index 000000000000..6746caf02f6b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-1.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-flto" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details
-fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_add_imm_int8_t_fmt_1_0:
+** addi\s+[atx][0-9]+,\s*a0,\s*9
+** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
+** srli\s+[atx][0-9]+,\s*a0,\s*7
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** srai\s+a0,\s*a0,\s*63
+** xori\s+[atx][0-9]+,\s*a0,\s*127
+** neg\s+a0,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*a0,\s*[atx][0-9]+
+** slliw\s+a0,\s*a0,\s*24
+** sraiw\s+a0,\s*a0,\s*24
+** ret
+*/
+DEF_SAT_S_ADD_IMM_FMT_1(0, int8_t, uint8_t, 9, INT8_MIN, INT8_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-2-1.c
b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-2-1.c
new file mode 100644
index 000000000000..3d31d0142f2d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-2-1.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-flto" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_S_ADD_IMM_FMT_1(0, int16_t, uint16_t, -32769, INT16_MIN, INT16_MAX)
+DEF_SAT_S_ADD_IMM_FMT_1(1, int16_t, uint16_t, 32768, INT16_MIN, INT16_MAX)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-2.c
b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-2.c
new file mode 100644
index 000000000000..eb3127b85407
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-2.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-flto" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details
-fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_add_imm_int16_t_fmt_1_0:
+** addi\s+[atx][0-9]+,\s*a0,\s*-7
+** xori\s+[atx][0-9]+,\s*a0,\s*-7
+** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** srai\s+a0,\s*a0,\s*63
+** li\s+[atx][0-9]+,\s*32768
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
+** neg\s+a0,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*a0,\s*[atx][0-9]+
+** slliw\s+a0,\s*a0,\s*16
+** sraiw\s+a0,\s*a0,\s*16
+** ret
+*/
+DEF_SAT_S_ADD_IMM_FMT_1(0, int16_t, uint16_t, -7, INT16_MIN, INT16_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-3-1.c
b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-3-1.c
new file mode 100644
index 000000000000..1735a8b54678
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-3-1.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-flto" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_S_ADD_IMM_FMT_1(0, int32_t, uint32_t, -2147483649, INT32_MIN,
INT32_MAX)
+DEF_SAT_S_ADD_IMM_FMT_1(1, int32_t, uint32_t, 2147483648, INT32_MIN, INT32_MAX)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-3.c
b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-3.c
new file mode 100644
index 000000000000..83ed30128e14
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-3.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-flto" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details
-fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_add_imm_int32_t_fmt_1_0:
+** addi\s+[atx][0-9]+,\s*a0,\s*10
+** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
+** srli\s+[atx][0-9]+,\s*a0,\s*31
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** srai\s+a0,\s*a0,\s*63
+** li\s+[atx][0-9]+,\s*-2147483648
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
+** neg\s+a0,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,a0,\s*[atx][0-9]+
+** sext.w\s+a0,\s*a0
+** ret
+*/
+DEF_SAT_S_ADD_IMM_FMT_1(0, int32_t, uint32_t, 10, INT32_MIN, INT32_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-4.c
b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-4.c
new file mode 100644
index 000000000000..df25cc68a053
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-4.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-flto" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details
-fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_add_imm_int64_t_fmt_1_0:
+** addi\s+[atx][0-9]+,\s*a0,\s*10
+** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** srli\s+[atx][0-9]+,\s*a0,\s*63
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** srai\s+[atx][0-9]+,\s*a0,\s*63
+** li\s+[atx][0-9]+,\s*-1
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** neg\s+[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*a0,\s*[atx][0-9]+
+** ret
+*/
+DEF_SAT_S_ADD_IMM_FMT_1(0, int64_t, uint64_t, 10, INT64_MIN, INT64_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-run-1.c
b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-run-1.c
new file mode 100644
index 000000000000..c71b71754cf0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-run-1.c
@@ -0,0 +1,42 @@
+/* { dg-do run } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_S_ADD_IMM_FMT_1(0, int8_t, uint8_t, -128, INT8_MIN, INT8_MAX)
+DEF_SAT_S_ADD_IMM_FMT_1(1, int8_t, uint8_t, 127, INT8_MIN, INT8_MAX)
+DEF_SAT_S_ADD_IMM_FMT_1(2, int8_t, uint8_t, 6, INT8_MIN, INT8_MAX)
+DEF_SAT_S_ADD_IMM_FMT_1(3, int8_t, uint8_t, -6, INT8_MIN, INT8_MAX)
+
+#define T int8_t
+#define RUN(INDEX,T, x, expect) RUN_SAT_S_ADD_IMM_FMT_1(INDEX, T, x, expect)
+
+T d[][2] = {
+ /* arg_0, expect */
+ { -1, -128, },
+ { 2, -126, },
+ { 1, 127, },
+ { -10, 117, },
+ { 122, 127, },
+ { -10, -4, },
+ { -128, -128, },
+ { 127, 121, },
+};
+
+int
+main ()
+{
+ RUN (0, T, d[0][0], d[0][1]);
+ RUN (0, T, d[1][0], d[1][1]);
+
+ RUN (1, T, d[2][0], d[2][1]);
+ RUN (1, T, d[3][0], d[3][1]);
+
+ RUN (2, T, d[4][0], d[4][1]);
+ RUN (2, T, d[5][0], d[5][1]);
+
+ RUN (3, T, d[6][0], d[6][1]);
+ RUN (3, T, d[7][0], d[7][1]);
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-run-2.c
b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-run-2.c
new file mode 100644
index 000000000000..187a098de332
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-run-2.c
@@ -0,0 +1,42 @@
+/* { dg-do run } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_S_ADD_IMM_FMT_1(0, int16_t, uint16_t, -32768, INT16_MIN, INT16_MAX)
+DEF_SAT_S_ADD_IMM_FMT_1(1, int16_t, uint16_t, 32767, INT16_MIN, INT16_MAX)
+DEF_SAT_S_ADD_IMM_FMT_1(2, int16_t, uint16_t, 100, INT16_MIN, INT16_MAX)
+DEF_SAT_S_ADD_IMM_FMT_1(3, int16_t, uint16_t, -100, INT16_MIN, INT16_MAX)
+
+#define T int16_t
+#define RUN(INDEX,T, x, expect) RUN_SAT_S_ADD_IMM_FMT_1(INDEX, T, x, expect)
+
+T d[][2] = {
+ /* arg_0, expect */
+ { -1, -32768, },
+ { 2, -32766, },
+ { 1, 32767, },
+ { -10, 32757, },
+ { 32669, 32767, },
+ { -32768, -32668, },
+ { -32768, -32768, },
+ { 0, -100, },
+};
+
+int
+main ()
+{
+ RUN (0, T, d[0][0], d[0][1]);
+ RUN (0, T, d[1][0], d[1][1]);
+
+ RUN (1, T, d[2][0], d[2][1]);
+ RUN (1, T, d[3][0], d[3][1]);
+
+ RUN (2, T, d[4][0], d[4][1]);
+ RUN (2, T, d[5][0], d[5][1]);
+
+ RUN (3, T, d[6][0], d[6][1]);
+ RUN (3, T, d[7][0], d[7][1]);
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-run-3.c
b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-run-3.c
new file mode 100644
index 000000000000..899fda896651
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-run-3.c
@@ -0,0 +1,42 @@
+/* { dg-do run } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_S_ADD_IMM_FMT_1(0, int32_t, uint32_t, -2147483648, INT32_MIN,
INT32_MAX)
+DEF_SAT_S_ADD_IMM_FMT_1(1, int32_t, uint32_t, 2147483647, INT32_MIN, INT32_MAX)
+DEF_SAT_S_ADD_IMM_FMT_1(2, int32_t, uint32_t, 100, INT32_MIN, INT32_MAX)
+DEF_SAT_S_ADD_IMM_FMT_1(3, int32_t, uint32_t, -100, INT32_MIN, INT32_MAX)
+
+#define T int32_t
+#define RUN(INDEX,T, x, expect) RUN_SAT_S_ADD_IMM_FMT_1(INDEX, T, x, expect)
+
+T d[][2] = {
+ /* arg_0, expect */
+ { -1, -2147483648, },
+ { 2, -2147483646, },
+ { 1, 2147483647, },
+ { -10, 2147483637, },
+ { 300, 400, },
+ { -300, -200, },
+ { 100, 0, },
+ { 0, -100, },
+};
+
+int
+main ()
+{
+ RUN (0, T, d[0][0], d[0][1]);
+ RUN (0, T, d[1][0], d[1][1]);
+
+ RUN (1, T, d[2][0], d[2][1]);
+ RUN (1, T, d[3][0], d[3][1]);
+
+ RUN (2, T, d[4][0], d[4][1]);
+ RUN (2, T, d[5][0], d[5][1]);
+
+ RUN (3, T, d[6][0], d[6][1]);
+ RUN (3, T, d[7][0], d[7][1]);
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-run-4.c
b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-run-4.c
new file mode 100644
index 000000000000..3dc4f72e6078
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_add_imm-run-4.c
@@ -0,0 +1,42 @@
+/* { dg-do run } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_S_ADD_IMM_FMT_1(0, int64_t, uint64_t, (-9223372036854775807ll - 1),
INT64_MIN, INT64_MAX)
+DEF_SAT_S_ADD_IMM_FMT_1(1, int64_t, uint64_t, 9223372036854775807ll,
INT64_MIN, INT64_MAX)
+DEF_SAT_S_ADD_IMM_FMT_1(2, int64_t, uint64_t, 100, INT64_MIN, INT64_MAX)
+DEF_SAT_S_ADD_IMM_FMT_1(3, int64_t, uint64_t, -100, INT64_MIN, INT64_MAX)
+
+#define T int64_t
+#define RUN(INDEX,T, x, expect) RUN_SAT_S_ADD_IMM_FMT_1(INDEX, T, x, expect)
+
+T d[][2] = {
+ /* arg_0, expect */
+ { -1, (-9223372036854775807ll - 1), },
+ { 2, -9223372036854775806ll, },
+ { 1, 9223372036854775807ll, },
+ { -7, 9223372036854775800ll, },
+ { 0, 100, },
+ { -1, 99, },
+ { 0, -100, },
+ { 100, 0, },
+};
+
+int
+main ()
+{
+ RUN (0, T, d[0][0], d[0][1]);
+ RUN (0, T, d[1][0], d[1][1]);
+
+ RUN (1, T, d[2][0], d[2][1]);
+ RUN (1, T, d[3][0], d[3][1]);
+
+ RUN (2, T, d[4][0], d[4][1]);
+ RUN (2, T, d[5][0], d[5][1]);
+
+ RUN (3, T, d[6][0], d[6][1]);
+ RUN (3, T, d[7][0], d[7][1]);
+
+ return 0;
+}
