Hi,
This series started from my work on the hardware state readout[1], and
was suggested by Dmitry[2].
This series deal with the fact that drm_private_obj (and thus bridges)
are not initialized using the same pattern than any other object. This
series solves that inconsistency by aligning it to w
In A6x family (which is a pretty big one), there are separate
adreno_func definitions for each sub-generations. To streamline the
identification of the correct struct for a gpu, move it to the
catalogue and move the gpu_init routine to struct adreno_gpu_funcs.
Signed-off-by: Akhil P Oommen
---
d
From: Leon Romanovsky
Currently the P2PDMA code requires a pgmap and a struct page to
function. The was serving three important purposes:
- DMA API compatibility, where scatterlist required a struct page as
input
- Life cycle management, the percpu_ref is used to prevent UAF during
devi
On Wed, 15 Oct 2025 17:30:12 +0200
Loïc Molinari wrote:
> Don't declare "super_pages" on builds with CONFIG_TRANSPARENT_HUGEPAGE
> disabled to prevent build error:
>
> ERROR: modpost: "super_pages" [drivers/gpu/drm/v3d/v3d.ko] undefined!
I believe this is a bug introduced by the previous commit
Add support for EFI_EDID_DISCOVERED_PROTOCOL and EFI_EDID_ACTIVE_PROTOCOL
as defined in UEFI 2.8, sec 12.9. Define GUIDs and data structures in the
rsp header files.
In the GOP setup function, read the EDID of the primary GOP device. First
try EFI_EDID_ACTIVE_PROTOCOL, which supports user-specifie
Connect the helpers to allow save and restore of VRAM migration data in
stop_copy / resume device state.
Signed-off-by: Michał Winiarski
---
drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 13 +
.../gpu/drm/xe/xe_gt_sriov_pf_control_types.h | 1 +
drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c
Stop open coding pending job list in drivers. Add pending job list
iterator which safely walks DRM scheduler list either locklessly
asserting DRM scheduler is stopped or takes pending job list lock.
v2:
- Fix checkpatch (CI)
Signed-off-by: Matthew Brost
---
include/drm/gpu_scheduler.h | 64 +++
On Sat, Oct 4, 2025 at 3:54 AM John Hubbard wrote:
>
> Very happy! Far more so than I expected. Being able to *not* fuss around
> with minor formatting details (while editing, rebasing, and reviewing)
> has been absolutely transformative.
Thanks :)
> For example, on today's linux.git, I just now
Set the correct DMA mask. Without this DMA will fail on some setups.
Signed-off-by: Alistair Popple
---
Changes for v5:
- Update SAFETY comment for dma_set_mask_and_coherent()
- Add TODO for using different masks when we support more GPU models
Changes for v4:
- Use a const (GPU_DMA_BITS) i
Pass register offset for the second half of the register area around.
This is done in preparation for i.MX95 support addition, which has the
registers at offset 0x24 instead of 0x00. No functional change so far.
Signed-off-by: Marek Vasut
---
Cc: Abel Vesa
Cc: Conor Dooley
Cc: Fabio Estevam
Cc
Enable hdmi_pai device.
Aud2htx module, hdmi_pai and hdmi controller compose the hdmi audio
pipeline.
Signed-off-by: Shengjiu Wang
Reviewed-by: Frank Li
Tested-by: Alexander Stein
---
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm
Hi Balbir,
Just one nit below :)
On Wed, Oct 1, 2025 at 3:43 PM Balbir Singh wrote:
>
> Add routines to support allocation of large order zone device folios
> and helper functions for zone device folios, to check if a folio is
> device private and helpers for setting zone device data.
>
> When l
On Wed, 03 Sep 2025 21:50:58 +0300, Cristian Ciocaltea wrote:
> The first patch in the series implements the CEC capability of the
> Synopsys DesignWare HDMI QP TX controller found in RK3588 & RK3576 Socs.
> This is based on the downstream code, but rewritten on top of the CEC
> helpers added rec
The body of ddebug_attach_module_classes() is dominated by a
code-block that finds the contiguous subrange of classmaps matching on
modname, and saves it into the ddebug_table's info record.
Implement this block in a macro to accommodate different component
vectors in the "box" (as named in the fo
Add new parameter DRM_AMDXDNA_HW_LAST_ASYNC_ERR to get array IOCTL. When
hardware reports an error, the driver save the error information and
timestamp. This new get array parameter retrieves the last error.
Signed-off-by: Lizhi Hou
---
drivers/accel/amdxdna/aie2_error.c | 95 ++
On Mon, Sep 22, 2025 at 03:00:32PM -0600, Alex Williamson wrote:
> But then later in patch 8/ and again in 10/ why exactly do we cache
> the provider on the vfio_pci_core_device rather than ask for it on
> demand from the p2pdma?
It makes the most sense if the P2P is activated once during probe(),
Since the allocation of the drivers main structure was changed to
devm_drm_dev_alloc() rdev is managed by devres and we shouldn't be calling
kfree() on it.
This fixes things exploding if the driver probe fails and devres cleans up
the rdev after we already free'd it.
Fixes: a9ed2f052c5c ("drm/rad
On Mon, Oct 06, 2025 at 05:37:23PM +0300, Cristian Ciocaltea wrote:
> On 10/6/25 3:02 PM, Dmitry Baryshkov wrote:
> > On Mon, Oct 06, 2025 at 02:55:38AM +0300, Laurent Pinchart wrote:
> >> From: Cristian Ciocaltea
> >>
> >> The error handling in dw_hdmi_qp_rockchip_bind() is quite inconsistent,
>
On Fri, Oct 17, 2025 at 10:37:46AM -0500, Rob Herring wrote:
> On Thu, Oct 16, 2025 at 11:25:34PM -0700, Matthew Brost wrote:
> > On Thu, Oct 16, 2025 at 04:06:05PM -0500, Rob Herring (Arm) wrote:
> > > Add a driver for Arm Ethos-U65/U85 NPUs. The Ethos-U NPU has a
> > > relatively simple interface
The code in ast_main.c has been split into several helpers in
other source files. Delete the source file. With the generic
device init gone, fail probing on unknown hardware generations.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Jocelyn Falempe
---
drivers/gpu/drm/ast/Makefile | 1 -
dr
From: David Laight
[ Upstream commit b280bb27a9f7c91ddab730e1ad91a9c18a051f41 ]
Since the test for signed values being non-negative only relies on
__builtion_constant_p() (not is_constexpr()) it can use the 'ux' variable
instead of the caller supplied expression. This means that the #define
par
At XDC, we discussed that drivers should avoid accessing DRM scheduler
internals, misusing DRM scheduler locks, and adopt a well-defined
pending job list iterator. This series proposes the necessary changes to
the DRM scheduler to bring Xe in line with that agreement and updates Xe
to use the new D
On Tue, 30 Sept 2025 at 12:55, Himanshu Dewangan wrote:
>
> From: Nagaraju Siddineni
>
> Introduce a new DT binding file for exynos-mfc
>
> Documentation/devicetree/bindings/media/samsung,exynos-mfc.yaml
> which describes the Exynos Multi‑Format Codec (MFC) IP. The schema
> covers the core node
Hi Nicolas,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 40a3abb0f3e5229996c8ef0498fc8d8a0c2bd64f]
url:
https://github.com/intel-lab-lkp/linux/commits/Nicolas-Frattaroli/dt-bindings-gpu-mali-valhall-csf-add-mediatek-mt8196-mali-variant/20251015-165256
b
From: Andy Yan
Convert it to drm bridge driver, it will be convenient for us to
migrate the connector part to the display driver later.
Patches that have already been merged in drm-misc-next are dropped.
Changes in v8:
- Rebase on latest drm-misc-next tag: drm-misc-fixes-2025-10-09
- Link to
This series adds device tree bindings and a DRM panel driver for
the Ilitek IL79900A MIPI-DSI LCD controller, which is used in the
Tianma TL121BVMS07-00 12.1-inch panel.
Changes in v3:
- PATCH 1/2: Fix DT schema error for `backlight` property.
- PATCH 2/2: Address review feedback (use mipi_dsi_msl
Hi Thomas,
On Thu, 16 Oct 2025 10:32:46 +0200
Thomas Zimmermann wrote:
> Hi,
>
> on patches 2 to 4: sync is really begin/end access wrapped into one
> interface, which I find questionable. I also don't like that these
> patches add generic infrastructure for a single driver.
It's actually tw
On Fri, 10 Oct 2025 16:34:14 +0100
Steven Price wrote:
> On 10/10/2025 16:03, Boris Brezillon wrote:
> > On Fri, 10 Oct 2025 15:11:54 +0100
> > Steven Price wrote:
> >
> >> On 10/10/2025 11:11, Boris Brezillon wrote:
> >>> Hook-up drm_gem_dmabuf_{begin,end}_cpu_access() to drm_gem_sync() so
Get_selection operation may be implemented only for sink pad and may
return error code. Set try_crop to 0 instead of returning error.
Signed-off-by: Svyatoslav Ryhel
---
drivers/staging/media/tegra-video/vi.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/sta
Thanks for pointing this out. Returning ABORTED was not generally a
problem, but it limited user space ability to distinguish between
different failure modes.
Changing this improves debugability and allows applications to take
actions based on separate return codes accordingly.
I have improved cla
Remove member no longer used by the scheduler core.
Signed-off-by: Tvrtko Ursulin
Cc: Boris Brezillon
Cc: Rob Herring
Cc: [email protected]
---
drivers/gpu/drm/panfrost/panfrost_job.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c
b/dr
On 10/11/2025 9:38 PM, Michał Winiarski wrote:
> Connect the helpers to allow save and restore of GGTT migration data in
> stop_copy / resume device state.
>
> Signed-off-by: Michał Winiarski
> ---
> drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 13 ++
> .../gpu/drm/xe/xe_gt_sriov_pf_contr
Add CSI node to Tegra20 and Tegra30 device trees.
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/boot/dts/nvidia/tegra20.dtsi | 19 ++-
arch/arm/boot/dts/nvidia/tegra30.dtsi | 24 ++--
2 files changed, 40 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot
On 10/6/2025 11:38 PM, Youssef Samir wrote:
From: Pranjal Ramajor Asha Kanojiya
Add support to export BO as DMABUF to enable userspace to reuse buffers
and reduce number of copy.
Signed-off-by: Pranjal Ramajor Asha Kanojiya
Signed-off-by: Youssef Samir
Applied to drm-misc-next.
-Jeff
From: Mary Guillemard
Now that everything in UVMM knows about the variable page shift, we can
select larger values.
The proposed approach rely on nouveau_bo::page unless it would cause
alignment issues (in which case we fall back to searching an appropriate
shift)
Co-developed-by: Mohamed Ahmed
Since the mailbox driver data can be obtained using cmdq_get_mbox_priv()
and all CMDQ users have transitioned to cmdq_get_mbox_priv(),
cmdq_get_shift_pa() can be removed.
Signed-off-by: Jason-JH Lin
---
drivers/mailbox/mtk-cmdq-mailbox.c | 8
include/linux/mailbox/mtk-cmdq-mailbo
On Mon, Sep 29, 2025 at 03:56:31PM +0800, Liu Ying wrote:
> On 09/28/2025, Dmitry Baryshkov wrote:
> > Make hdmi_write_hdmi_infoframe() and hdmi_clear_infoframe() callbacks
> > return -EOPNOTSUPP for unsupported InfoFrames and make sure that
> > atomic_check() callback doesn't allow unsupported Inf
Hello,
The panel driver ili9881c stopped working as soon as Kernel version turned
6.17. It was working well in all 6.16 versions. Please, look at the issue.
--
Best regards,
Sergey Suloev
// Common include for AAPI display
&dsi {
#address-cells = <1>;
#size-cells = <0>;
vcc-dsi-supply = <®
Synaptics' Touch and Display Driver Integration (TDDI) technology [1]
employs a single chip for both touchscreen and display capabilities.
Such designs reportedly help reducing costs and power consumption.
Although the touchscreens, which are powered by Synaptics'
Register-Mapped Interface 4 (RMI4
On Tue, Sep 30, 2025 at 03:50:43PM +0800, Langyan Ye wrote:
> Add device tree bindings for the Tianma TL121BVMS07-00 12.1"
> MIPI-DSI TFT LCD panel.
>
> Signed-off-by: Langyan Ye
> ---
> .../display/panel/tianma,tl121bvms07-00.yaml | 85 +++
> 1 file changed, 85 insertions(+)
>
On Fri, Sep 26, 2025 at 05:59:44PM +0200, Luca Ceresoli wrote:
> drm_bridge_attach() modifies the encoder bridge chain, so take a mutex
> around such operations to allow users of the chain to protect themselves
> from chain modifications while iterating.
>
> This change does not apply to drm_bridg
drm_for_each_bridge_in_chain_scoped() and
drm_for_each_bridge_in_chain_from() currently get/put the bridge at each
iteration. But they don't protect the encoder chain, so it could change
(bridges added/removed) while some code is iterating over the list
itself. To make iterations safe, change the l
On Thu, Oct 16, 2025 at 11:13:21AM -0400, Joel Fernandes wrote:
> Move the bitfield-specific code from the register macro into a new macro
> called bitfield. This will be used to define structs with bitfields,
> similar to C language.
Can you please fix line length issues before v8?
$ awk '{print
On Fri, Oct 17, 2025 at 1:11 AM Danilo Krummrich wrote:
>
> Since nova-core depends on CONFIG_64BIT, I think we want a helper function
> that
> converts usize to u64 infallibly.
>
> This helper function can simply generate a compile time error, when
> !CONFIG_64BIT, etc.
>
> We can do this locall
On 15/10/2025 17:03, Boris Brezillon wrote:
> Will be needed if we want to skip CPU cache maintenance operations when
> the GPU can snoop CPU caches.
>
> v2:
> - New commit
>
> v3:
> - Fix the coherency values (enum instead of bitmask)
>
> v4:
> - Fix init/test on coherency_features
>
> Signed-
The callback &analogix_dp_plat_data.get_modes() is not implemented
by either Rockchip side or Exynos side.
Signed-off-by: Damon Ding
Tested-by: Marek Szyprowski
---
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 3 ---
include/drm/bridge/analogix_dp.h | 2 --
2 files cha
Stop open coding pending job list in drivers. Add pending job list
iterator which safely walks DRM scheduler list asserting DRM scheduler
is stopped.
v2:
- Fix checkpatch (CI)
v3:
- Drop locked version (Christian)
Signed-off-by: Matthew Brost
---
include/drm/gpu_scheduler.h | 52 +
Just adding Christian and Faith, who might have some more comments.
On Fri, 10 Oct 2025 at 06:04, Zack Rusin wrote:
>
> Propagate the fence errors from drivers to userspace. Allows userspace to
> react to asynchronous errors coming from the drivers.
>
> One of the trickiest bits of drm syncobj in
The udlfb driver exposes sysfs attributes thus depends upon
CONFIG_FB_DEVICE. This patch work wraps relavent code blocks
with #ifdef CONFIG_FB_DEVICE so that the driver can still be
built even when CONFIG_FB_DEVICE is not selected.
This addresses an item in Documentation/gpu/TODO.rst.
Signed-off-
At XDC, we discussed that drivers should avoid accessing DRM scheduler
internals, misusing DRM scheduler locks, and adopt a well-defined
pending job list iterator. This series proposes the necessary changes to
the DRM scheduler to bring Xe in line with that agreement and updates Xe
to use the new D
From: Linus Torvalds
[ Upstream commit 4477b39c32fdc03363affef4b11d48391e6dc9ff ]
Commit 3a7e02c040b1 ("minmax: avoid overly complicated constant
expressions in VM code") added the simpler MIN_T/MAX_T macros in order
to avoid some excessive expansion from the rather complicated regular
min/max m
On Thu, Aug 21, 2025 at 10:17:30AM +0200, Thomas Zimmermann wrote:
Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch
and buffer size. Align the pitch to a multiple of 8. Align the
buffer size according to hardware requirements.
Xe's internal calculation allowed for 64-bit wide buff
On 10-10-2025 19:02, Ville Syrjälä wrote:
On Fri, Oct 10, 2025 at 02:15:57PM +0530, Arun R Murthy wrote:
struct drm_crtc_state {
/**
* @async_flip:
*
* This is set when DRM_MODE_PAGE_FLIP_ASYNC is set in the legacy
* PAGE_FLIP IOCTL. It's not
Hi Christian,
Thank you for looking at it and providing your R-b.
On Sunday, 28 September 2025 16:00:57 CEST Christian König wrote:
> On 26.09.25 17:26, Janusz Krzysztofik wrote:
> > A timer that expires a vgem fence automatically in 10 seconds is now
> > released with timer_delete_sync() from fe
This series introduces two new drivers to accomplish controlling the
frequency and power of the Mali GPU on MediaTek MT8196 SoCs.
The reason why it's not as straightforward as with other SoCs is that
the MT8196 has quite complex glue logic in order to squeeze the maximum
amount of performance poss
Reviewed-by: Lyude Paul
via irc:
https://people.freedesktop.org/~cbrill/dri-log/?channel=nouveau&highlight_names=&date=2025-10-13&show_html=true
Am 01.10.25 um 16:37 schrieb Thomas Zimmermann:
No caller of the client resume/suspend helpers holds the console
lock. The last such cases were rem
The drm_atomic_get_plane_state() function calls the deprecated
drm_atomic_get_existing_plane_state() helper to get find if a plane
state had already been allocated and was part of the given
drm_atomic_state.
At the point in time where drm_atomic_get_plane_state() can be called
(ie, during atomic_c
Split off device initialization for Gen7 hardware into the helpers
ast_2600_device_create() and ast_2600_detect_wide_screen(). The new
functions are duplicates of their counterparts in ast_main.c, but
stripped from most non-Gen7 support.
Simplifies maintenance as the driver's number of supported h
On 10/16/25 12:14 PM, Geert Uytterhoeven wrote:
Hello Geert,
which are also never disabled, do we want to disable the GPU by default
and enable per-board ?
Yes please. We do the same with renesas,*-mali GPU nodes.
The board may not even have graphical output.
Or do you envision using the GPU
Introduce TXVMPSPHSETR_DT_MASK macro and use FIELD_PREP() to generate
appropriate bitfield from mask and value without bitshift.
Do not convert bits and bitfields to BIT() and GENMASK() yet, to be
consisten with the current style. Conversion to BIT() and GENMASK()
macros is done at the very end of
On 02.10.25 23:00, Ard Biesheuvel wrote:
> From: Ard Biesheuvel
>
> The point of isolating code that uses kernel mode FPU in separate
> compilation units is to ensure that even implicit uses of, e.g., SIMD
> registers for spilling occur only in a context where this is permitted,
> i.e., from insi
With a stock 6.17-rc7 and this config:
https://hansen.beer/~dave/intel/config.xe.20250924
I'm seeing:
ld: vmlinux.o: in function `check_sw_disable':
.../linux.runme/drivers/gpu/drm/xe/xe_hw_engine.c:812: undefined reference to
`xe_configfs_get_engines_allowed'
ld: vmlinux.o: in function
Hello Rain,
On Fri, 10 Oct 2025 17:14:52 +0800
Rain Yang wrote:
> On Thu, Oct 09, 2025 at 05:23:20PM +0200, Boris Brezillon wrote:
> >On Thu, 9 Oct 2025 23:06:17 +0800
> >Rain Yang wrote:
> >
> >> On Thu, Oct 09, 2025 at 04:09:29PM +0200, Boris Brezillon wrote:
> >> >On Thu, 9 Oct 2025 16:0
Define qmp_usbc_dp_phy_ops struct to support DP mode on USB/DP
switchable PHYs.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Xiangxu Yin
---
drivers/phy/qualcomm/phy-qcom-qmp-usbc.c | 194 ++-
1 file changed, 193 insertions(+), 1 deletion(-)
diff --git a/drivers/phy
A gentle ping - any takers to double check my analysis and review the below?
Regards,
Tvrtko
On 03/10/2025 10:26, Tvrtko Ursulin wrote:
Drm_sched_job_add_dependency() consumes the fence reference both on
success and failure, so in the latter case the dma_fence_put() on the
error path (xarray
Move initialization of screen_info into a single helper function.
Frees up space in the main setup helper for adding EDID support.
No functional changes.
Signed-off-by: Thomas Zimmermann
---
drivers/firmware/efi/libstub/gop.c | 76 +-
1 file changed, 33 insertions(+),
On 9/29/2025 5:27 AM, Dmitry Baryshkov wrote:
On Sun, Sep 28, 2025 at 05:52:35PM +0800, Chaoyi Chen wrote:
On 9/23/2025 9:50 AM, Dmitry Baryshkov wrote:
[...]
+ /* One endpoint may correspond to one HPD bridge. */
+ for_each_of_graph_port_endpoint(port, dp_ep) {
+
On Fri, Sep 26, 2025 at 3:54 PM Ian Forbes wrote:
>
> This hashtable is only used under a lock in vmw_execbuf_process and needs
> to be cleared before vmw_execbuf_process returns otherwise bad things
> happen because the nodes that are stored in the table come from an arena
> allocator that is cle
From: Nagaraju Siddineni
- Add core command extensions and decoder‑specific commands.
- Update core register APIs with helpers for processing‑cycle,
DPB, scratch size, SEI, black‑bar detection, MVC IDs, profile,
display delay, two‑core mode, and inline utilities for crop info,
tag updates, migrat
After resume from suspend to RAM, the following splash is generated if
the HDMI driver is probed (independent of a connected cable):
[ 1194.484052] irq 80: nobody cared (try booting with the "irqpoll" option)
[ 1194.484074] CPU: 0 UID: 0 PID: 627 Comm: rtcwake Not tainted
6.17.0-rc7-g96f1a11414b3
The driver has never supported anything but OF probe so drop the unused
platform module alias incorrectly added by commit b2da05ff4797
("imx-drm: parallel-display: Add MODULE_ALIAS()")
Signed-off-by: Johan Hovold
---
drivers/gpu/drm/imx/ipuv3/parallel-display.c | 1 -
1 file changed, 1 deletion(
Hook-up drm_gem_dmabuf_{begin,end}_cpu_access() to drm_gem_sync() so
that drivers relying on the default prime_dmabuf_ops can still have
a way to prepare for CPU accesses from outside the UMD.
v2:
- New commit
v3:
- Don't return an error on NOP syncs, and document that case in a
comment
Signed
On Monday, September 22, 2025 4:36 PM Svyatoslav Ryhel wrote:
> пн, 22 вер. 2025 р. о 10:27 Mikko Perttunen пише:
> >
> > On Monday, September 22, 2025 3:30 PM Svyatoslav Ryhel wrote:
> > > пн, 22 вер. 2025 р. о 09:23 Mikko Perttunen пише:
> > > >
> > > > On Monday, September 22, 2025 2:13 PM Svy
On 15/10/2025 14:01, Boris Brezillon wrote:
> From: Faith Ekstrand
>
> Will be used by the UMD to optimize CPU accesses to buffers
> that are frequently read by the CPU, or on which the access
> pattern makes non-cacheable mappings inefficient.
>
> Mapping buffers CPU-cached implies taking care
i.MX95 DISPLAY STREAM_CSR includes registers to control DSI PHY settings.
Add dt-schema for it.
Signed-off-by: Marek Vasut
---
Cc: Abel Vesa
Cc: Conor Dooley
Cc: Fabio Estevam
Cc: Krzysztof Kozlowski
Cc: Laurent Pinchart
Cc: Liu Ying
Cc: Lucas Stach
Cc: Peng Fan
Cc: Pengutronix Kernel Tea
There is no need to keep entities with no jobs in the tree so lets remove
it once the last job is consumed. This keeps the tree smaller which is
nicer and more efficient as entities are removed and re-added on every
popped job.
Apart from that, the upcoming fair scheduling algorithm will rely on t
On Fri, Oct 03, 2025 at 12:39:23PM +0200, Luca Ceresoli wrote:
> The per-encoder bridge chain is currently assumed to be static once it is
> fully initialized. Work is in progress to add hot-pluggable bridges,
> breaking that assumption.
>
> With bridge removal, the encoder chain can change withou
Convert register bits to BIT() macro and bitfields to GENMASK()/FIELD_PREP()
macros.
Most of this patchset is boring mechanical conversion.
Noteworthy patches are 6 and 7 , those introduce handling of DSI mode flags
and convert use of DRM_MODE_FLAG_P.SYNC into DRM_MODE_FLAG_N.SYNC, but that
shoul
On Wed, 15 Oct 2025 22:41:59 +0200
Loïc Molinari wrote:
> On 15/10/2025 20:17, Boris Brezillon wrote:
> > On Wed, 15 Oct 2025 17:30:12 +0200
> > Loïc Molinari wrote:
> >
> >> Don't declare "super_pages" on builds with CONFIG_TRANSPARENT_HUGEPAGE
> >> disabled to prevent build error:
> >>
> >>
On Friday, September 26, 2025 12:16 AM Svyatoslav Ryhel wrote:
> The CSUS clock is a clock gate for the output clock signal primarily
> sourced from the VI_SENSOR clock. This clock signal is used as an input
> MCLK clock for cameras.
>
> Unlike later Tegra SoCs, the Tegra 20 can change its CSUS pa
Invoking drm_bridge_add() is good practice, so add it to this driver.
Link: https://lore.kernel.org/all/[email protected]
Signed-off-by: Luca Ceresoli
---
Note: there is a proposal to make drm_bridge_add() mandatory before
drm_bridge_attach():
https://lore.kernel.org/lkml/20
On Fri, Sep 26, 2025 at 05:17:58PM +0800, Haoxiang Li wrote:
> mipi_dsi_device_alloc() calls device_initialize() to initialize value
> "&dsi->dev". Thus "dsi" should be freed using put_device() in error
> handling path.
>
> Fixes: 068a00233969 ("drm: Add MIPI DSI bus support")
> Cc: [email protected]
On Thu, Oct 09, 2025 at 09:30:28PM +0200, Heiko Stuebner wrote:
> Right now if there is a next bridge attached to the analogix-dp controller
> the driver always assumes this bridge is connected to something, but this
> is of course not always true, as that bridge could also be a hotpluggable
> dp p
From: David Heidelberg
Add panel driver used in the OnePlus 6T.
No datasheet, based mostly on EDK2 init sequence and the downstream driver.
Based on work of:
Casey Connolly
Joel Selvaraj
Nia Espera
Signed-off-by: David Heidelberg
---
MAINTAINERS
On 10/14/2025, Marek Vasut wrote:
> On 10/13/25 6:49 PM, Frank Li wrote:
>
> Hello Frank,
>
>>> @@ -90,13 +102,15 @@ patternProperties:
>>> compatible:
>>> const: fsl,imx8qxp-dc-signature
>>>
>>> - "^tcon@[0-9a-f]+$":
>>> + "^tcon(@[0-9a-f]+)?$":
>>
>> why here allow no addres
When checking whether to skip certain buffers because they're protected
by dmem.low, we're checking the effective protection of the evictee's
cgroup, but depending on how the evictor's cgroup relates to the
evictee's, the semantics of effective protection values change.
When testing against cgroup
Set the correct DMA mask. Without this DMA will fail on some setups.
Signed-off-by: Alistair Popple
---
Changes for v4:
- Use a const (GPU_DMA_BITS) instead of a magic number
Changes for v2:
- Update DMA mask to correct value for Ampere/Turing (47 bits)
---
drivers/gpu/nova-core/driver.rs |
The descriptor reuses the KLV format used by GuC and contains metadata
that can be used to quickly fail migration when source is incompatible
with destination.
Signed-off-by: Michał Winiarski
---
drivers/gpu/drm/xe/xe_sriov_pf_migration.c| 6 +-
.../gpu/drm/xe/xe_sriov_pf_migration_data.c
Hi
Am 13.10.25 um 10:04 schrieb Javier Martinez Canillas:
Thomas Zimmermann writes:
Hello Hans,
Hi Hans
Am 11.10.25 um 12:02 schrieb Hans de Goede:
Hi,
A while ago I did a blogpost about not having the native GPU drivers in
the initrd: https://hansdegoede.dreamwidth.org/28291.html
With t
Hi Boris,
On 01.10.2025 12:58, Boris Brezillon wrote:
> On Wed, 1 Oct 2025 03:20:26 +0100
> Adrián Larumbe wrote:
>
> > When mapping the pages of a BO, either a heap type at page fault time or
> > else a non-heap BO at object creation time, if the ARM page table mapping
> > function fails, we un
On Thu, Oct 09, 2025 at 02:00:43PM +0100, Steven Price wrote:
> Series applied to drm-misc-next.
I have not seen DT team's acked tag for binding.
Frank
>
> Thanks,
> Steve
>
> On 28/09/2025 10:03, Rain Yang wrote:
> > From: Rain Yang
> >
> > Not all platforms require the mali-supply regulator.
From: Linus Torvalds
[ Upstream commit 4477b39c32fdc03363affef4b11d48391e6dc9ff ]
Commit 3a7e02c040b1 ("minmax: avoid overly complicated constant
expressions in VM code") added the simpler MIN_T/MAX_T macros in order
to avoid some excessive expansion from the rather complicated regular
min/max m
>-Original Message-
>From: dri-devel On Behalf Of
>Christian König
>Sent: Monday, October 6, 2025 9:47 AM
>To: [email protected]; [email protected]; dri-
>[email protected]; [email protected];
>[email protected]
>Subject: [PATCH 2/2] dma-buf: imp
Extend core huge page management functions to handle device-private THP
entries. This enables proper handling of large device-private folios in
fundamental MM operations.
The following functions have been updated:
- copy_huge_pmd(): Handle device-private entries during fork/clone
- zap_huge_pmd(
Remove the DD_CLASS_TYPE_*_NAMES classmap types and code.
These 2 classmap types accept class names at the PARAM interface, for
example:
echo +DRM_UT_CORE,-DRM_UT_KMS > /sys/module/drm/parameters/debug_names
The code works, but its only used by test-dynamic-debug, and wasn't
asked for by anyon
On 9/26/2025 3:32 AM, Dmitry Baryshkov wrote:
> On Thu, Sep 25, 2025 at 11:06:01AM +0530, Ayushi Makhija wrote:
>> Add device tree nodes for the DSI0 controller with their corresponding
>> PHY found on Qualcomm QCS8300 SoC.
>>
>> Signed-off-by: Ayushi Makhija
>> ---
>> arch/arm64/boot/dts/qcom/qc
On 07.10.25 16:00, Tvrtko Ursulin wrote:
>>
>> Please not in the header. Neither drivers nor other TTM modules should mess
>> with such properties.
>>
>> That is all internal to the pool.
>
> Hmm IMHO it is not that bad. Especially that ttm_pool.c and ttm_tt.c need to
> have access to them. Alte
On 10/14/2025 6:18 PM, Dmitry Baryshkov wrote:
> On Tue, Oct 14, 2025 at 05:42:11PM +0800, Xiangxu Yin via B4 Relay wrote:
>> From: Xiangxu Yin
>>
>> Introduce DisplayPort controller node and associated QMP USB3-DP PHY
>> for SM6150 SoC. Update clock and endpoint connections to enable DP
>> inte
On Thu Oct 9, 2025 at 9:47 AM JST, Joel Fernandes wrote:
> Currently, the BiosImage type in vbios code is implemented as a
> type-wrapping enum with the sole purpose of implementing a type that is
> common to all specific image types. To make this work, macros were used
> to overcome limitations of
On 10/3/25 08:34, [email protected] wrote:
> +int virtio_gpu_object_restore_all(struct virtio_gpu_device *vgdev)
> +{
> + struct virtio_gpu_object *bo, *tmp;
> + struct virtio_gpu_mem_entry *ents;
> + unsigned int nents;
> + int ret = 0;
> +
> + spin_lock(&vgdev->obj_restore
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