Set the correct DMA mask. Without this DMA will fail on some setups.
Signed-off-by: Alistair Popple <[email protected]>
---
Changes for v5:
- Update SAFETY comment for dma_set_mask_and_coherent()
- Add TODO for using different masks when we support more GPU models
Changes for v4:
- Use a const (GPU_DMA_BITS) instead of a magic number
Changes for v2:
- Update DMA mask to correct value for Ampere/Turing (47 bits)
---
drivers/gpu/nova-core/driver.rs | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/nova-core/driver.rs b/drivers/gpu/nova-core/driver.rs
index edc72052e27a..2407d0ab15e2 100644
--- a/drivers/gpu/nova-core/driver.rs
+++ b/drivers/gpu/nova-core/driver.rs
@@ -3,6 +3,8 @@
use kernel::{
auxiliary, c_str,
device::Core,
+ dma::Device,
+ dma::DmaMask,
pci,
pci::{Class, ClassMask, Vendor},
prelude::*,
@@ -20,6 +22,15 @@ pub(crate) struct NovaCore {
}
const BAR0_SIZE: usize = SZ_16M;
+
+// For now we only support Ampere which can use up to 47-bit DMA addresses.
+//
+// TODO: Add an abstraction for this to support newer GPUs which may support
+// larger DMA addresses. Limiting these GPUs to smaller address widths won't
+// have any adverse affects, unless installed on systems which require larger
+// DMA addresses. These systems should be quite rare.
+const GPU_DMA_BITS: u32 = 47;
+
pub(crate) type Bar0 = pci::Bar<BAR0_SIZE>;
kernel::pci_device_table!(
@@ -57,6 +68,11 @@ fn probe(pdev: &pci::Device<Core>, _info: &Self::IdInfo) ->
Result<Pin<KBox<Self
pdev.enable_device_mem()?;
pdev.set_master();
+ // SAFETY: No concurrent DMA allocations or mappings can be made
because
+ // the device is still being probed and therefore isn't being used by
+ // other threads of execution.
+ unsafe {
pdev.dma_set_mask_and_coherent(DmaMask::new::<GPU_DMA_BITS>())? };
+
let devres_bar = Arc::pin_init(
pdev.iomap_region_sized::<BAR0_SIZE>(0, c_str!("nova-core/bar0")),
GFP_KERNEL,
--
2.50.1
